FDMS7700S

FDMS7700S Dual N-Channel PowerTrench® MOSFET December 2009 FDMS7700S Dual N-Channel PowerTrench® MOSFET Features Q1: N-Channel Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 12 A Max rDS(on) = 12 mΩ at VGS = 4.5 V, ID = 10 A Q2: N-Channel Max rDS(on) = 2.4 mΩ at VGS = 10 V, ID = 20 A Max rDS(on) = 2.9 mΩ at VGS = 4.5 V, ID = 18 A RoHS Compliant N-Channel: 30 V, 30 A, 7.5 mΩ N-Channel: 30 V, 40 A, 2.4 mΩ General Description This device includes two specialized N-Channel MOSFETs in a dual MLP package.The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous SyncFET (Q2) have been designed to provide optimal power efficiency. Applications Computing Communications General Purpose Point of Load Notebook VCORE S2 S1/D2 D1 D1 Top Power 56 D1 D1 S2 S2 G2 S2 S2 S2 5 6 7 8 Q2 4 D1 3 D1 2 D1 Q1 G1 Bottom G2 1 G1 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current ID -Continuous (Package limited) -Continuous (Silicon limited) -Continuous -Pulsed PD TJ, TSTG Power Dissipation for Single Operation Operating and Storage Junction Temperature Range TA = 25 °C TA = 25 °C (Note 3) TC = 25 °C TC = 25 °C TA = 25 °C Q1 30 ±20 30 50 121a 40 2.21a 1.01c Q2 30 ±20 40 120 221b 60 2.51b 1.01d W °C A Units V V -55 to +150 Thermal Characteristics RθJA RθJA RθJC Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case 571a 1251c 3.5 501b 1201d 2 °C/W Package Marking and Ordering Information Device Marking FDMS7700S Device FDMS7700S Package Power 56 Reel Size 13 ” Tape Width 12 mm Quantity 3000 units ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C 1 www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 µA, VGS = 0 V ID = 1 mA, VGS = 0 V ID = 250 µA, referenced to 25 °C ID = 1 mA, referenced to 25 °C VDS = 24 V, VGS = 0 V VGS = 20 V, VDS= 0 V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 30 30 15 14 1 500 100 100 V m V /° C µA µA nA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250 µA VGS = VDS, ID = 1 mA ID = 250 µA, referenced to 25 °C ID = 1 mA, referenced to 25 °C VGS = 10 V, ID = 12 A VGS = 4.5 V, ID = 10 A VGS = 10 V, ID = 12 A , TJ = 125 °C VGS = 10 V, ID = 20 A VGS = 4.5 V, ID = 18 A VGS = 10 V, ID = 20 A , TJ = 125 °C VDS = 5 V, ID = 12 A VDS = 5 V, ID = 20 A Q1 Q2 Q1 Q2 Q1 1 1 1.8 1.5 -6 -4 6.0 8.5 8.3 1.9 2.2 2.1 63 160 7.5 12 12 2.4 2.9 3.4 3 3 V mV/°C rDS(on) Drain to Source On Resistance mΩ Q2 Q1 Q2 gFS Forward Transconductance S Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Q1: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q2: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 1315 7240 445 2690 45 185 0.9 0.8 1750 9630 600 3580 70 280 pF pF pF Ω Switching Characteristics td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Gate Charge Gate to Drain “Miller” Charge VGS = 0 V to 10 V Q1 VDD = 15 V, VGS = 0 V to 4.5 V ID = 12 A Q2 VDD = 15 V, ID = 2 0 A Q1: VDD = 15 V, ID = 12 A, RGEN = 6 Ω Q2: VDD = 15 V, ID = 20 A, RGEN = 6 Ω Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 8.6 21 2.5 9.2 20 58 2.3 6.8 20 105 9.3 48 4.3 19 2.2 11 18 34 10 18 32 93 10 14 28 147 13 67 ns ns ns ns nC nC nC nC ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 12 A VGS = 0 V, IS = 20 A Q1 IF = 12 A, di/dt = 100 A/µs Q2 IF = 20 A, di/dt = 300 A/µs (Note 2) (Note 2) Q1 Q2 Q1 Q2 Q1 Q2 0.8 0.7 27 53 10 100 1.2 1.2 43 85 18 160 V ns nC Notes: 1: RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 57 °C/W when mounted on a 1 in2 pad of 2 oz copper b. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper c. 125 °C/W when mounted on a minimum pad of 2 oz copper d. 120 °C/W when mounted on a minimum pad of 2 oz copper 2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%. 3: As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied. ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted 40 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V 4 VGS = 6 V PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 30 VGS = 4.5 V VGS = 4 V 3 VGS = 3.5 V VGS = 4 V 20 2 VGS = 4.5 V 10 VGS = 3.5 V PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 1 VGS = 6 V 0 0 10 20 ID, DRAIN CURRENT (A) 30 VGS = 10 V 0 0.0 0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 40 Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 40 SOURCE ON-RESISTANCE (mΩ) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID = 12 A VGS = 10 V PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX rDS(on), DRAIN TO 1.4 30 ID = 12 A 1.2 20 TJ = 125 oC 1.0 10 TJ = 25 oC 0.8 -75 0 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature 40 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX Figure 4. On-Resistance vs Gate to Source Voltage 40 VGS = 0 V 10 ID, DRAIN CURRENT (A) 30 VDS = 5 V TJ = 150 oC TJ = 25 oC 1 TJ = 150 oC TJ = 25 oC 20 0.1 10 TJ = -55 oC 0.01 TJ = -55 oC 0 1.5 2.0 2.5 3.0 3.5 4.0 0.001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted 10 VGS, GATE TO SOURCE VOLTAGE (V) ID = 12 A 2000 1000 Ciss 8 6 VDD = 15 V CAPACITANCE (pF) VDD = 10 V Coss 4 VDD = 20 V 100 2 0 0 5 10 Qg, GATE CHARGE (nC) Crss f = 1 MHz VGS = 0 V 15 20 10 0.1 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 100 60 VGS = 10 V RθJC = 3.5 C/W ID, DRAIN CURRENT (A) o ID, DRAIN CURRENT (A) 100us 10 1 ms 40 VGS = 4.5 V 1 THIS AREA IS LIMITED BY rDS(on) 10 ms 100 ms 20 Limited by Package 0.1 SINGLE PULSE TJ = MAX RATED RθJA = 125 C/W TA = 25 oC o 1s 10s DC 1 10 100 200 0 25 50 75 100 o 125 150 0.01 0.01 0.1 TC, CASE TEMPERATURE ( C) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Maximum Continuous Drain Current vs Case Temperature 1000 P(PK), PEAK TRANSIENT POWER (W) Figure 10. Forward Bias Safe Operating Area SINGLE PULSE RθJA = 125 C/W o o 100 TA = 25 C 10 1 0.5 -4 10 10 -3 10 -2 10 -1 1 10 100 1000 t, PULSE WIDTH (s) Figure 11. Single Pulse Maximum Power Dissipation ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted 2 1 NORMALIZED THERMAL IMPEDANCE, ZθJA DUTY CYCLE-DESCENDING ORDER 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 t1 SINGLE PULSE RθJA = 125 C/W (Note 1c) o t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA -1 0.001 -4 10 10 -3 10 -2 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 SyncFET) 60 50 ID, DRAIN CURRENT (A) VGS = 10 V PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 6 5 VGS = 2.5 V PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 40 30 20 10 VGS = 4.5 V VGS = 3.5 V VGS = 3 V 4 3 2 1 VGS = 3.5 V VGS = 4.5 V VGS = 10 V VGS = 3 V VGS = 2.5 V 0 0 0.2 0.4 0.6 0.8 1.0 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 0 10 20 30 40 50 60 ID, DRAIN CURRENT (A) Figure 13. On-Region Characteristics Figure 14. Normalized on-Resistance vs Drain Current and Gate Voltage 10 SOURCE ON-RESISTANCE (mΩ) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.4 1.2 1.0 0.8 0.6 -75 ID = 20 A VGS = 10 V 8 6 4 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX rDS(on), DRAIN TO ID = 20 A TJ = 125 oC 2 TJ = 25 oC -50 -25 0 25 50 75 100 125 150 0 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) Figure 15. Normalized On-Resistance vs Junction Temperature Figure 16. On-Resistance vs Gate to Source Voltage 60 IS, REVERSE DRAIN CURRENT (A) 60 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX VGS = 0 V 50 ID, DRAIN CURRENT (A) 10 TJ = 125 oC VDS = 5 V 40 TJ = 125 oC 1 TJ = 25 oC 30 20 10 0 1.0 TJ = 25 oC 0.1 0.01 TJ = -55 oC TJ = -55 oC 0.001 1.5 2.0 2.5 3.0 0 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 17. Transfer Characteristics Figure 18. Source to Drain Diode Forward Voltage vs Source Current ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 SyncFET) 10 VGS, GATE TO SOURCE VOLTAGE (V) ID = 20 A 30000 10000 CAPACITANCE (pF) VDD = 10 V Ciss 8 6 VDD = 15 V Coss 4 VDD = 20 V 1000 2 0 0 40 80 120 Qg, GATE CHARGE (nC) f = 1 MHz VGS = 0 V Crss 100 0.1 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 19. Gate Charge Characteristics Figure 20. Capacitance vs Drain to Source Voltage 100 150 VGS = 10 V RθJC = 2 C/W ID, DRAIN CURRENT (A) o ID, DRAIN CURRENT (A) 10 1 ms 10 ms 100 VGS = 4.5 V 1 THIS AREA IS LIMITED BY rDS(on) 100 ms 1s 10 s DC 50 0.1 SINGLE PULSE TJ = MAX RATED RθJA = 120 oC/W TA = 25 C o Limited by Package 0 25 50 75 100 o 125 150 0.01 0.01 0.1 1 10 100 TC, CASE TEMPERATURE ( C) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 21. Maximum Continuous Drain Current vs Case Temperature 1000 P(PK), PEAK TRANSIENT POWER (W) Figure 22. Forward Bias Safe Operating Area SINGLE PULSE RθJA = 120 C/W o o 100 TA = 25 C 10 1 0.5 -3 10 10 -2 10 -1 1 t, PULSE WIDTH (s) 10 100 1000 Figure 23. Single Pulse Maximum Power Dissipation ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 SyncFET) 2 1 NORMALIZED THERMAL IMPEDANCE, ZθJA DUTY CYCLE-DESCENDING ORDER 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 SINGLE PULSE RθJA = 120 C/W o t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA 0.001 -3 10 (Note 1d) 10 -2 10 -1 1 t, RECTANGULAR PULSE DURATION (s) 10 100 1000 Figure 24. Junction-to-Ambient Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (continued) SyncFET Schottky body diode Characteristics Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 25 shows the reverse recovery characteristic of the FDMS7700S. Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. 12 9 CURRENT (A) IDSS, REVERSE LEAKAGE CURRENT (A) 10 -1 TJ = 125 oC 10 -2 6 didt = 300 A/µs 3 0 -3 -6 100 10 -3 TJ = 100 oC 10 -4 TJ = 25 oC 150 200 TIME (ns) 250 300 10 -5 0 5 10 15 20 25 30 VDS, REVERSE VOLTAGE (V) Figure 25. FDMS7700S SyncFET body diode reverse recovery characteristic Figure 26. SyncFET body diode reverse leakage versus drain-source voltage ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com FDMS7700S Dual N-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. AccuPower™ PowerTrench® FPS™ The Power Franchise® Auto-SPM™ F-PFS™ PowerXS™ ® Build it Now™ FRFET® Programmable Active Droop™ SM ® CorePLUS™ Global Power Resource QFET TinyBoost™ CorePOWER™ Green FPS™ QS™ TinyBuck™ Green FPS™ e-Series™ CROSSVOLT™ Quiet Series™ TinyCalc™ Gmax™ CTL™ RapidConfigure™ TinyLogic® GTO™ Current Transfer Logic™ TINYOPTO™ IntelliMAX™ EcoSPARK® ™ TinyPower™ ISOPLANAR™ EfficentMax™ Saving our world, 1mW /W /kW at a time™ TinyPWM™ EZSWITCH™* MegaBuck™ SmartMax™ TinyWire™ ™* MICROCOUPLER™ SMART START™ TriFault Detect™ MicroFET™ SPM® TRUECURRENT™* MicroPak™ STEALTH™ ® MillerDrive™ SuperFET™ Fairchild® MotionMax™ SuperSOT™-3 Fairchild Semiconductor® Motion-SPM™ SuperSOT™-6 UHC® ® FACT Quiet Series™ OPTOLOGIC SuperSOT™-8 Ultra FRFET™ FACT® SupreMOS™ OPTOPLANAR® UniFET™ ® ® FAST SyncFET™ VCX™ FastvCore™ Sync-Lock™ VisualMax™ FETBench™ XS™ ®* PDP SPM™ ®* FlashWriter Power-SPM™ tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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The datasheet is for reference information only. Rev. I41 Preliminary First Production No Identification Needed Obsolete Full Production Not In Production ©2009 Fairchild Semiconductor Corporation FDMS7700S Rev.C www.fairchildsemi.com