FDMS8674 N-Channel PowerTrench® MOSFET
April 2008
FDMS8674
N-Channel PowerTrench MOSFET
30V, 21A, 5.0mΩ
Features
Max rDS(on) = 5.0mΩ at VGS = 10V, ID = 17A Max rDS(on) = 8.0mΩ at VGS = 4.5V, ID = 14A Advanced Package and Silicon combination for low rDS(on) and high efficiency MSL1 robust package design RoHS Compliant
®
tm
General Description
The FDMS8674 has been designed to minimize losses in power conversion application. Advancements in both silicon and package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance.
Applications
Computing VR & IMVP Vcore Secondary Side Synchronous Rectifier POL DC/DC Converter Oring FET/ Load Switch
Pin 1 S S D S G D D D D D Power 56 (Bottom View) D 5 6 7 8 4 G
3S 2S 1S
D
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) ID -Continuous (Silicon limited) -Continuous -Pulsed EAS PD TJ, TSTG Single Pulse Avalanche Energy Power Dissipation Power Dissipation TC = 25°C TA = 25°C (Note 1a) (Note 3) TC = 25°C TC = 25°C TA = 25°C (Note 1a) Ratings 30 ±20 21 94 17 150 181 78 2.5 -55 to +150 mJ W °C A Units V V
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJC RθJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a) 1.6 50 °C/W
Package Marking and Ordering Information
Device Marking FDMS8674 Device FDMS8674 Package Power 56 Reel Size 13’’ Tape Width 12mm Quantity 3000units
©2008 Fairchild Semiconductor Corporation FDMS8674 Rev.C1
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FDMS8674 N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250µA, VGS = 0V ID = 250µA, referenced to 25°C VDS = 24V, VGS = 0V VGS = ±20V, VDS = 0V 30 25 1 ±100 V mV/°C µA nA
On Characteristics
VGS(th) ∆VGS(th) ∆TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 250µA ID = 250µA, referenced to 25°C VGS = 10V, ID = 17A VGS = 4.5V, ID = 14A VGS = 10V, ID = 17A, TJ = 125°C VDD = 10V, ID = 17A 1.0 1.8 -6 4.1 5.8 5.8 87 5.0 8.0 8.3 S mΩ 3.0 V mV/°C
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 15V, VGS = 0V, f = 1MHz f = 1MHz 1745 860 130 0.9 2320 1145 195 pF pF pF Ω
Switching Characteristics
td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Charge Gate to Drain “Miller” Charge VGS = 0V to 10V VGS = 0V to 5V VDD = 15V, ID = 17A VDD = 15V, ID = 17A, VGS = 10V, RGEN = 6Ω 11 4 26 3 26 14 4.8 3.5 20 10 42 10 37 20 ns ns ns ns nC nC nC nC
Drain-Source Diode Characteristics
VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 2.1A VGS = 0V, IS = 17A IF = 17A, di/dt = 100A/µs (Note 2) 0.7 0.8 40 30 1.2 1.2 64 48 V V ns nC
NOTES: 1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50°C/W when mounted on a 1 in2 pad of 2 oz copper. b. 125°C/W when mounted on a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%. 3. Starting TJ = 25°C, L = 3mH, IAS = 11A, VDD = 30V, VGS = 10V.
©2008 Fairchild Semiconductor Corporation FDMS8674 Rev.C1
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FDMS8674 N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
150
VGS = 10V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
3.0
VGS = 3.5V
120
ID, DRAIN CURRENT (A) VGS = 5V
VGS = 4V VGS = 4.5V
2.5 2.0
VGS = 4V VGS = 4.5V
90 60 30 0 0
VGS = 5V
VGS = 3.5V
1.5
VGS = 10V
1.0
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
0.5 0 30 60 90 120 150
ID, DRAIN CURRENT(A)
1
2
3
4
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
14
SOURCE ON-RESISTANCE (mΩ)
1.8
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
1.6 1.4 1.2 1.0 0.8 0.6 -75
ID = 17A VGS = 10V
ID = 17A
12 10 8
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
rDS(on), DRAIN TO
TJ = 125oC
6 4
TJ = 25oC
2 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC)
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance vs Junction Temperature
150
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
Figure 4. On-Resistance vs Gate to Source Voltage
200 100
VGS = 0V
120
ID, DRAIN CURRENT (A)
VDS = 5V
10 1 0.1
TJ = 150oC TJ = 25oC
90 60
TJ = 150oC
TJ = -55oC
30
TJ = 25oC TJ = -55oC
0.01
0
1
2
3
4
5
0.001 0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
©2008 Fairchild Semiconductor Corporation FDMS8674 Rev.C1
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FDMS8674 N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE(V) ID = 17A
3000
Ciss
8 6
VDD = 15V VDD = 20V
CAPACITANCE (pF)
VDD = 10V
1000
Coss
4 2 0 0 4 8 12 16 20 24 28
Qg, GATE CHARGE(nC)
Crss
100
50 0.1
f = 1MHz VGS = 0V
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
100
ID, DRAIN CURRENT (A)
30
IAS, AVALANCHE CURRENT(A)
80 60
VGS = 10V
10
TJ = 25oC TJ = 125oC
40
Limited by Package VGS = 4.5V
20
RθJC = 1.6 C/W
o
1 0.01
0.1
1
10
100 300
0 25
50
75
100
o
125
150
tAV, TIME IN AVALANCHE(ms)
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive Switching Capability
300
P(PK), PEAK TRANSIENT POWER (W)
Figure 10. Maximum Continuous Drain Current vs Case Temperature
500
VGS = 10V
100µs
SINGLE PULSE RθJA = 125oC/W TA = 25oC
100
ID, DRAIN CURRENT (A)
100
10
THIS AREA IS LIMITED BY rDS(on)
1ms 10ms
1
100ms 1s 10s DC
10
0.1
SINGLE PULSE TJ = MAX RATED RθJA = 125oC/W TA = 25oC
1 0.5 -3 10 10
-2
0.01 0.01
0.1
1
10
100
10
-1
10
0
10
1
10
2
10
3
VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (s)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power Dissipation
©2008 Fairchild Semiconductor Corporation FDMS8674 Rev.C1
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FDMS8674 N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
2
1
NORMALIZED THERMAL IMPEDANCE, ZθJA
DUTY CYCLE-DESCENDING ORDER
0.1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
0.01
SINGLE PULSE RθJA = 125 C/W
o
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA
0.001 -3 10
10
-2
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation FDMS8674 Rev.C1
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FDMS8674 N-Channel PowerTrench® MOSFET
www.fairchildsemi.com
©2008 Fairchild Semiconductor Corporation FDMS8674 Rev.C1
6
FDMS8674 N-Channel PowerTrench® MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx® Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EfficentMax™ EZSWITCH™ *
™
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Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® *
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®
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PDP-SPM™ Power-SPM™ PowerTrench® Programmable Active Droop™ QFET® QS™ Quiet Series™ RapidConfigure™ Saving our world 1mW at a time™ SmartMax™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SuperMOS™ ®
The Power Franchise®
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TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ µSerDes™
UHC® Ultra FRFET™ UniFET™ VCX™ VisualMax™
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LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. This datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I34
Preliminary
First Production
No Identification Needed Obsolete
Full Production Not In Production
©2008 Fairchild Semiconductor Corporation FDMS8674 Rev.C1
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