FDP20N50

FDP20N50 500V N-Channel MOSFET May 2006 FDP20N50 500V N-Channel MOSFET Features • 20A, 500V, RDS(on) = 0.23Ω @VGS = 10 V • Low gate charge ( typical 45.6 nC) • Low Crss ( typical 27 pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability UniFET Description TM These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction. D G GDS TO-220 FDP Series S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) - Derate above 25°C (Note 2) (Note 1) (Note 1) (Note 3) Parameter - Continuous (TC = 25°C) - Continuous (TC = 100°C) - Pulsed (Note 1) FDP20N50 500 20 12.9 80 ± 30 1110 20 25.0 4.5 250 2.0 -55 to +150 300 Unit V A A A V mJ A mJ V/ns W W/°C °C °C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds * Drain current limited by maximum junction termperature. Thermal Characteristics Symbol RθJC RθCS RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Thermal Resistance, Junction-to-Ambient Min. -0.5 -- Max. 0.5 -62.5 Unit °C/W °C/W °C/W ©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDP20N50 Rev. A1 FDP20N50 500V N-Channel MOSFET Package Marking and Ordering Information Device Marking FDP20N50 Device FDP20N50 Package TO-220 TC = 25°C unless otherwise noted Reel Size -- Tape Width -- Quantity 50 Electrical Characteristics Symbol Off Characteristics BVDSS ΔBVDSS / ΔTJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS ISM VSD trr Qrr NOTES: Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Conditions VGS = 0V, ID = 250μA, TJ = 25°C ID = 250μA, Referenced to 25°C VDS = 500V, VGS = 0V VDS = 400V, TC = 125°C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250μA VGS = 10V, ID = 10A VDS = 40V, ID = 10A VDS = 25V, VGS = 0V, f = 1.0MHz (Note 4) Min 500 -----3.0 ------ Typ -0.50 -----0.20 24.6 2400 355 27 95 375 100 105 45.6 14.8 21.6 Max Units --1 10 100 -100 5.0 0.23 -3120 465 -200 760 210 220 59.5 --V V/°C μA μA nA nA V Ω S pF pF pF ns ns ns ns nC nC nC On Characteristics Dynamic Characteristics Switching Characteristics VDD = 250V, ID = 20A RG = 25Ω (Note 4, 5) ------(Note 4, 5) VDS = 400V, ID = 20A VGS = 10V -- Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 20A VGS = 0V, IS = 20A dIF/dt =100A/μs (Note 4) ------ ---507 7.20 20 80 1.4 --- A A V ns μC 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 5.0mH, IAS = 20A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C 3. ISD ≤ 20A, di/dt ≤ 200A/μs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2% 5. Essentially Independent of Operating Temperature Typical Characteristics FDP20N50 Rev. A1 2 www.fairchildsemi.com FDP20N50 500V N-Channel MOSFET Typical Performance Characteristics Figure 1. On-Region Characteristics 10 2 Figure 2. Transfer Characteristics ID, Drain Current [A] ID, Drain Current [A] 10 1 VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top : 150 C 1 o 10 25 C o -55 C o 10 0 ∝ Notes : 1. 250レs Pulse Test 2. TC = 25∩ ∝ Notes : 1. VDS = 40V 2. 250レ Pulse Test s 10 -1 10 0 10 1 10 0 2 4 6 8 10 12 VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue 0.8 RDS(ON) [ヘ ], Drain-Source On-Resistance 0.6 VGS = 10V 0.4 IDR, Reverse Drain Current [A] 10 1 150∩ 25∩ VGS = 20V 0.2 ∝ Note : TJ = 25∩ ∝ Notes : 1. VGS = 0V s 2. 250レ Pulse Test 0.0 0 15 30 45 60 75 90 10 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 5. Capacitance Characteristics 6000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Figure 6. Gate Charge Characteristics 12 VDS = 100V VGS, Gate-Source Voltage [V] 5000 10 VDS = 250V VDS = 400V Coss Capacitances [pF] 4000 8 Ciss 3000 6 2000 1000 Crss * Note : 1. VGS = 0 V 2. f = 1 MHz 4 2 ∝ Note : ID = 20A 0 -1 10 10 0 10 1 0 0 10 20 30 40 50 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] FDP20N50 Rev. A1 3 www.fairchildsemi.com FDP20N50 500V N-Channel MOSFET Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation vs. Temperature 1.2 Figure 8. On-Resistance Variation vs. Temperature 3.0 3.0 BVDSS, (Normalized) Drain-Source Breakdown Voltage Drain-Source On-Resistance 1.1 RDS(ON), (Normalized) RDS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.5 2.0 2.0 1.5 1.0 1.5 1.0 * Notes : 1. VGS = 10 V 2. ID = 5.5 A 1.0 0.5 0.9 ∝ Notes : 1. VGS = 0 V A 2. ID = 250 レ 0.5 0.0 -100 -50 0 50 100 o ∝ Notes : 1. VGS = 10 V 2. ID = 10 A 150 200 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 TJ, Junction Temperature [ C] 0 50 100 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] o Figure 9. Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature 25 10 2 10 μs 20 ID, Drain Current [A] 1 ms 10 1 ID, Drain Current [A] 10 3 100 μs 10 ms 100 ms DC 15 Operation in This Area is Limited by R DS(on) 10 10 0 ∝ Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 5 10 -1 10 0 10 1 10 2 0 25 50 75 100 125 150 VDS, Drain-Source Voltage [V] TC, Case Temperature [∩ ] Figure 11. Transient Thermal Response Curve 10 0 Zヨ JC Thermal Response (t), D = 0 .5 0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1 s in g le p u ls e 10 -1 PDM t1 t2 10 -2 ∝ N o te s : 1 . Z θ J C ( t) = 0 .5 ∩ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z q J C ( t) 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] FDP20N50 Rev. A1 4 www.fairchildsemi.com FDP20N50 500V N-Channel MOSFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms FDP20N50 Rev. A1 5 www.fairchildsemi.com FDP20N50 500V N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms FDP20N50 Rev. A1 6 www.fairchildsemi.com FDP20N50 500V N-Channel MOSFET Mechanical Dimensions TO-220 9.90 ±0.20 1.30 ±0.10 2.80 ±0.10 (8.70) ø3.60 ±0.10 (1.70) 4.50 ±0.20 1.30 –0.05 +0.10 9.20 ±0.20 (1.46) 13.08 ±0.20 (1.00) (3.00) 15.90 ±0.20 1.27 ±0.10 1.52 ±0.10 0.80 ±0.10 2.54TYP [2.54 ±0.20] 2.54TYP [2.54 ±0.20] 10.08 ±0.30 18.95MAX. (3.70) (45° ) 0.50 –0.05 +0.10 2.40 ±0.20 10.00 ±0.20 Dimensions in Millimeters FDP20N50 Rev. A1 7 www.fairchildsemi.com FDP20N50 500V N-Channel MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FAST® ACEx™ ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ 2 E CMOS™ i-Lo™ ImpliedDisconnect™ EnSigna™ IntelliMAX™ FACT™ FACT Quiet Series™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ μSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UniFET™ UltraFET® VCX™ Wire™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I19 Preliminary No Identification Needed Full Production Obsolete Not In Production 8 FDP20N50 Rev. A1 www.fairchildsemi.com