April 1998
FDR4410 N-Channel Enhancement Mode Field Effect Transistor
General Description
The FDR4410 has been designed as a smaller, low cost alternative to the popular Si4410DY. The SuperSOTTM-8 package is 40% smaller than the SO-8 package. The SuperSOTTM-8 advanced package design and optimized pinout allow the typical power dissipation to be similar to the bigger SO-8 package.
Features
9.3 A, 30 V. RDS(ON) = 0.013 Ω @ VGS = 10 V RDS(ON) = 0.020 Ω @ VGS = 4.5 V. High density cell design for extremely low RDS(ON). Proprietary SuperSOTTM-8 small outline surface mount package with high power and current handling capability.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
S
D
D
S
5 6 7
4 3 2 1
10 44
D G
pin 1
SuperSOT -8
TM
D
D
8
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Draint Current - Continuous - Pulsed Maximum Power Dissipation
TA = 25oC unless otherwise noted FDR4410 30 ±20
(Note 1a)
Units V V A
9.3 40
(Note 1a)
(Note 1b) (Note 1c)
1.8 1 0.9 -55 to 150
W
TJ,TSTG RθJA RθJC
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
70 20
°C/W °C/W
FDR4410 Rev.C
© 1998 Fairchild Semiconductor Corporation
Electrical Characteristics
Symbol Parameter OFF CHARACTERISTICS BVDSS
(TA = 25OC unless otherwise noted )
Conditions Min Typ Max Units
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25 oC VDS = 24 V, VGS = 0 V TJ = 55°C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25 oC VGS = 10 V, ID = 9.3 A TJ =125°C VGS = 4.5 V, ID = 5 A
30 35 1 25 100 -100
V mV/oC µA µA nA nA
∆BVDSS/∆TJ
IDSS IGSS IGSS VGS(th)
Gate - Body Leakage Current Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temp.Coefficient Static Drain-Source On-Resistance 1 1.5 -4.4 0.011 0.017 0.016 20 25 0.013 0.02 0.02 A S 2 V mV/oC
∆VGS(th)/∆TJ
RDS(ON)
Ω
ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD
On-State Drain Current Forward Transconductance
VGS = 10 V, VDS = 5 V VDS = 10 V, ID = 9.3 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz
DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 1170 627 180 pF pF pF
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 15 V, ID = 9.3 A, VGS = 10 V VDD = 25 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 12 11 41 34 36 4.5 10 22 20 66 55 50 ns ns ns ns nC nC nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.5 A
(Note 2)
1.5 0.72 1.2
A V
Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. RθJA shown below for single device operation on FR-4 board in still air.
a. 70OC/W on a 1 in2 pad of 2oz copper.
b. 125OC/W on a 0.026 in2 o f pad of 2oz copper.
c. 135OC/W on a 0.005 in2 o f pad of 2oz copper.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDR4410 Rev.C
Typical Electrical Characteristics
I D , DRAIN-SOURCE CURRENT (A) DRAIN-SOURCE ON-RESISTANCE 50 3
R DS(ON), NORMALIZED
40
VGS = 10V 6.0 5.0 4.5 4.0
2.5
VGS = 3.5V
30
2
4.0 4.5 5.0 6.0 10
20
3.5
1.5
10
1
3.0
0
0.5 0 0.5 V
DS
1
1.5
2
2.5
3
0
10
20
30
40
50
, DRAIN-SOURCE VOLTAGE (V)
ID , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE R DS(ON) , ON-RESISTANCE (OHM)
0.06
1.4
I D =9.3A V GS =10V
I D = 5A
0.05 0.04 0.03 0.02 0.01 0
R DS(ON) , NORMALIZED
1.2
1
TA= 125°C T = 25°C A
2 4 V
GS
0.8
0.6 -50
-25
0 25 50 75 100 T , JUNCTION TEMPERATURE (°C)
J
125
150
6
8
10
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
50
25°C 125°C
I S , REVERSE DRAIN CURRENT (A)
VDS = 10V
ID , DRAIN CURRENT (A) 40
T = -55°C J
50 10 1 0.1 0.01 0.001 0.0001
VGS = 0V TJ = 125°C 25°C -55°C
30
20
10
0
1
1.5
2
2.5
3
3.5
4
4.5
5
0
VGS , GATE TO SOURCE VOLTAGE (V)
0.3 0.6 0.9 1.2 VSD , BODY DIODE FORWARD VOLTAGE (V)
1.5
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDR4410 Rev.C
Typical Electrical Characteristics (continued)
10 VGS , GATE-SOURCE VOLTAGE (V)
I D = 9.3A
8
3000
V DS =10V 15V 20V
CAPACITANCE (pF)
2000
Css i
1000
6
Coss
500 300 200
4
2
100 0.1
f = 1 MHz V GS = 0 V
0.2 0.5 1 2 5 10
Crss
0
20
30
0
10
20 Q g , GATE CHARGE (nC)
30
40
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
80 20 I D , DRAIN CURRENT (A) 5 1 0.5
IT LIM N) S(O RD
50
100
1m s 10m s 100 ms 1s 10s DC
µs
40 POWER (W)
SINGLE PULSE R θJA =See Note 1c T = 25°C A
30
0.1 0.03 0.01 0.1
VGS = 10V SINGLE PULSE RθJA = See Note 1c TA = 25°C
A
20
10
0.2
0.5
1
3
5
10
30
50
0 0.0001
0.001
0.01
0.1
1
10
100 300
VDS , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
0.5 0.3 0.2 0.1 0.05 0.03 0.02 0.01 0.0001
D = 0.5
0.2 0.1 0.05 0.02 0.01 Single Pulse
RθJA (t) = r(t) * RθJA R θJA = See Note 1c
P(pk)
t1
t2
TJ - TA = P * R JA(t) θ Duty Cycle, D = t 1 / t 2
0.01 0.1 t 1, TIME (sec) 1 10 100 300
0.001
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1c. Transient thermalresponse will change depending on the circuit board design.
FDR4410 Rev.C