FDS6064N7

FDS6064N7 May 2003 FDS6064N7 20V N-Channel PowerTrench MOSFET General Description This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for “low side” synchronous rectifier operation, providing an extremely low RDS(ON) in a small package. Features • 23 A, 20 V. RDS(ON) RDS(ON) RDS(ON) = 3.5 mΩ @ VGS = 4.5 V = 4 mΩ @ VGS = 2.5 V = 6 mΩ @ VGS = 1.8 V • High performance trench technology for extremely low RDS(ON) • High power and current handling capability • Fast switching, low gate charge • FLMP SO-8 package: Enhanced thermal performance in industry-standard package size Applications • Synchronous rectifier • DC/DC converter 5 6 7 8 Bottom-side Drain Contact 4 3 2 1 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Power Dissipation TA=25oC unless otherwise noted Parameter Ratings 20 ±8 (Note 1a) Units V A W °C 23 60 3.0 –55 to +150 (Note 1a) Operating and Storage Junction Temperature Range Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) 40 0.5 °C/W Package Marking and Ordering Information Device Marking FDS6064N7 Device FDS6064N7 Reel Size 13’’ Tape width 12mm Quantity 2500 units 2002 Fairchild Semiconductor Corporation FDS6064N7 Rev D2 (W) FDS6064N7 Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSSF IGSSR VGS(th) ∆VGS(th) ∆TJ RDS(on) TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, Forward Gate–Body Leakage, Reverse (Note 2) Test Conditions ID = 250 µA VGS = 0 V, ID = 250 µA, Referenced to 25°C VDS = 16 V, VGS = 8 V, VGS = –8 V , VGS = 0 V VDS = 0 V VDS = 0 V Min 20 Typ Max Units V Off Characteristics 11 1 100 –100 0.4 0.6 –3 2.2 2.7 3.4 3 179 7191 1403 703 VGS = 15 mV, (Note 2) mV/°C µA nA nA V mV/°C 3.5 4 6 5 mΩ On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = 250 µA VDS = VGS, ID = 250 µA, Referenced to 25°C VGS = 4.5 V, ID = 23 A ID = 22 A VGS = 2.5 V, ID = 18 A VGS = 1.8 V, VGS = 4.5 V, ID = 23 A,TJ = 125°C VDS = 5 V, ID = 2 3 A VDS = 10 V, f = 1.0 MHz V G S = 0 V, 1.5 gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr Notes: Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge S pF pF pF Ω 35 35 245 123 98 ns ns ns ns nC nC nC 2.5 1.2 A V nS nC Dynamic Characteristics f = 1.0 MHz ID = 1 A, RGEN = 6 Ω 1.2 22 22 153 77 Switching Characteristics VDD = 10 V, VGS = 4.5 V, VDS = 10 V, VGS = 4.5 V ID = 23 A, 70 10 15 Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 2.5 A Voltage IF = 23 A, Diode Reverse Recovery Time Diode Reverse Recovery Charge diF/dt = 100 A/µs (Note 2) 0.6 43 55 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 40°C/W when mounted on a 1in2 pad of 2 oz copper b) 85°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS6064N7 Rev D2 (W) FDS6064N7 Typical Characteristics 100 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.4 VGS = 4.5V ID, DRAIN CURRENT (A) 80 2.0V 1.8V 1.5V 2.5V 2.2 VGS = 1.5V 2 1.8 1.6 1.4 1.2 1 0.8 60 1.8V 2.0V 2.5V 3.0V 4.5V 40 20 0 0.0 0.5 1.0 1.5 0 20 40 60 80 100 VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.009 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 23A VGS = 4.5V ID = 11.5A 0.007 1.4 1.2 0.005 1 TA = 125oC 0.003 0.8 TA = 25oC 0.001 0.6 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation withTemperature. 80 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 IS, REVERSE DRAIN CURRENT (A) VGS = 0V VDS = 5V ID, DRAIN CURRENT (A) 60 10 TA = 125 C o 1 25 C o 40 0.1 0.01 0.001 0.0001 -55 C o TA =125 C 20 o 25 C -55 C 0 0.5 0.7 0.9 1.1 1.3 1.5 VGS, GATE TO SOURCE VOLTAGE (V) o o 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6064N7 Rev D2 (W) FDS6064N7 Typical Characteristics 5 VGS, GATE-SOURCE VOLTAGE (V) 10000 ID = 4 VDS = 5V 15V 10V 8000 CAPACITANCE (pF) CISS 6000 f = 1MHz VGS = 0 V 3 2 4000 COSS 2000 CRSS 0 5 10 15 20 1 0 0 15 30 45 60 75 90 Qg, GATE CHARGE (nC) 0 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 1000 P(pk), PEAK TRANSIENT POWER (W) Figure 8. Capacitance Characteristics. 50 ID, DRAIN CURRENT (A) 100 RDS(ON) LIMIT 1ms 10ms 100ms 1s 10s DC VGS = 4.5V SINGLE PULSE RθJA = 85oC/W TA = 25oC 100µs 40 SINGLE PULSE RθJA = 85°C/W TA = 25°C 10 30 1 20 0.1 10 0.01 0.01 0.1 1 10 100 0 0.01 0.1 1 10 100 1000 VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 RθJA(t) = r(t) * RθJA RθJA = 85 °C/W P(pk) t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDS6064N7 Rev D2 (W) FDS6064N7 Dimensional Outline and Pad Layout FDS6064N7 Rev D2 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT™ ActiveArray™ FACT Quiet Series™ Bottomless™ FASTâ CoolFET™ FASTr™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ DISCLAIMER ImpliedDisconnect™ PACMAN™ POP™ ISOPLANAR™ Power247™ LittleFET™ PowerTrenchâ MicroFET™ QFET™ MicroPak™ QS™ MICROWIRE™ QT Optoelectronics™ MSX™ Quiet Series™ MSXPro™ RapidConfigure™ OCX™ RapidConnect™ OCXPro™ SILENT SWITCHERâ OPTOLOGICâ SMART START™ OPTOPLANAR™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogicâ TruTranslation™ UHC™ UltraFETâ VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I2