FDS6912A

June 1998 FDS6912A Dual N-Channel, Logic Level, PowerTrenchTM MOSFET General Description Features 6 A, 30 V. RDS(ON) = 0.028 Ω @ VGS = 10 V RDS(ON) = 0.035 Ω @ VGS = 4.5 V. Fast switching speed. Low gate charge (typical 9 nC). High performance trench technology for extremely low RDS(ON). High power and current handling capability. These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 D2 D1 D1 D2 S FD 2A 1 69 G1 S2 G2 5 6 7 8 4 3 2 1 SO-8 pin 1 S1 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA = 25oC unless other wise noted FDS6912A 30 ±20 (Note 1a) Units V V A 6 20 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) 2 1.6 0.9 -55 to 150 W TJ,TSTG RθJA RθJC Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W © 1998 Fairchild Semiconductor Corporation FDS6912A Rev.C Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current VGS = 0 V, I D = 250 µA ID = 250 µA, Referenced to 25 C VDS = 24 V, VGS = 0 V TJ = 55°C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse (Note 2) o 30 23 1 10 100 -100 V mV /oC µA µA nA nA ∆BVDSS/∆TJ IDSS VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25 C VGS = 10 V, I D = 6 A TJ =125°C VGS = 4.5 V, I D = 5 A o ON CHARACTERISTICS Gate Threshold Voltage Gate Threshold Voltage Temp. Coefficient Static Drain-Source On-Resistance 1 1.5 -4 0.023 0.036 0.029 3 V mV /oC ∆VGS(th)/∆TJ RDS(ON) 0.028 0.044 0.035 Ω ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD Notes: On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VGS = 10 V, VDS = 5 V VDS = 15 V, I D= 6 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz 20 18 830 185 80 A S pF pF pF 12 18 29 12 13 ns ns ns ns nC nC nC 1.3 A V DYNAMIC CHARACTERISTICS SWITCHING CHARACTERISTICS Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS= 15 V, I D = 1 A VGS = 10 V , RGEN = 6 Ω 6 10 18 5 VDS = 15 V, I D = 7.5 A, VGS = 5 V 9 2.8 3.1 DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A (Note 2) 0.73 1.2 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78OC/W on a 0.5 in2 pad of 2oz copper. b. 125OC/W on a 0.02 in2 pad of 2oz copper. c. 135OC/W on a 0.003 in2 pad of 2oz copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. FDS6912A Rev.C Typical Electrical Characteristics 40 I D , DRAIN-SOURCE CURRENT (A) 5 24 3.5V RDS(ON) , NORMALIZED 32 5.5V 4.5V 4.0V DRAIN-SOURCE ON-RESISTANCE VGS =10V 4 V GS = 2.5V 3 3.0 V 2 16 3.0V 8 3.5 V 4.5 V 10V 1 2.5V 0 0 1 2 3 4 0 0 6 12 18 24 30 VDS , DRAIN-SOURCE VOLTAGE (V) I D , DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 DRAIN-SOURCE ON-RESISTANCE 0.15 1.4 I D = 6A VGS = 10V R DS(ON) , ON-RESISTANCE (OHM) ID = 3A 0.12 RDS(ON) , NORMALIZED 1.2 0.09 1 0.06 TA = 125°C 0.03 0.8 25°C 0 0 2 4 6 8 10 0.6 -50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C) J V GS , GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation Temperature. with Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 25 20 V DS =5.0V I D , DRAIN CURRENT (A) 20 I S , REVERSE DRAIN CURRENT (A) TJ = -55°C 25°C 125°C VGS = 0V TJ = 125°C 25°C 0.1 1 15 10 -55°C 0.01 5 0 0.001 1 2 3 4 5 0 VGS , GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1 1.2 V SD, BODY DIODE FORWARD VOLTAGE (V) 1.4 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6912A Rev.C Typical Electrical Characteristics 10 VGS , GATE-SOURCE VOLTAGE (V) 1500 I D = 6A 8 V DS = 5V 10V CAPACITANCE (pF) C iss 500 15V 6 200 100 50 Coss 4 2 f = 1 MHz V GS = 0 V 0.2 0.5 1 2 5 C rss 0 0.1 10 30 0 3 6 9 12 15 18 VDS , DRAIN TO SOURCE VOLTAGE (V) Q g , GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 100 50 I D , DRAIN CURRENT (A) 10 2 0.5 (O DS N) LIM 30 IT 100 1m 10m s us POWER (W) 25 20 15 10 5 0 0.01 R SINGLE PULSE R θJA =135 °C/W TA = 25°C 10 1s 10s DC s 0m s 0.05 0.01 0.1 VGS =10V SINGLE PULSE RθJA = 135°C/W A TA = 25°C 0.5 1 2 5 10 30 50 0.1 0.5 10 50 100 300 VDS , DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 0.001 0.01 0.1 t1 , TIME (sec) 1 10 D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk) R θJA (t) = r(t) * R θJA R θJA =135° C/W t1 t2 TJ - TA = P * R JA (t) θ Duty Cycle, D = t1 /t2 100 300 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. FDS6912A Rev.C