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FDS6982AS_08

FDS6982AS_08

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FDS6982AS_08 - Dual Notebook Power Supply N-Channel PowerTrench® SyncFET™ - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FDS6982AS_08 数据手册
FDS6982AS May 2008 FDS6982AS General Description The FDS6982AS is designed to replace two single SO8 MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6982AS contains two unique 30V, N-channel, logic level, PowerTrench MOSFETs designed to maximize power conversion efficiency. The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the low-side switch (Q2) is optimized to reduce conduction losses. Q2 also includes an integrated Schottky diode using Fairchild’s monolithic SyncFET technology. tmM Dual Notebook Power Supply N-Channel PowerTrench SyncFET Features • Q2: ® ™ Optimized to minimize conduction losses Includes SyncFET Schottky body diode RDS(on) max= 13.5mΩ @ VGS = 10V RDS(on) max= 16.5mΩ @ VGS = 4.5V 8.6A, 30V • • Low gate charge (21nC typical) Q1: Optimized for low switching losses RDS(on) max= 28.0mΩ @ VGS = 10V RDS(on) max= 35.0mΩ @ VGS = 4.5V 6.3A, 30V Applications • Notebook • Low gate charge (11nC typical) D1 D1 D2 D2 S1 G1 5 6 7 Q1 4 3 2 Q2 SO-8 S2 8 1 G2 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current TA = 25°C unless otherwise noted Parameter Q2 30 (Note 1a) Q1 30 ±20 6.3 20 2 1.6 1 0.9 –55 to +150 Units V V A W - Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation ±20 8.6 30 (Note 1a) (Note 1b) (Note 1c) TJ, TSTG Operating and Storage Junction Temperature Range °C Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W Package Marking and Ordering Information Device Marking FDS6982AS Device FDS6982AS Reel Size 13” Tape width 12mm Quantity 2500 units ©2008 Fairchild Semiconductor Corporation FDS6982AS Rev B1 FDS6982AS Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS TA = 25°C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = 1 mA ID = 250 uA VGS = 0 V, ID = 1 mA, Referenced to 25°C ID = 250 µA, Referenced to 25°C VDS = 24 V, VGS = 0 V VGS = ±20 V, VDS = 0 V Type Min Typ Max Units Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 30 20 30 30 V 28 24 500 1 ±100 mV/°C µA nA Off Characteristics On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance VDS = VGS, VDS = VGS, ID = 1 mA ID = 250 µA 1 1 1.4 1.9 –3.1 –4.3 11 16 13 20 26 25 3 3 V mV/°C ID = 1 mA, Referenced to 25°C ID = 250 uA, Referenced to 25°C VGS = 10 V, ID = 8.6 A VGS = 10 V, ID = 8.6 A, TJ = 125°C VGS = 4.5 V, ID = 7.5 A VGS = 10 V, ID = 6.3 A VGS = 10 V, ID = 6.3 A, TJ = 125°C VGS = 4.5 V, ID = 5.6 A VGS = 10 V, VDS = 5 V VDS = 5 V, VDS = 5 V, VDS = 10 V, f = 1.0 MHz ID = 8.6 A ID = 6.3 A VGS = 0 V, 13.5 20.0 16.5 28 33 35 mΩ ID(on) gFS On-State Drain Current Forward Transconductance A S 32 19 1250 610 410 180 130 85 1.4 2.2 Dynamic Characteristics Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VGS = 15mV, f = 1.0 MHz pF pF pF Ω Switching Characteristics td(on) tr td(off) tf td(on) tr td(off) tf Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time (Note 2) VDD = 15 V, ID = 1 A, VGS = 10V, RGEN = 6 Ω VDD = 15 V, ID = 1 A, VGS = 4.5V, RGEN = 6 Ω Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 9 10 6 7 27 24 11 3 12 12 13 14 19 15 10 5 18 20 12 14 44 39 20 6 22 22 23 25 34 27 20 10 ns ns ns ns ns ns ns ns FDS6982AS Rev B1 FDS6982AS Electrical Characteristics Symbol Parameter (continued) TA = 25°C unless otherwise noted Test Conditions (Note 2) Type Min Typ Max Units Switching Characteristics Qg(TOT) Qg Qgs Qgd Total Gate Charge at Vgs=10V Total Gate Charge at Vgs=5V Gate–Source Charge Gate–Drain Charge Q2: VDS = 15 V, ID = 11.5A Q1: VDS = 15 V, ID = 6.3A Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 (Note 3) (Note 2) (Note 2) (Note 2) 21 11 12 6 3.1 1.8 3.6 2.4 30 15 16 9 nC nC nC nC Drain–Source Diode Characteristics and Maximum Ratings IS Trr Qrr Trr Qrr VSD Maximum Continuous Drain-Source Diode Forward Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Time Reverse Recovery Charge Drain-Source Diode Forward Voltage IF = 11.5 A, diF/dt = 300 A/µs IF = 6.3 A, diF/dt = 100 A/µs VGS = 0 V, IS = 3 A VGS = 0 V, IS = 6 A VGS = 0 V, IS = 1.3 A 3.0 1.3 19 12 20 9 0.5 0.6 0.8 0.7 1.0 1.2 A ns nC ns nC V (Note 3) Q2 Q2 Q1 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when mounted on a 2 0.5in pad of 2 oz copper b) 125°C/W when mounted on a 0.02 in2 pad of 2 oz copper c) 135°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. See “SyncFET Schottky body diode characteristics” below. 4 5 FDS6982AS Rev B1 FDS6982AS Typical Characteristics: Q2 30 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V 3.0V 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 VGS = 2.5V ID, DRAIN CURRENT (A) 4.5V 3.5V 20 3.0V 3.5V 4.0V 10 2.5V 4.5V 6.0V 10V 0 0 0.5 1 1.5 VDS, DRAIN-SOURCE VOLTAGE (V) 2 10 20 ID, DRAIN CURRENT (A) 30 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.05 RDS(ON), ON-RESISTANCE (OHM) 1.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 8.6A VGS = 10V 1.2 ID = 4.3 A 0.04 0.03 TA = 125 C 0.02 o 1 0.8 0.01 T A = 25 C o 0.6 -50 -25 0 25 50 75 o TJ, JUNCTION TEMPERATURE ( C) 100 125 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation with Temperature. 30 VDS = 5V 25 ID, DRAIN CURRENT (A) 20 15 10 5 0 1 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) 3.5 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 VGS = 0V IS, REVERSE DRAIN CURRENT (A) 1 TA = 125 C 25 C o o TA = 125 C -55oC o 0.1 -55oC 25oC 0.01 0 0.2 0.4 0.6 VSD, BODY DIODE FORWARD VOLTAGE (V) 0.8 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6982AS Rev B1 FDS6982AS Typical Characteristics: Q2 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 8.6A 8 VDS = 10V 20V 15V 2000 f = 1MHz VGS = 0 V 1600 CAPACITANCE (pF) 6 1200 Ciss 4 800 Coss 400 Crss 2 0 0 5 10 15 Qg, GATE CHARGE (nC) 20 25 0 0 5 10 15 20 25 VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Figure 7. Gate Charge Characteristics. 100 100µs 1ms 10ms 100ms 1s 10s DC 0.1 VGS = 10V SINGLE PULSE RθJA = 135oC/W T A = 25 C 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 o Figure 8. Capacitance Characteristics. 50 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 40 SINGLE PULSE RθJA = 135°C/W TA = 25°C 30 1 20 10 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE RθJA(t) = r(t) * RθJA RθJA = 135°C/W P(pk) t1 t2 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6982AS Rev B1 FDS6982AS Typical Characteristics Q1 20 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V 4.0V 3.5V 2.6 VGS = 3.0V ID, DRAIN CURRENT (A) 16 6.0V 2.2 12 4.5V 1.8 3.5V 8 3.0V 1.4 4.0V 4.5V 6.0V 4 1 10V 0 0 1 VDS, DRAIN-SOURCE VOLTAGE (V) 2 0.6 0 5 10 ID, DRAIN CURRENT (A) 15 20 Figure 12. On-Region Characteristics. Figure 13. On-Resistance Variation with Drain Current and Gate Voltage. 0.1 ID = 3.15 A RDS(ON), ON-RESISTANCE (OHM) 0.08 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 6.3A VGS = 10V 1.4 1.2 0.06 TA = 125 C o 1 0.04 0.8 0.02 TA = 25oC 0.6 -50 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 14. On-Resistance Variation with Temperature. 20 Figure 15. On-Resistance Variation with Gate-to-Source Voltage. 100 IS, REVERSE DRAIN CURRENT (A) VDS = 5V VGS = 0V 10 1 0.1 0.01 0.001 TA = 125 C 25oC -55 C o o ID, DRAIN CURRENT (A) 15 10 TA = 125 C -55 C o o 5 25oC 0 1 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) 3.5 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.4 Figure 16. Transfer Characteristics. Figure 17. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6982AS Rev B1 FDS6982AS Typical Characteristics Q1 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 6.3A 8 VDS = 10V 6 15V 20V CAPACITANCE (pF) 800 f = 1MHz VGS = 0 V 600 Ciss 400 Coss 200 Crss 4 2 0 0 3 6 Qg, GATE CHARGE (nC) 9 12 0 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 Figure 18. Gate Charge Characteristics. 100 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 1ms 10ms 100ms 1s 10s VGS = 10V SINGLE PULSE o RθJA = 135 C/W TA = 25oC DC 100µs P(pk), PEAK TRANSIENT POWER (W) 50 Figure 19. Capacitance Characteristics. 40 SINGLE PULSE RθJA = 135°C/W TA = 25°C 30 1 20 0.1 10 0.01 0.1 1 10 100 0 0.001 0.01 0.1 VDS, DRAIN-SOURCE VOLTAGE (V) 1 t1, TIME (sec) 10 100 1000 Figure 20. Maximum Safe Operating Area. Figure 21. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE RθJA(t) = r(t) * RθJA RθJA = 135°C/W P(pk) t1 t2 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 22. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6982AS Rev B1 FDS6982AS Typical Characteristics (continued) SyncFET Schottky Body Diode Characteristics Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 23 shows the reverse recovery characteristic of the FDS6982AS. Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. 0.1 IDSS, REVERSE LEAKAGE CURRENT (A) TA = 125oC 0.01 0.001 TA = 100oC Current: 1.6A/DIV 0.0001 0.00001 TA = 25oC 0.000001 0 5 10 15 20 VDS, REVERSE VOLTAGE (V) 25 30 Figure 25. SyncFET body diode reverse leakage versus drain-source voltage and temperature Time: 10nS/DIV Figure 23. FDS6982AS SyncFET body diode reverse recovery characteristic. For comparison purposes, Figure 24 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6982). Current: 1.6A/DIV Time: 10nS/DIV Figure 24. Non-SyncFET (FDS6982) body diode reverse recovery characteristic. FDS6982AS Rev B1 FDS6982AS Typical Characteristics VDS RGE VGS L tP DUT + VDD IAS BVDSS VDS VDD VGS 0V tp vary tP to obtain required peak IAS IAS 0.01Ω tAV Figure 27. Unclamped Inductive Waveforms Figure 26. Unclamped Inductive Load Test Circuit Drain Current Same type as + - 10V 10µF 50kΩ 1µF + VDD DUT QG(TOT) 10V VGS QGS QGD VGS Ig(REF Charge, (nC) Figure 28. Gate Charge Test Circuit Figure 29. Gate Charge Waveform td(ON) VDS + DUT VDD 0V 90% tON tr 10% VDS VGS RGEN VGSPulse Width ≤ 1µs RL tOFF td(OFF tf ) 10% 90% 90% VGS 0V 10% 50% 50% Duty Cycle ≤ 0.1% Pulse Width Figure 30. Switching Time Test Circuit Figure 31. Switching Time Waveforms FDS6982AS Rev B1 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx® Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EfficentMax™ EZSWITCH™ * ™ ® Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® * FPS™ F-PFS™ FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® ® tm PDP-SPM™ Power-SPM™ PowerTrench® Programmable Active Droop™ QFET® QS™ Quiet Series™ RapidConfigure™ Saving our world 1mW at a time™ SmartMax™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SuperMOS™ ® The Power Franchise® tm TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ µSerDes™ UHC® Ultra FRFET™ UniFET™ VCX™ VisualMax™ * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. This datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I34 Preliminary First Production No Identification Needed Obsolete Full Production Not In Production FDS6982AS Rev.B1
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