FDS7079ZN3

FDS7079ZN3 February 2004 FDS7079ZN3 30 Volt P-Channel PowerTrench MOSFET General Description Advanced P Channel MOSFET combined with Advanced SO8 FLMP package providing a device with extremely low thermal impedance and improved electrical performance. Applications for this device include multi-cell battery protection and charging, including protection and load switching in notebook computer and notebook battery packs. Features • –16 A, –30 V. RDS(ON) = 7.5 mΩ @ VGS = –10 V RDS(ON) = 11.5 mΩ @ VGS = – 4.5 V • ESD protection diode (note 3) • ESD rating: 4kV • High performance trench technology for extremely low RDS(ON) • FLMP SO-8 package for enhanced thermal performance in industry-standard package size NC D N DC NC D N DC FLMP SO-8 D Bottom Side Drain Contact 5 6 4 3 2 1 Pin 1SO- G SG S S SS S TA=25oC unless otherwise noted 7 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Parameter Ratings –30 ±25 (Note 1a) Units V V A W °C –16 –60 3.13 1.5 –55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 40 0.5 °C/W Package Marking and Ordering Information Device Marking FDS7079ZN3 2004 Fairchild Semiconductor Corporation Device FDS7079ZN3 Reel Size 13’’ Tape width 12mm Quantity 2500 units FDS7079ZN3 Rev C1 (W) FDS7079ZN3 Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS VGS(th) ∆VGS(th) ∆TJ RDS(on) TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = –250 µA ID = –250 µA,Referenced to 25°C VDS = –24 V, VGS = 0 V VGS = ±25 V, VDS = 0 V ID = –250 µA VDS = VGS, ID = –250 µA,Referenced to 25°C VGS = –10 V, ID = –16 A VGS = –4.5 V, ID = –13 A VGS= –10 V, ID =–16A, TJ=125°C VDS = –10 V, ID = –16 A Min –30 Typ Max Units V Off Characteristics –20 –1 ±10 mV/°C µA µA On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance Forward Transconductance –1 –1.5 0.5 6.7 9.4 9.2 47 –3 V mV/°C 7.5 11.5 mΩ gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg Qgs Qgd IS VSD tRR QRR Notes: S Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) VDS = –15 V, V GS = 0 V, f = 1.0 MHz VGS = 15 mV, f = 1.0 MHz 3630 985 490 3.0 pF pF pF Ω 19 35 102 157 55 ns ns ns ns nC nC nC Switching Characteristics Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = –15 V, VGS = –10 V, ID = –1 A, RGEN = 6 Ω 10 20 64 98 VDS = –15 V, ID = –16 A, VGS = –5 V 39 10 15 Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = –2.5 A Voltage IF = –16 A, Reverse Recovery Time diF/dt = 100 A/µs Reverse Recovery Charge –2.5 (Note 2) A V ns nC –0.7 38 24 –1.2 (Note 2) 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 40°C/W when mounted on a 1in2 pad of 2 oz copper b) 85°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. FDS7079ZN3 Rev C1 (W) FDS7079ZN3 Typical Characteristics 60 50 -ID, DRAIN CURRENT (A) 2.8 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -10V -4.5V -3.5V 2.4 VGS = - 3.0V -6.0V 40 30 20 10 0 0 0.5 1 1.5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 2 2 -3.5V -4.0V -4.5V -3.0V 1.6 1.2 -6.0V -10V -2.5V 0.8 0 15 30 -ID, DRAIN CURRENT (A) 45 60 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.04 1.5 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 ID = -16A VGS = -10V ID = -8.0A RDS(ON), ON-RESISTANCE (OHM) 0.03 0.02 TA = 125 C 0.01 TA = 25 C o o 0.00 2 4 6 8 -VGS, GATE TO SOURCE VOLTAGE (V) 10 igure 3. On-Resistance Variation with Temperature. 60 50 -ID, DRAIN CURRENT (A) 40 30 20 -IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VDS = -5V VGS = 0V 10 1 TA = 125 C o TA = 125oC 25oC 0.1 25 C o 10 0.01 -55 C o -55oC 0 1.5 2 2.5 3 3.5 -VGS, GATE TO SOURCE VOLTAGE (V) 4 0.001 0 0.2 0.4 0.6 0.8 1 -VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS7079ZN3 Rev C1 (W) FDS7079ZN3 Typical Characteristics 10 5000 ID = -16A f = 1 MHz VGS = 0 V -VGS, GATE-SOURCE VOLTAGE (V) 8 4000 CAPACITANCE (pF) VDS = -10V -15V Ciss 6 -20V 3000 4 2000 Coss 2 1000 Crss 0 0 10 20 30 40 50 60 70 80 0 0 5 10 15 20 25 -VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 100 RDS(ON) LIMIT 100µs 1ms 10ms 100ms 1s 10s DC P(pk), PEAK TRANSIENT POWER (W) 50 Figure 8. Capacitance Characteristics. -ID, DRAIN CURRENT (A) 10 40 SINGLE PULSE RθJA = 85°C/W TA = 25°C 30 1 20 0.1 VGS = -10V SINGLE PULSE RθJA = 85oC/W T A = 25 C o 10 0.01 0.01 0.1 1 10 -VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RθJA(t) = r(t) * RθJA RθJA = 85 C/W P(pk) 0.01 o 0.1 0.1 0.05 0.02 t1 0.01 t2 SINGLE PULSE TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS7079ZN3 Rev C1 (W) FDS7079ZN3 Dimensional Outline and Pad Layout FDS7079ZN3 Rev C1 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ FACT™ ImpliedDisconnect™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I8