FDS7096N3
January 2004
FDS7096N3
30V N-Channel PowerTrench MOSFET
General Description
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed.
Features
• 14 A, 30 V RDS(ON) = 9 mΩ @ VGS = 10 V RDS(ON) = 12 mΩ @ VGS = 4.5 V • High performance trench technology for extremely low RDS(ON) • High power and current handling capability • Fast switching • FLMP SO-8 package: Enhanced thermal performance in industry-standard package size
Applications
• • • DC/DC converter Power management Load switch
5 6 7 8
Bottom-side Drain Contact
4 3 2 1
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed
TA=25oC unless otherwise noted
Parameter
Ratings
30 ±20
(Note 1a)
Units
V V A W °C
14 60 3.0 1.5 –55 to +150
Power Dissipation for Single Operation
(Note 1a) (Note 1b)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
40 0.5
°C/W
Package Marking and Ordering Information
Device Marking FDS7096N3
2004 Fairchild Semiconductor Corporation
Device FDS7096N3
Reel Size 13’’
Tape width 12mm
Quantity 2500 units
FDS7096N3 Rev E2 (W)
FDS7096N3
Electrical Characteristics
Symbol
BVDSS ∆BVDSS ∆TJ IDSS IGSS VGS(th) ∆VGS(th) ∆TJ RDS(on)
TA = 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage
(Note 2)
Test Conditions
ID = 250 µA VGS = 0 V, ID = 250 µA, Referenced to 25°C VDS = 24 V, VGS = ±20 V, VGS = 0 V VDS = 0 V
Min
30
Typ
Max Units
V
Off Characteristics
27 10 ±100 1 1.9 –6 7.5 9.5 11 62 3 mV/°C µA nA
On Characteristics
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance Forward Transconductance
ID = 250 µA VDS = VGS, ID = 250 µA, Referenced to 25°C VGS = 10 V, ID = 14 A ID = 13 A VGS = 4.5 V, VGS = 10 V, ID = 14 A,TJ = 125°C VDS = 10 V, ID = 14 A
V mV/°C
9 12 14
mΩ
gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg Qgs Qgd IS tRR QRR VSD
S
Dynamic Characteristics
Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance
(Note 2)
VDS = 15 V, f = 1.0 MHz
V G S = 0 V,
1587 385 154 1.4
pF pF pF Ω 20 23 43 27 22 ns ns ns ns nC nC nC
VGS = 15 mV, f = 1.0 MHz VDD = 15 V, VGS = 10 V, ID = 1 A, RGEN = 6 Ω
Switching Characteristics
Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge
11 13 27 15
VDS = 15 V, VGS = 5.0 V
ID = 14 A,
16 5 6
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current Reverse Recovery Time Reverse Recovery Charge Drain–Source Diode Forward Voltage IF = 14 A, diF/dt = 100 A/µs VGS = 0 V, IS = 2.5 A 16
(Note 2) (Note 2)
2.5 26 0.7 1.2
A ns nC V
Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
40°C/W when mounted on a 1in2 pad of 2 oz copper
b)
85°C/W when mounted on a minimum pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS7096N3 Rev E2 (W)
FDS7096N3
Typical Characteristics
60 50 ID, DRAIN CURRENT (A) 40 30 20 10 0 0
6.0V
3.5V
RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
VGS =10V
4.5V
2 1.8 VGS = 3.5V 1.6 1.4 1.2 1 0.8
4.0V 4.5V 5.0V 6.0V 10V
3.0V
0.5
1
1.5
2
2.5
0
10
20
30
40
50
60
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.022 RDS(ON), ON-RESISTANCE (OHM)
1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
ID = 14A VGS = 10V
ID = 7A
0.02 0.018 0.016 0.014 0.012 0.01 0.008 0.006 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V)
1.4
1.2
TA = 125oC
1
0.8
TA = 25oC
0.6 -50 -25 0 25 50 75 100
o
125
150
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation withTemperature.
70 60 ID, DRAIN CURRENT (A) 50 40
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100 IS, REVERSE DRAIN CURRENT (A) VGS = 0V 10 1 TA = 125oC 0.1 25oC 0.01 -55oC 0.001 0.0001
VDS = 5V
TA =125oC
30 20 10 0 1.5 2 2.5 3 3.5 4 VGS, GATE TO SOURCE VOLTAGE (V)
25oC
-55oC
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS7096N3 Rev E2 (W)
FDS7096N3
Typical Characteristics
10 VGS, GATE-SOURCE VOLTAGE (V)
2400 ID = 14A VDS = 10V 15V CAPACITANCE (pF) 2000 CISS 1600 1200 COSS 800 400 CRSS 0
0 5 10 15 20 25 30
f = 1MHz VGS = 0 V
8
20V
6
4
2
0 Qg, GATE CHARGE (nC)
0
5
10
15
20
25
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
1000
P(pk), PEAK TRANSIENT POWER (W)
Figure 8. Capacitance Characteristics.
50
ID, DRAIN CURRENT (A)
100 RDS(ON) LIMIT 10 1ms 10ms 100ms 1s 10s DC
100µs
40
SINGLE PULSE RθJA = 85°C/W TA = 25°C
30
1 VGS = 10V SINGLE PULSE RθJA = 85oC/W TA = 25oC 0.01 0.01 0.1 1
20
0.1
10
10
100
0 0.01
0.1
1
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
RθJA(t) = r(t) * RθJA RθJA = 85 °C/W P(pk) t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2
0.1
0.1 0.05 0.02
0.01
0.01
SINGLE PULSE
0.001 0.0001
0.001
0.01
0.1
t1, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.
FDS7096N3 Rev E2 (W)
FDS7096N3
Dimensional Outline and Pad Layout
FDS7096N3 Rev E2 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ FACT™ ImpliedDisconnect™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™
DISCLAIMER
ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™
POP™ Power247™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART START™ SPM™
Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™
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Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I8