FDS7288N3

FDS7288N3 February 2004 FDS7288N3 30V N-Channel PowerTrench MOSFET General Description This N-Channel MOSFET in the thermally enhanced SO8 FLMP package has been designed specifically to improve the overall efficiency of DC/DC converters. Providing a balance of low RDS(ON) and Qg it is ideal for synchronous rectifier applications in both isolated and non-isolated topologies. It is also well suited for both high and low side switch applications in Point of Load converters. Features • 20.5 A, 30 V RDS(ON) = 4.5 mΩ @ VGS = 10 V RDS(ON) = 5.6 mΩ @ VGS = 4.5 V • High performance trench technology for extremely low RDS(ON) • Low Qg and Rg for fast switching • SO-8 FLMP for enhanced thermal performance in an industry-standard package outline. Applications • Secondary side Synchronous rectifier • Synchronous Buck VRM and POL Converters 5 6 7 8 Bottom-side Drain Contact 4 3 2 1 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed TA=25oC unless otherwise noted Parameter Ratings 30 ±20 (Note 1a) Units V V A W °C 20 60 3.0 1.5 –55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 40 0.5 °C/W °C/W Package Marking and Ordering Information Device Marking FDS7288N3 Device FDS7288N3 Reel Size 13’’ Tape width 12mm Quantity 2500 units 2004 Fairchild Semiconductor Corporation FDS7288N3 Rev C1 (W) FDS7288N3 Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS VGS(th) ∆VGS(th) ∆TJ RDS(on) TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 24 V, VGS = 0 V VGS = ± 20 V, VDS = 0 V VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C VGS = 10 V, ID = 20.5 A VGS = 4.5 V, ID = 18.5 A VGS = 10 V, ID = 20.5 A,TJ = 125°C VDS = 10 V, ID = 20.5 A VDS = 15 V, V GS = 0 V, f = 1.0 MHz VGS = 15 mV, f = 1.0 MHz Min 30 Typ Max Units V Off Characteristics 25 10 ± 100 1 1.8 –5 3.8 4.6 5.2 106 3300 845 230 1.6 12 11 45 32 VDS = 15 V, ID = 20.5 A, VGS =10 V VDS = 15 V, ID = 20.5 A, VGS = 5 V 49 26 8.8 6.7 22 20 72 51 69 36 4.5 5.6 7.6 3 mV/°C µA nA On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance Forward Transconductance V mV/°C mΩ gFS S pF pF pF Ω ns ns ns ns nC nC nC nC Dynamic Characteristics Ciss Input Capacitance Coss Crss RG Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) Switching Characteristics td(on) Turn–On Delay Time tr td(off) tf Qg Qg Qgs Qgd IS VSD trr Qrr Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 2.5 A Voltage IF = 20.5 A, Diode Reverse Recovery Time diF/dt = 100 A/µs Diode Reverse Recovery Charge 2.5 (Note 2) A V nS nC 0.70 36 25 1.2 FDS7288N3 Rev C1 (W) FDS7288N3 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 40°C/W when mounted on a 1in2 pad of 2 oz copper b) 85°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS7288N3 Rev C1 (W) FDS7288N3 Typical Characteristics 60 VGS =10V 6.0V 2.6 3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 1 VGS = 3.0V 50 ID, DRAIN CURRENT (A) 4.0V 4.5V 40 30 3.0V 3.5V 4.0V 4.5V 5.0V 6.0V 10V 20 10 0 0 0.2 2.5V 0.4 0.6 0.8 VDS, DRAIN-SOURCE VOLTAGE (V) 0 10 20 30 40 ID, DRAIN CURRENT (A) 50 60 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.018 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 20.5A VGS = 10V ID = 10.25A RDS(ON), ON-RESISTANCE (OHM) 0.014 1.4 1.2 0.01 1 TA = 125oC 0.006 0.8 T A = 25 C 0.002 o 0.6 -50 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation withTemperature. 60 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VGS = 0V VDS = 5V IS, REVERSE DRAIN CURRENT (A) 50 ID, DRAIN CURRENT (A) 10 1 0.1 0.01 0.001 0.0001 TA = 125 C o 40 30 TA =125 C 25 C -55 C o o o 25 C o 20 -55 C o 10 0 1.5 2 2.5 3 3.5 VGS, GATE TO SOURCE VOLTAGE (V) 4 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS7288N3 Rev C1 (W) FDS7288N3 Typical Characteristics 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 20.5A 8 VDS = 10V CAPACITANCE (pF) 20V 4000 f = 1MHz VGS = 0 V 3000 Ciss 6 2000 Coss 1000 Crss 0 4 15V 2 0 0 10 20 30 40 Qg, GATE CHARGE (nC) 50 60 0 5 10 15 20 25 VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Figure 7. Gate Charge Characteristics. 1000 P(pk), PEAK TRANSIENT POWER (W) 50 Figure 8. Capacitance Characteristics. 100 ID, DRAIN CURRENT (A) RDS(ON) LIMIT 1ms 10ms 100ms 1s 10s DC VGS = 10V SINGLE PULSE o RθJA = 85 C/W TA = 25oC 100µs 40 SINGLE PULSE RθJA = 85°C/W TA = 25°C 10 30 1 20 0.1 10 0.01 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.01 0.1 1 10 t1, TIME (sec) 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RθJA(t) = r(t) * RθJA RθJA = 85 °C/W 0.1 0.1 0.05 0.02 0.01 P(pk) t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.01 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDS7288N3 Rev C1 (W) FDS7288N3 Dimensional Outline and Pad Layout FDS7288N3 Rev C1 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ FACT™ ImpliedDisconnect™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I8