FM93CS56LZVMT8

FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read July 2000 FM93CS56 (MICROWIRE™ Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read General Description FM93CS56 is a 2048-bit CMOS non-volatile EEPROM organized as 128 x 16-bit array. This device features MICROWIRE interface which is a 4-wire serial bus with chipselect (CS), clock (SK), data input (DI) and data output (DO) signals. This interface is compatible to many of standard Microcontrollers and Microprocessors. FM93CS56 offers programmable write protection to the memory array using a special register called Protect Register. Selected memory locations can be protected against write by programming this Protect Register with the address of the first memory location to be protected (all locations greater than or equal to this first address are then protected from further change). Additionally, this address can be “permanently locked” into the device, making all future attempts to change data impossible. In addition this device features “sequential read”, by which, entire memory can be read in one cycle instead of multiple single byte read cycles. There are 10 instructions implemented on the FM93CS56, 5 of which are for memory operations and the remaining 5 are for Protect Register operations. This device is fabricated using Fairchild Semiconductor floating-gate CMOS process for high reliability, high endurance and low power consumption. “LZ” and “L” versions of FM93CS56 offer very low standby current making them suitable for low power applications. This device is offered in both SO and TSSOP packages for small space considerations. Features I Wide VCC 2.7V - 5.5V I Programmable write protection I Sequential register read I Typical active current of 200µA 10µA standby current typical 1µA standby current typical (L) 0.1µA standby current typical (LZ) I No Erase instruction required before Write instruction I Self timed write cycle I Device status during programming cycles I 40 year data retention I Endurance: 1,000,000 data changes I Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP Functional Diagram CS SK DI INSTRUCTION REGISTER VCC INSTRUCTION DECODER CONTROL LOGIC AND CLOCK GENERATORS PRE PE ADDRESS REGISTER PROTECT REGISTER COMPARATOR AND WRITE ENABLE HIGH VOLTAGE GENERATOR AND PROGRAM TIMER DECODER EEPROM ARRAY 16 READ/WRITE AMPS 16 VSS DATA IN/OUT REGISTER 16 BITS DO DATA OUT BUFFER © 2000 Fairchild Semiconductor International FM93CS56 Rev. C.1 1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Connection Diagram Dual-In-Line Package (N) 8–Pin SO (M8) and 8–Pin TSSOP (MT8) CS SK DI DO 1 2 3 4 8 7 6 5 VCC PRE PE GND Top View Package Number N08E, M08A and MTC08 Pin Names CS SK DI DO GND PE PRE VCC Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Program Enable Protect Register Enable Power Supply Ordering Information FM 93 CS XX LZ E XXX Package Letter N M8 MT8 None V E Blank L LZ 56 C CS Interface 93 Description 8-pin DIP 8-pin SO 8-pin TSSOP 0 to 70°C -40 to +125°C -40 to +85°C 4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V and x-A6-A5-A4-A3-A2-A1-A0; (x -> Don't Care, can be 0 or 1); ( A6-A0 -> User defined ) ;;;;;;;;;;;;;; ;;;;;;;;;;;;;; ;;; ;;; 0 D15 D1 D0 SEQUENTIAL READ CYCLE (PRE = 0; PE = X) PRE ;;;; ;;;; tCS CS SK DI 1 Star t Bit 1 0 A7 Address Bits(8) A0 Opcode Bits(2) DO High - Z D u m my Bit 93CS56: A d d r e s s b i t s p a t t e r n - > x - A 6 - A 5 - A 4 - A 3 - A 2 - A 1 - A 0 ; ( x - > D o n ' t C a r e, c a n b e 0 o r 1 ) ; ( A 6 - A 0 - > U s e r d e f i n e d ) ;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;; ;;; ;;; 0 D15 D0 D15 D0 D15 D0 Data(n) Data(n+1) Data(n+2) 9 FM93CS56 Rev. C.1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Timing Diagrams (Continued) WRITE ENABLE CYCLE (WEN) PRE PE tCS CS SK DI 1 Star t Bit 0 0 A7 A6 Address Bits(8) A1 A0 Opcode Bits(2) DO High - Z 93CS56: A d d r e s s b i t s p a t t e r n - > 1 - 1 - x - x - x - x - x - x ; ( x - > D o n ' t C a r e, c a n b e 0 o r 1 ) WRITE DISABLE CYCLE (WDS) PRE PE ;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;; tCS CS SK DI 1 Star t Bit 0 0 A7 A6 Address Bits(8) A1 A0 Opcode Bits(2) DO High - Z 93CS56: Address bits patter n -> 0-0-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1) WRITE CYCLE (WRITE) PRE PE tCS CS SK DI 1 Star t Bit 0 1 A7 A6 Address Bits(8) A1 A0 D15 D14 Data Bits(16) D1 D0 tWP Ready Busy Opcode Bits(2) DO High - Z 93CS56: A d d r e s s b i t s p a t t e r n - > x - A 6 - A 5 - A 4 - A 3 - A 2 - A 1 - A 0 ; ( x - > D o n ' t C a r e, c a n b e 0 o r 1 ) ; ( A 6 - A 0 - > U s e r d e f i n e d ) Data bits pattern -> User defined 10 FM93CS56 Rev. C.1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Timing Diagrams (Continued) WRITE ALL CYCLE (WRALL) PRE PE tCS CS SK DI 1 Star t Bit 0 0 A7 A6 Address Bits(8) A1 A0 D15 D14 Data Bits(16) D1 D0 tWP Ready Busy Opcode Bits(2) DO High - Z 93CS56: Address bits patter n -> 0-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1) Data bits patter n -> User defined PROTECT REGISTER READ CYCLE (PRREAD) PRE PE ;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; tCS CS SK DI 1 Star t Bit 1 0 A7 A6 Address Bits(8) A1 A0 Opcode Bits(2) DO High - Z Dummy Bit 93CS56: Address bits patter n -> x-x-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1) ;;;;;;;;;;;;;; ;;;;;;;;;;;;;; ;;; ;;; 0 D7 D1 D0 PROTECT REGISTER ENABLE CYCLE (PREN) PRE PE ;;;;;;;;; ;;;;;;;;; ;;;;;;;;; tCS CS SK DI 1 Star t Bit 0 0 A7 A6 Address Bits(8) A1 A0 Opcode Bits(2) DO High - Z 93CS56: Address bits patter n -> 1-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1) 11 FM93CS56 Rev. C.1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Timing Diagrams (Continued) PROTECT REGISTER CLEAR CYCLE (PRCLEAR) PRE PE ;;;;;;;;; ;;;;;;;;; ;;;;;;;;; tCS CS SK DI 1 Star t Bit 1 1 A7 A6 Address Bits(8) A1 A0 tWP Ready Busy Opcode Bits(2) DO High - Z 93CS56: Address bits patter n -> 1-1-1-1-1-1-1-1 PROTECT REGISTER WRITE CYCLE (PRWRITE) PRE PE ;;;;;;;;; ;;;;;;;;; ;;;;;;;;; tCS CS SK DI 1 Star t Bit 0 1 A7 A6 Address Bits(8) A1 A0 tWP Ready Busy Opcode Bits(2) DO High - Z 93CS56: Address bits pattern -> x-A6-A5-A4-A3-A2-A1-A0; (x -> Don't Care, can be 0 or 1); ( A6-A0 -> User defined ) PROTECT REGISTER DISABLE CYCLE (PRDS) PRE PE ;;;;;;;;; ;;;;;;;;; ;;;;;;;;; tCS CS SK DI 1 Star t Bit 0 0 A7 A6 Address Bits(8) A1 A0 tWP Ready Busy Opcode Bits(2) DO High - Z 93CS56: Address bits patter n -> 0-0-0-0-0-0-0-0 12 FM93CS56 Rev. C.1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Timing Diagrams (Continued) CLEARING READY STATUS PRE PE ;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;; CS SK DI Star t Bit DO High - Z Busy Ready High - Z Note: This Star t bit can also be par t of a next instr uction. Hence the cycle can be continued(instead of getting ter minated, as shown) as if a new instr uction is being issued. 13 FM93CS56 Rev. C.1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Physical Dimensions inches (millimeters) unless otherwise noted 0.189 - 0.197 (4.800 - 5.004) 8765 0.228 - 0.244 (5.791 - 6.198) 1234 Lead #1 IDENT 0.150 - 0.157 (3.810 - 3.988) 8¡ Max, Typ. All leads 0.004 (0.102) All lead tips 0.010 - 0.020 x 45¡ (0.254 - 0.508) 0.053 - 0.069 (1.346 - 1.753) 0.004 - 0.010 (0.102 - 0.254) Seating Plane 0.0075 - 0.0098 (0.190 - 0.249) Typ. All Leads 0.016 - 0.050 (0.406 - 1.270) Typ. All Leads 0.014 (0.356) 0.050 (1.270) Typ 0.014 - 0.020 Typ. (0.356 - 0.508) Molded Package, Small Outline, 0.15 Wide, 8-Lead (M8) Package Number M08A 14 FM93CS56 Rev. C.1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Physical Dimensions inches (millimeters) unless otherwise noted 0.114 - 0.122 (2.90 - 3.10) 8 5 (4.16) Typ (7.72) Typ 0.169 - 0.177 (4.30 - 4.50) (1.78) Typ (0.42) Typ (0.65) Typ 0.246 - 0.256 (6.25 - 6.5) 0.123 - 0.128 (3.13 - 3.30) 1 4 Pin #1 IDENT Land pattern recommendation 0.0433 Max (1.1) 0.002 - 0.006 (0.05 - 0.15) 0.0256 (0.65) Typ. See detail A 0.0035 - 0.0079 0.0075 - 0.0118 (0.19 - 0.30) 0¡-8¡ Gage plane DETAIL A Typ. Scale: 40X 0.020 - 0.028 (0.50 - 0.70) Seating plane 0.0075 - 0.0098 (0.19 - 0.25) Notes: Unless otherwise specified 1. Reference JEDEC registration MO153. Variation AA. Dated 7/93 8-Pin Molded TSSOP, JEDEC (MT8) Package Number MTC08 15 FM93CS56 Rev. C.1 www.fairchildsemi.com FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read Physical Dimensions inches (millimeters) unless otherwise noted 0.373 - 0.400 (9.474 - 10.16) 0.090 (2.286) 0.092 DIA (2.337) Pin #1 IDENT Option 1 0.032 ± 0.005 8 7 8 + 7 6 5 0.250 - 0.005 (6.35 ± 0.127) (0.813 ± 0.127) RAD Pin #1 IDENT 1 1 2 3 4 0.039 (0.991) 0.130 ± 0.005 (3.302 ± 0.127) Option 2 0.145 - 0.200 (3.683 - 5.080) 0.280 MIN (7.112) 0.300 - 0.320 (7.62 - 8.128) 0.040 Typ. (1.016) 0.030 MAX (0.762) 20° ± 1° 95° ± 5° 0.009 - 0.015 (0.229 - 0.381) +0.040 0.325 -0.015 +1.016 8.255 -0.381 0.125 (3.175) DIA NOM 0.065 (1.651) 0.125 - 0.140 (3.175 - 3.556) 90° ± 4° Typ 0.018 ± 0.003 (0.457 ± 0.076) 0.100 ± 0.010 (2.540 ± 0.254) 0.060 (1.524) 0.020 (0.508) Min 0.045 ± 0.015 (1.143 ± 0.381) 0.050 (1.270) Molded Dual-In-Line Package (N) Package Number N08E Life Support Policy Fairchild's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Fairchild Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. Fairchild Semiconductor Americas Customer Response Center Tel. 1-888-522-5372 Fairchild Semiconductor Europe Fax: +44 (0) 1793-856858 Deutsch Tel: +49 (0) 8141-6102-0 English Tel: +44 (0) 1793-856856 Français Tel: +33 (0) 1-6930-3696 Italiano Tel: +39 (0) 2-249111-1 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild Semiconductor Hong Kong 8/F, Room 808, Empire Centre 68 Mody Road, Tsimshatsui East Kowloon. Hong Kong Tel; +852-2722-8338 Fax: +852-2722-8383 Fairchild Semiconductor Japan Ltd. 4F, Natsume Bldg. 2-18-6, Yushima, Bunkyo-ku Tokyo, 113-0034 Japan Tel: 81-3-3818-8840 Fax: 81-3-3818-8841 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 16 FM93CS56 Rev. C.1 www.fairchildsemi.com