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FMS6410

FMS6410

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FMS6410 - Dual Channel Video Drivers with Integrated Filters - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FMS6410 数据手册
www.fairchildsemi.com FMS6410 Dual Channel Video Drivers with Integrated Filters and Composite Video Summer Video Features • Dual integrated video low pass reconstruction filters on outputs • Composite Video Summer • Integrated output drivers provide low impedance outputs and deliver 2VP-P (6dB gain) video into 150Ω. • 7.1MHz 4th order video filters • 7.1MHz Y and C filters, with CV out • 42dB stopband attenuation at 27MHz on Y, C, and CV • Better than 1dB flatness to 4.5 MHz on Y, C, and CV • No external frequency select components or clocks • 9ns group delay flatness on Y, C, and CV output • AC coupled inputs and outputs • 0.4% differential gain with 0.4° differential phase • Integrated DC Restore / Clamp circuitry with low tilt General Description The FMS6410 Dual Channel Video Filter – Driver Chip with CV Summer offers comprehensive video filtering for set top box or DVD applications. This part consists of two 4th order Butterworth 7.1MHz low pass filters for video signals. The filters are optimized for low overshoot and flat group delay. The device also contains a summing circuit to generate filtered composite video. Integrated video drivers are included to facilitate a direct drive to the outside world. In a typical application, the Y and C input signals from DACs are AC coupled into the filter. Both channels have DC restore circuitry to clamp the DC input levels during video sync. The Y and C channels use a separate feedback clamp. The clamp pulse is derived from the Y channel. The outputs are AC coupled. The Y, C and, CV outputs are buffered to drive 2VP-P into a 150Ω load (1VP-P into a doubly terminated 75Ω coax load) with up to 35pF of load capacitance at the output pin. The Y, C, and CV channels have a gain of approximately 2 (6dB) with 1VP-P input levels. There is an option for the video output to be DC coupled which limits the drive output to one output on each channel. Applications • • • • • • • CCTV Cable and Satellite Set top boxes DVD players Televisions Personal Video Recorders (PVRs) Video On Demand (VOD) Distribution Amplifiers Functional Block Diagram SYNC STRIP, REF, AND TIMING 6dB 1 YIN YOUT 8 gM 2 1V DNC (Do Not Connect) VCC_VIDEO 7 FMS6410 3 GND_VIDEO CVOUT 6 gM 1V 4 CIN 6dB COUT 5 REV. 2a February 2004 FMS6410 DATA SHEET Pin Configuration FMS6410 8-Pin SOIC (SO8) YIN DNC (Do Not Connect) GND_VIDEO CIN 1 2 3 4 8 7 6 5 YOUT VCC_VIDEO CVOUT COUT Video Section Pin# 1 4 5 6 8 7 3 2 Pin YIN CIN COUT CVOUT YOUT VCC_VIDEO GND_VIDEO DNC Type Input Input Output Output Output Power Power DNC Description Luma (Luminance) / Composite Input Chroma (Chrominance) Input Filtered Chroma (Chrominance) Output Summed Composite Video Output Filtered Luma (Luminance) Output +5 VDC for Video Ground for Video Do Not Connect Power/Ground Pins 2 REV. 2a February 2004 DATA SHEET FMS6410 Functional Description Introduction The FMS6410 is a dual monolithic continuous time video filter designed for reconstructing the luminance and chrominance signals from an S-Video D/A source. The Composite video output is generated by summing the filtered Y and C outputs. The chip is intended for use in applications with AC coupled inputs and AC coupled outputs (See Figure 1). The reconstruction filters approximate a 4th-order Butterworth characteristic with an optimization toward low overshoot and flat group delay. Y, C, and CV outputs are capable of driving 2VP-P into AC coupled 150Ω video loads with up to 35pF of load capacitance at the output pin. All channels are clamped during sync to establish the appropriate output voltage swing range. Thus the input coupling capacitors do not behave according to the conventional RC time constant. Clamping for all channels settles to less than 10mv within 5ms of a change in video input sources. In most applications the input coupling capacitors are 0.1µF. The Y and C inputs typically sink 1µA during active video, which nominally tilts a horizontal line by about 2mV at the Y output. During sync, the clamp typically sources 20µA to restore the DC level. The net result is that the average input current is zero. Any change in the input coupling capacitor’s value will inversely alter the amount of tilt per line. Such a change will also linearly affect the clamp response times. This product is robust and stable under all stated load and input conditions. Capacitive bypassing of VCC directly to ground ensures this performance. Chrominance (C) I/O The chroma input is driven by a low impedance source of 0.7VP-P or the output of a 75Ω terminated line. The input is required to be AC coupled via a 0.1µF coupling capacitor which allows for a clamp setting time of 5ms. The chroma output is capable of driving an AC coupled 150Ω load at 2VP-P, or 1VP-P into a doubly terminated 75Ω load. Up to 35pF of load capacitance can be driven without stability or slew issues. A 0.1µF AC coupling capacitor is recommended at the output. Since chrominance signals do not contain low frequency components, the smaller 0.1µF cap is recommended instead of the 220µF cap to reduce circuit cost. Composite Video (CV) Output The composite video output is capable of driving 2 loads to 2VP-P. It is intended to drive a TV and a VCR. Either the TV input or the VCR input can be shorted to ground and the other output will still meet specifications. Up to 35pF of load capacitance (at the output pin) can be driven without stability or slew issues. DC Coupled Output Applications The 220µF capacitor coupled with the 150 Ω termination forms a high pass filter that blocks the DC while passing the video frequencies and avoiding tilt. Lower values such as 10µF would create a problem. By AC coupling, the average DC level is zero. Thus, the output voltages of all channels will be centered around zero. Alternately, DC coupling the output of the FMS6410 is allowable. There are several tradeoffs: The average DC level on the outputs will be 2V; Each output will dissipate an additional 40mW nominally; The application will need to accommodate a 1V DC offset sync tip; And it is recommended to limit each output to one 150Ω load. Luminance (Y) I/O The luma input is driven by either a low impedance source of 1VP-P or the output of a 75Ω terminated line. The input is required to be AC coupled via a 0.1µF coupling capacitor which allows for a settling time of 5ms. The luma output is capable of driving an AC coupled 150Ω load at 2VP-P, or 1VP-P into a doubly terminated 75Ω load. Up to 35pF of load capacitance (at the output pin) can be driven without stability or slew issues. The output is AC coupled with a 220µF or larger AC coupling capacitor. REV. 2a February 2004 3 FMS6410 DATA SHEET Typical Applications YIN SYNC STRIP, REF, AND TIMING 6dB 1 YIN 0.1µF YOUT 8 220µF 75Ω Video Cable YOUT 75Ω gM 2 1V DNC (Do Not Connect) VCC_VIDEO 7 0.1µF 1µF +5.0V FMS6410 3 CVOUT GND_VIDEO 6 220µF 75Ω Video Cable CVOUT 75Ω gM CIN 1V COUT 6dB 4 CIN 0.1µF 5 0.1µF 75Ω Video Cable COUT 75Ω Figure 1. Typical Configuration 220µF 75Ω Video Cable YOUT 75Ω SYNC STRIP, REF, AND TIMING 6dB YIN 1 YIN 0.1µF YOUT 8 220µF 75Ω Video Cable YOUT 75Ω gM 2 1V DNC (Do Not Connect) VCC_VIDEO 7 0.1µF 1µF +5.0V FMS6410 3 CVOUT GND_VIDEO 6 220µF 75Ω Video Cable YOUT 75Ω gM 1V COUT 6dB 4 CIN 5 220µF 75Ω Video Cable YOUT 75Ω Figure 2. One Input to Four Output Distribution Amplifier Configuration 4 REV. 2a February 2004 DATA SHEET FMS6410 Typical Performance Graphs 1 20 0 AMPLITUDE (dB) AMPLITUDE (dB) 0.1 1 10 0 -1 -20 -2 -40 -3 -60 -4 0.01 -80 0.01 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 3. Passband Flatness for Y, C, and CV outputs (Normalized). Passband is ripple-free. 90 Figure 4. Passband/Stopband Rejection Ratios for Y, C, and CV outputs. (Normalized) 70 DELAY (ns) 50 30 10 1 2 3 4 5 6 7 8 9 10 11 FREQUENCY (MHz) Figure 5. tPD Propagation Delay for Y, C, and CV Outputs Figure 6. DC Restore Performance of Luma Output. Luma ramp test pattern is shown to have minimal tilt during vertical sync. REV. 2a February 2004 5 FMS6410 DATA SHEET Absolute Maximum Ratings (beyond which the device may be damaged) Parameter DC Supply Voltage Analog I/O Output Current (Continuous) Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Thermal Resistance (ΘJA) -65 CV Channel Y and C Channels Min -0.3 GND-0.3 Max +7.0 VCC+0.3 60 30 150 +150 260 115 Units V V mA mA °C °C °C °C/W Note: Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if Operating Conditions are not exceeded. Operating Conditions Parameter Temperature Range VCC_VIDEO Range ICC (+5 VDC), AC Coupled Outputs Min 0 4.75 5.0 60 Typ Max 70 5.25 85 Units °C V mA Electrical Characteristics 1Vp-p input signal at room temperature Video Characteristics - Unless otherwise noted, typical output loading on video output is 150Ω. Symbol AVYC AVCV YSYNC CSYNC CVSYNC tCLAMP f1dB fC fSB Vi ISC CL dG dP THD Parameter Low Frequency Gain (YOUT, COUT) Low Frequency Gain (CVOUT) YOUT Output Level (During Sync) COUT Output Level (During Sync) CVOUT Output Level (During Sync) Clamp Response Time (Y Channel) –1.0dB Bandwidth (Flatness) (YOUT, COUT, and CVOUT) –3dB Bandwidth (Flatness) (YOUT, COUT, and CVOUT) Stopband Rejection (YOUT, COUT, and CVOUT) Input Signal Dynamic Range Output Short Circuit Current (Note 2) Output Shunt Capacitance Differential Gain (Note 3) Differential Phase (Note 3) fIN = 27MHz AC Coupled (All Channels) YOUT, COUT, CVOUT to GND All Channels YOUT, COUT, and CVOUT YOUT, COUT, and CVOUT Condition VCC_VIDEO=+5.0V+/-5% at 400kHz at 400kHz Sync Present on YIN Sync Present on YIN Sync Present on YIN Settled to within 10mV, 0.1µF cap on YIN and CIN No Peaking Cap (Note 1) 4.0 6.7 -37 1.3 Min 5.75 5.55 0.75 1.6 0.75 Typ 6.0 5.9 1.0 2.0 1.0 5 4.5 7.1 -42 1.4 40 35 0.4 0.4 0.1 1 1 0.5 80 Max Units 6.25 6.25 1.25 2.4 1.25 9 dB dB V V V ms MHz MHz dB VP-P mA pF % ° % Output Distortion (All Channels)(Note 3) YOUT / COUT = 1.8VP-P at 3.58 / 4.43MHz 6 REV. 2a February 2004 DATA SHEET FMS6410 Electrical Characteristics 1Vp-p input signal at room temperature (continued) Video Characteristics - Unless otherwise noted, typical output loading on video output is 150Ω. Symbol XTALK Parameter Crosstalk (Note 3) Condition VCC_VIDEO=+5.0V+/-5% From CIN of 0.5VP-P at 3.58MHz to YOUT From YIN Input of 0.4VP-P at 3.58MHz, to COUT PSRR SNR PSRR (All Channels) (Note 3) Y, C Channel (Note 3) CV Channel (Note 3) tPD ∆tpd tSKEW TCLDCV TCLGCV Propagation Delay (Y, C, CV) (Note 3) Group Delay Deviation from Flatness (Y, C, and CV) (Note 3) 0.5VP-P (100kHz) at VCC NTC-7 weighting 4.2 MHz lowpass NTC-7 weighting 4.2 MHz lowpass 100kHz to 3.58MHz (NTSC) to 4.43MHz (PAL) f = 3.58MHz (referenced to YIN at 400kHz) f = 3.58MHz (referenced to YIN at 400kHz) -35 92 Min -45 -50 -30 -65 -60 30 Typ -55 -58 -40 -75 -70 70 9 7 0 0 95 35 104 110 Max Units dB dB dB dB dB ns ns ns ns ns % Skew between YOUT and COUT (Note 3) at 1MHz Chroma-Luma Delay CVOUT Chroma-Luma Gain CVOUT Notes: 1. Peaking capacitor of 330pF increases output at 4.2MHz nominally by 0.7dB 2. Sustained short circuit protection limited to 10 seconds 3. Guaranteed by Characterization REV. 2a February 2004 7 FMS6410 DATA SHEET Mechanical Dimensions Inches (millimeters) Package: S08 8-Pin SOIC 0.189 - 0.199 (4.80 - 5.06) 8 PIN 1 ID 0.148 - 0.158 0.228 - 0.244 (3.76 - 4.01) (5.79 - 6.20) 1 0.017 - 0.027 (0.43 - 0.69) (4 PLACES) 0.050 BSC (1.27 BSC) 0.059 - 0.069 (1.49 - 1.75) 0° - 8° 0.055 - 0.061 (1.40 - 1.55) 0.012 - 0.020 (0.30 - 0.51) SEATING PLANE 0.004 - 0.010 (0.10 - 0.26) 0.015 - 0.035 (0.38 - 0.89) 0.006 - 0.010 (0.15 - 0.26) 8 REV. 2a February 2004 FMS6410 DATA SHEET Ordering Information Model FMS6410 FMS6410 FMS6410 FMS6410 Part Number FMS6410CS FMS6410CSX FMS6410CS_NL FMS6410CSX_NL Lead Free Package SOIC-8 SOIC-8 SOIC-8 SOIC-8 Container Tube Tape and Reel Tube Tape and Reel Pack Quantity 95 2500 95 2500 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. © 2004 Fairchild Semiconductor Corporation
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