FQB13N50

FQB13N50 / FQI13N50 March 2001 QFET FQB13N50 / FQI13N50 500V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supply, power factor correction, and electronic lamp ballast based on half bridge. D TM Features • • • • • • 12.5A, 500V. RDS(on) = 0.43Ω @VGS = 10 V Low gate charge ( typical 45 nC). Low Crss ( typical 25 pF). Fast switching. 100% avalanche tested. Improved dv/dt capability. D ! ● ◀ ▲ ● ● G S G! D2-PAK FQB Series GDS I2-PAK FQI Series ! S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) FQB13N50 / FQI13N50 500 12.5 7.9 50 ± 30 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V mJ A mJ V/ns W W W/°C °C °C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * 810 12.5 17 4.5 3.13 170 1.35 -55 to +150 300 TJ, TSTG TL Power Dissipation (TC = 25°C) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC RθJA RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient Typ ---Max 0.74 40 62.5 Units °C/W °C/W °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQB13N50 / FQI13N50 Electrical Characteristics Symbol Parameter TC = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS / ∆TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 500 V, VGS = 0 V VDS = 400 V, TC = 125°C VGS = 30 V, VDS = 0 V VGS = -30 V, VDS = 0 V 500 ------0.48 ------1 10 100 -100 V V/°C µA µA nA nA On Characteristics VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VGS = 10 V, ID = 6.25 A VDS = 50 V, ID = 6.25 A (Note 4) 3.0 --- -0.33 10 5.0 0.43 -- V Ω S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---1800 245 25 2300 320 35 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 400 V, ID = 13.4 A, VGS = 10 V (Note 4, 5) VDD = 250 V, ID = 13.4 A, RG = 25 Ω (Note 4, 5) -------- 40 140 100 85 45 11 22 90 290 210 180 60 --- ns ns ns ns nC nC nC Drain-Source Diode Characteristics and Maximum Ratings IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 12.5 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 13.4 A, dIF / dt = 100 A/µs (Note 4) ------ ---290 2.6 12.5 50 1.4 --- A A V ns µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 9.3mH, IAS = 12.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 13.4A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQB13N50 / FQI13N50 Typical Characteristics ID , Drain Current [A] ID , Drain Current [A] 10 1 VGS 15 V 10 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top : 10 1 150℃ 25℃ 10 0 -55℃ ※ Notes : 1. VDS = 50V 2. 250μ s Pulse Test 10 0 ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ 10 -1 10 0 10 1 10 -1 2 4 6 8 10 VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 1.4 1.2 RDS(ON) [Ω ], Drain-Source On-Resistance 1.0 VGS = 10V VGS = 20V IDR , Reverse Drain Current [A] 10 1 0.8 0.6 10 0 0.4 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test 0.2 ※ Note : TJ = 25℃ -1 0.0 0 10 20 30 40 50 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 ID, Drain Current [A] VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 3500 3000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 12 VDS = 100V 10 VDS = 250V VDS = 400V VGS, Gate-Source Voltage [V] 2500 Ciss Coss 8 Capacitance [pF] 2000 6 1500 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 4 1000 Crss 500 2 ※ Note : ID = 13.4 A 0 -1 10 0 10 0 10 1 0 5 10 15 20 25 30 35 40 45 50 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQB13N50 / FQI13N50 Typical Characteristics (Continued) 1.2 3.0 2.5 BV DSS , (Norm alized) Drain-Source Breakdown Voltage RDS(ON) , (Normalized) Drain-Source On-Resistance 1.1 2.0 1.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 6.7 A 0.9 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.5 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 15 10 2 Operation in This Area is Limited by R DS(on) 12 ID, Drain Current [A] 100 µs 10 1 10 µs 1 ms 10 ms DC ID, Drain Current [A] 3 9 6 10 0 ※ Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 3 10 -1 10 0 10 1 10 2 10 0 25 50 75 100 125 150 VDS, Drain-Source Voltage [V] TC, Case Temperature [℃] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature 10 0 (t), T h e rm a l R e s p o n s e D = 0 .5 0 .2 10 -1 0 .1 0 .0 5 0 .0 2 0 .0 1 s in g le p u ls e ※ N o te s : 1 . Z θ J C (t) = 0 .7 4 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) PDM t1 t2 Z θ JC 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u r a tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQB13N50 / FQI13N50 Gate Charge Test Circuit & Waveform VGS 50KΩ 12V 200nF 300nF Same Type as DUT 10V Qg VGS VDS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RG RL VDD ( 0.5 rated VDS ) VDS 90% 10V DUT Vin 10% td(on) t on tr td(off) t off tf Unclamped Inductive Switching Test Circuit & Waveforms L VDS VDD ID RG BVDSS IAS BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD ID (t) 10V DUT VDD tp VDS (t) Time ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQB13N50 / FQI13N50 Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG Same Type as DUT VDD VGS • dv/dt controlled by RG • IS controlled by pulse period VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQB13N50 / FQI13N50 Package Dimensions D2PAK (0.40) 9.90 ±0.20 4.50 ±0.20 1.30 –0.05 +0.10 1.20 ±0.20 9.20 ±0.20 15.30 ±0.30 1.40 ±0.20 2.00 ±0.10 0.10 ±0.15 2.54 ±0.30 9.20 ±0.20 Rev. A, March 2001 2.40 ±0.20 4.90 ±0.20 (0.75) 1.27 ±0.10 2.54 TYP 0.80 ±0.10 2.54 TYP 10.00 ±0.20 (8.00) (4.40) 0° ~3 ° +0.10 0.50 –0.05 10.00 ±0.20 15.30 ±0.30 (1.75) (2XR0.45) 0.80 ±0.10 ©2001 Fairchild Semiconductor Corporation 4.90 ±0.20 (7.20) FQB13N50 / FQI13N50 Package Dimensions (Continued) I2PAK 9.90 ±0.20 (0.40) 4.50 ±0.20 +0.10 1.30 –0.05 1.20 ±0.20 9.20 ±0.20 MAX 3.00 (1.46) 13.08 ±0.20 (0.94) 1.27 ±0.10 1.47 ±0.10 0.80 ±0.10 10.08 ±0.20 MAX13.40 (4 ) 5° 2.54 TYP 2.54 TYP 0.50 –0.05 +0.10 2.40 ±0.20 10.00 ±0.20 ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ DISCLAIMER FAST® FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SLIENT SWITCHER® SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET® VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production ©2001 Fairchild Semiconductor Corporation Rev. H1