FQB9N50C

FQB9N50C/FQI9N50C QFET FQB9N50C/FQI9N50C 500V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology. TM Features • • • • • • 9 A, 500V, RDS(on) = 0.8 Ω @VGS = 10 V Low gate charge ( typical 28 nC) Low Crss ( typical 24 pF) Fast switching 100% avalanche tested Improved dv/dt capability D D ! " G S D2-PAK FQB Series I2-PAK GDS FQI Series G! !" " " ! S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) FQB9N50C/FQI9N50C 500 9 5.4 36 ± 30 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V mJ A mJ V/ns W W/°C °C °C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) 360 9 13.5 4.5 135 1.07 -55 to +150 300 - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC RθJA RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient Typ ---Max 0.93 40 62.5 Units °C/W °C/W °C/W ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C Electrical Characteristics Symbol Parameter TC = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS / ∆TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 500 V, VGS = 0 V VDS = 400 V, TC = 125°C VGS = 30 V, VDS = 0 V VGS = -30 V, VDS = 0 V 500 ------0.57 ------1 10 100 -100 V V/°C µA µA nA nA On Characteristics VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VGS = 10 V, ID = 4.5 A VDS = 40 V, ID = 4.5 A (Note 4) 2.0 --- -0.65 6.5 4.0 0.8 -- V Ω S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---790 130 24 1030 170 30 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 400 V, ID = 9 A, VGS = 10 V (Note 4, 5) VDD = 250 V, ID = 9 A, RG = 25 Ω (Note 4, 5) -------- 18 65 93 64 28 4 15 45 140 195 125 35 --- ns ns ns ns nC nC nC Drain-Source Diode Characteristics and Maximum Ratings IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 9 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 9 A, dIF / dt = 100 A/µs (Note 4) ------ ---335 2.95 9 36 1.4 --- A A V ns µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 8 mH, IAS = 9A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 9A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C Typical Characteristics 10 1 ID, Drain Current [A] ID, Drain Current [A] VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Top : 10 1 150 C o o 25 C 10 0 o -55 C 10 0 ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 40V 2. 250μ s Pulse Test 10 -1 10 -1 -1 10 10 0 10 1 2 4 6 8 10 VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 2.0 VGS = 10V RDS(ON) [Ω ], Drain-Source On-Resistance 10 1 1.5 1.0 IDR, Reverse Drain Current [A] VGS = 20V 10 0 150℃ 25℃ 10 -1 0.5 ※ Note : TJ = 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test 0 5 10 15 20 25 0.2 0.4 0.6 0.8 1.0 1.2 1.4 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 2000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 12 1600 10 VDS = 100V VDS = 250V Ciss VGS, Gate-Source Voltage [V] 8 Capacitance [pF] 1200 VDS = 400V Coss 800 6 Crss 400 ※ Notes ; 1. VGS = 0 V 2. f = 1 MHz 4 2 ※ Note : ID = 9A 0 -1 10 0 10 0 10 1 0 5 10 15 20 25 30 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C Typical Characteristics (Continued) 1.2 3.0 2.5 BV DSS , (Normalized) Drain-Source Breakdown Voltage RDS(ON) , (Normalized) Drain-Source On-Resistance 1.1 2.0 1.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 4.5 A 0.9 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.5 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature 10 2 Figure 8. On-Resistance Variation vs Temperature 10 Operation in This Area is Limited by R DS(on) 10 µs 100 µs 8 ID, Drain Current [A] 10 1 ID, Drain Current [A] 10 3 1 ms 10 ms 100 ms DC 6 10 0 4 ※ Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 2 10 -1 10 0 10 1 10 2 0 25 50 75 100 125 150 VDS, Drain-Source Voltage [V] TC, Case Temperature [℃] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs Case Temperature 10 0 Z (t), T h e rm a l R e s p o n s e D = 0 .5 0 .2 10 -1 0 .1 0 .0 5 0 .0 2 0 .0 1 s in g le p u ls e ※ N o te s : 1 . Z θ JC t) = 0 .9 3 ℃ /W M a x . ( 2 . D u ty F a c to r , D = t1/t2 3 . T JM - T C = P D M * Z θ J C t) ( PDM t1 t2 θ JC 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C Gate Charge Test Circuit & Waveform 50KΩ 12V 200nF 300nF Same Type as DUT VDS VGS Qg 10V Qgs Qgd VGS DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS VGS RG RL VDD VDS 90% 10V DUT VGS 10% td(on) t on tr td(off) t off tf Unclamped Inductive Switching Test Circuit & Waveforms L VDS ID RG DUT tp BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD BVDSS IAS VDD VDD tp ID (t) VDS (t) Time 10V ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG Same Type as DUT VDD VGS • dv/dt controlled by RG • ISD controlled by pulse period VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C Mechanical Dimensions D2 - PAK Dimensions in Millimeters ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C Mechanical Dimensions I2-PAK 9.90 ±0.20 (0.40) 4.50 ±0.20 1.30 –0.05 +0.10 1.20 ±0.20 9.20 ±0.20 MAX 3.00 (1.46) 13.08 ±0.20 (0.94) 1.27 ±0.10 1.47 ±0.10 0.80 ±0.10 10.08 ±0.20 MAX13.40 (4 ) 5° 2.54 TYP 2.54 TYP 0.50 –0.05 +0.10 2.40 ±0.20 10.00 ±0.20 Dimensions in Millimeters ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 FQB9N50C/FQI9N50C TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. Auto-SPM™ PowerTrench® F-PFS™ The Power Franchise® FRFET® PowerXS™ Build it Now™ ® Global Power ResourceSM Programmable Active Droop™ CorePLUS™ ® Green FPS™ QFET CorePOWER™ TinyBoost™ QS™ Green FPS™ e-Series™ CROSSVOLT™ TinyBuck™ Quiet Series™ Gmax™ CTL™ TinyLogic® RapidConfigure™ GTO™ Current Transfer Logic™ TINYOPTO™ IntelliMAX™ EcoSPARK® TinyPower™ ISOPLANAR™ EfficentMax™ ™ TinyPWM™ MegaBuck™ EZSWITCH™ * Saving our world, 1mW /W /kW at a time™ TinyWire™ ™* MICROCOUPLER™ SmartMax™ TriFault Detect™ MicroFET™ SMART START™ TRUECURRENT™* MicroPak™ SPM® ® μSerDes™ MillerDrive™ STEALTH™ Fairchild® MotionMax™ SuperFET™ Fairchild Semiconductor® Motion-SPM™ SuperSOT™-3 FACT Quiet Series™ OPTOLOGIC® SuperSOT™-6 UHC® ® ® FACT OPTOPLANAR Ultra FRFET™ SuperSOT™-8 ® FAST® UniFET™ SupreMOS™ FastvCore™ VCX™ SyncFET™ FETBench™ VisualMax™ Sync-Lock™ PDP SPM™ ® FlashWriter * XS™ ®* Power-SPM™ FPS™ tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative / In Design Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I40 ©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009 Preliminary First Production No Identification Needed Obsolete Full Production Not In Production