FQH44N10_08

FQH44N10_F133 Octorber 2008 QFET FQH44N10_F133 100V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control. ® Features • • • • • • • 48A, 100V, RDS(on) = 0.039Ω @VGS = 10 V Low gate charge ( typical 48 nC) Low Crss ( typical 85 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating D G GD S TO-247 FQH Series S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) FQH44N10_F133 100 48 34 192 ± 25 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V mJ A mJ V/ns W W/°C °C °C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) 530 48 18 6.0 180 1.2 -55 to +175 300 - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8∀ from case for 5 seconds Thermal Characteristics Symbol RθJC RθCS RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Thermal Resistance, Junction-to-Ambient Typ -0.24 -Max 0.83 -40 Units °C/W °C/W °C/W ©2008 Fairchild Semiconductor Corporation 1 Rev. A, October 2008 FQH44N10_F133 Electrical Characteristics Symbol Parameter TC = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS ΔBVDSS / ΔTJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 μA ID = 250 μA, Referenced to 25°C VDS = 100 V, VGS = 0 V VDS = 80 V, TC = 150°C VGS = 25 V, VDS = 0 V VGS = -25 V, VDS = 0 V 100 ------0.1 ------1 10 100 -100 V V/°C μA μA nA nA On Characteristics VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 μA VGS = 10 V, ID = 24 A VDS = 40 V, ID = 24 A (Note 4) 2.0 --- -0.03 31 4.0 0.039 -- V Ω S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---1400 425 85 1800 550 110 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 80 V, ID = 43.5 A, VGS = 10 V (Note 4, 5) VDD = 50 V, ID = 43.5 A, RG = 25 Ω (Note 4, 5) -------- 19 190 90 100 48 9.0 24 45 390 190 210 62 --- ns ns ns ns nC nC nC Drain-Source Diode Characteristics and Maximum Ratings IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 48 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 43.5 A, dIF / dt = 100 A/μs (Note 4) ------ ---98 360 48 192 1.5 --- A A V ns nC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 0.345mH, IAS = 48A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 43.5A, di/dt ≤ 300A/μs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300μs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2008 Fairchild Semiconductor Corporation 2 Rev. A, October 2008 FQH44N10_F133 Typical Characteristics 10 2 ID, Drain Current [A] ID , Drain Current [A] VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Top : 10 2 10 1 175∩ 10 1 25∩ 10 0 -55∩ ∝ Notes : 1. VDS = 40V 2. 250レ Pulse Test s ∝ Notes : 1. 250レ Pulse Test s 2. TC = 25∩ 10 -1 10 0 10 0 10 1 10 -1 2 4 6 8 10 VDS, Drain-Source Voltage [V] VGS , Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.15 0.12 VGS = 10V VGS = 20V 0.06 IDR , Reverse Drain Current [A] 10 2 RDS(on) [Ω], Drain-Source On-Resistance 0.09 10 1 10 0 0.03 ∝ Note : TJ = 25∩ 175∩ 10 -1 25∩ ∝ Notes : 1. VGS = 0V 2. 250レ Pulse Test s 0.00 0 30 60 90 120 150 180 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 ID , Drain Current [A] VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 4000 3500 3000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 12 VGS, Gate-Source Voltage [V] 10 VDS = 50V VDS = 80V Capacitance [pF] 2500 2000 1500 1000 500 0 -1 10 8 Ciss Coss ∝ Notes : 1. VGS = 0 V 2. f = 1 MHz 6 4 Crss 2 ∝ Note : ID = 43.5A 10 0 10 1 0 0 10 20 30 40 50 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics ©2008 Fairchild Semiconductor Corporation 3 Rev. A, October 2008 FQH44N10_F133 Typical Characteristics (Continued) 1.2 3.0 BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.1 RDS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.0 1.5 1.0 0.9 ∝ Notes : 1. VGS = 0 V A 2. ID = 250 レ 0.5 ∝ Notes : 1. VGS = 10 V 2. ID = 21.75 A 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 50 10 3 Operation in This Area is Limited by R DS(on) 40 ID, Drain Current [A] 10 2 100 μs 1 ms 10 ms ID, Drain Current [A] 10 μs 30 10 1 DC 20 10 0 ∝ Notes : 1. TC = 25 C 2. TJ = 175 C 3. Single Pulse o o 10 10 -1 10 0 10 1 10 2 0 25 50 75 100 125 150 175 VDS, Drain-Source Voltage [V] TC, Case Temperature [∩ ] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature 10 0 Zヨ JC(t), Thermal Response D = 0 .5 0 .2 10 -1 0 .1 0 .0 5 0 .0 2 0 .0 1 s in g le p u ls e ∝ N o te s : 1 . Z ヨ J C ( t) = 0 .8 3 ∩ /W M a x . 2 . D u t y F a c to r , D = t 1 / t 2 3 . T J M - T C = P D M * Z ヨ J C ( t) PDM t1 t2 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2008 Fairchild Semiconductor Corporation 4 Rev. A, October 2008 FQH44N10_F133 Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms ©2008 Fairchild Semiconductor Corporation 5 Rev. A, October 2008 FQH44N10_F133 Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2008 Fairchild Semiconductor Corporation 6 Rev. A, October 2008 FQH44N10_F133 Package Dimensions TO-247AB Dimensions in Millimeters ©2008 Fairchild Semiconductor Corporation 7 Rev. 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Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I37 ©2008 Fairchild Semiconductor Corporation 8 Rev. A, October 2008