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FS6X1220

型  号:
FS6X1220
大  小:
471.37KB 共16页
厂  商:
FAIRCHILD[FairchildSemiconductor]
主  页:
http://www.fairchildsemi.com/
功能介绍:
FS6X1220 - Fairchild Power Switch (FPS) - Fairchild Semiconductor
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www.fairchildsemi.com FS6X1220R Features Fairchild Power Switch (FPSTM) Description The FS6X1220R is specially designed for an off-line DCDC converters with minimal external components. This device is a current mode PWM controller combined with a high voltage power SenseFET in a single package. The PWM controller includes integrated fixed frequency oscillator, line under voltage lockout, sleep on/off function, thermal shutdown protection, over voltage protection, pulse-by-pulse current limit and temperature compensated precise current sources for a loop compensation. Compared with discrete MOSFET and PWM controller solution, the FS6X1220R can reduce total cost, component count, size and weight simultaneously increasing efficiency, productivity, and system reliability. This device is well suited for DC to DC converter applications up to 40W of output power. TO-220F-5L D2-PAK-5L • Current Mode PWM Control With a Fixed Operating Frequency (300kHz) • Pulse by Pulse Current Limit • Over Load Protection • Over Voltage Protection • Thermal Shutdown • Built-in Auto-Restart Circuit • Line Under Voltage Detection and Sleep on/off Function • Internal High Voltage SenseFET (QFET) • Supports Forward or Flyback Topology Application • DC-DC Converter 1 1. Drain 2. GND 3. VCC 4. Feedback 5. Line Sense Internal Block Diagram Vcc 3 VLU Line UVLO Vcc good 9V/15V Drain 1 Line 5 Sense VSL Vcc Idelay Vref IFB 28R OSC Enable Vref Internal Bias S Q FB 4 R VSD Vcc S R Q Gate driver Q Vovp TSD Line UVLO Vcc good R Q 2 GND Rev.1.0.1 ©2004 Fairchild Semiconductor Corporation FS6X1220R Pin Description Pin Number 1 2 3 Pin Name Drain GND Vcc Pin Function Description High voltage power SenseFET drain connection. This pin is the control ground and the SenseFET source. This pin is the positive supply input. This pin provides internal operating current for both start-up and steady-state operation. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 7.5V, the over load protection is activated resulting in shutdown of the IC. According to the voltage of this pin, three operation modes are defined; Normal operation mode, Line under voltage lock out mode and Sleep mode. If the voltage of this pin is smaller than 2.55V, the IC goes into line under voltage lock out stopping switching operation. If the voltage of this pin is smaller than 1.8V, the IC enters into sleep mode. During sleep mode, reference voltage generation circuit including shunt regulator is disabled and only 300uA operation current is required. 4 Feedback (FB) 5 Line Sense (LS) 2 FS6X1220R Absolute Maximum Ratings (Ta=25°C, unless otherwise specified) Parameter Drain-Gate Voltage (RGS=1MΩ) Gate-Source (GND) Voltage Drain Current Pulsed (2) (3) Symbol VDGR VGS IDM EAS ID ID VCC VFB VLS PD(Watt H/S) Derating Tj TA TSTG Value 200 ±30 32.8 210 8.2 5.2 35 -0.3 to Vcc -0.3 to Vcc 45 0.36 +150 -25 to +85 -55 to +150 Unit V V ADC mJ ADC ADC V V V W W/°C °C °C °C Single Pulsed Avalanche Energy Continuous Drain Current (Tc = 25°C) Continuous Drain Current (TC=100°C) Supply Voltage Input Voltage Range Total Power Dissipation Operating Junction Temperature Operating Ambient Temperature Storage Temperature Range Notes: 1. Tj=25°C to 150°C 2. Repetitive rating: Pulse width limited by maximum junction temperature 3. L=4.7 mH, starting Tj=25°C 3 FS6X1220R Electrical Characteristics (SenseFET part) (Ta=25°C unless otherwise specified) Parameter Drain Source Breakdown Voltage Zero Gate Voltage Drain Current Static Drain Source On Resistance (1) Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn On Delay Time Rise Time Turn Off Delay Time Fall Time Total Gate Charge (Gate-Source+Gate-Drain) Gate-Source Charge Gate-Drain (Miller) Charge Note: 1. Pulse test : Pulse width ≤ 300µS, duty ≤ 2% Symbol BVDSS IDSS RDS(ON) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Condition VGS=0V, ID=250µA VDS=200V, VGS=0V VDS=160V VGS=0V, TC=125°C VGS=10V, ID=4.1A VDS=40V, ID=4.1A VGS=0V, VDS=25V, f = 1MHz VDD=100V, ID=11.6A (MOSFET switching time is essentially independent of operating temperature) VGS=10V, ID=11.6A, VDS=160V (MOSFET switching time is essentially independent of operating temperature) Min. 200 - Typ. 0.24 7.1 700 125 18 13 120 30 55 18 5 8 Max. 1 10 0.30 910 160 25 35 250 70 120 23 - Unit V µA µA Ω mho pF ns nC 4 FS6X1220R Electrical Characteristics (Continued) (Ta=25°C unless otherwise specified) Parameter UVLO SECTION Start Threshold Voltage Stop Threshold Voltage OSCILLATOR SECTION Initial Frequency Voltage Stability Temperature Stability (1) Maximum Duty Cycle Minimum Duty Cycle FEEDBACK SECTION Feedback Source Current Shutdown Feedback Voltage Shutdown Delay Current LINE SENSE SECTION Line UVLO Threshold Voltage Sleep On/Off Threshold Voltage Peak Current Limit (2) PROTECTION SECTION Thermal Shutdown Temp (1) Over Voltage Protection TOTAL DEVICE SECTION Start Up Current Sleep Mode Current Operating Supply Current ISTART ISLEEP IOP IOP(MIN) IOP(MAX) VFB = GND, VCC = 14V VUVLO = 1V, VCC = 16V VFB = GND, VCC = 16V VFB = GND, VCC = 12V VFB = GND, VCC = 20V 10 15 mA 60 300 120 500 uA uA TSD VOVP Vcc≥6.9V 140 23 160 25 27 °C V VLU VSL IOVER 2.4 1.5 2.82 2.55 1.8 3.2 2.7 2.1 3.58 V V A IFB VSD IDELAY VFB = GND VFB ≥ 6.9V VFB = 5V 0.7 6.9 4.0 0.9 7.5 5.0 1.1 8.1 6.0 mA V µA FOSC FSTABLE ∆FOSC DMAX DMIN 12V ≤ VCC ≤ 23V -25°C ≤ Ta ≤ 85°C 270 0 0 72 300 1 ±5 80 330 3 ±10 88 0 kHz % % % % VSTART VSTOP VFB = GND VFB = GND 14 8 15 9 16 10 V V Symbol Condition Min. Typ. Max. Unit CURRENT LIMIT(SELF-PROTECTION)SECTION Note: 1. These parameters, although guaranteed at the design, are not tested in mass production. 2. These parameter indicates inductor current. 5 FS6X1220R Typical Performance Characteristics (These Characteristic Graphs are Normalized at Ta= 25°C) (uA) 60 58 56 [mA] 11 10.5 10 54 52 50 -25 0 25 50 75 100 125 150 Temp(℃) 9.5 9 -25 0 25 50 75 100 125 150 Temp(℃) Figure 1. Start Up Current vs. Temp. (V) 16.0 (V) 9.50 Figure 2. Operating Supply Current vs. Temp. 15.5 9.25 9.00 15.0 14.5 8.75 8.50 14.0 -25 0 25 50 75 100 125 150 Temp(℃) -25 0 25 50 75 100 125 150 Temp(℃) Figure 3. Start Threshold Voltage vs. Temp. (KHz) 305.0 303.0 301.0 Figure 4. Stop Threshold Voltage vs. Temp. [%] 81 80.5 80 299.0 297.0 295.0 -25 0 25 50 75 100 125 150 Temp(℃) 79.5 79 -25 0 25 50 75 Temp(℃) 100 125 150 Figure 5. Initial Frequency vs. Temp. Figure 6. Maximum Duty vs. Temp. 6 FS6X1220R Typical Performance Characteristics (Continued) (These Characteristic Graphs are Normalized at Ta= 25°C) [V] 26.0 [uA] 5.3 5.2 25.5 5.1 25.0 5.0 4.9 24.5 4.8 4.7 -25 0 25 50 75 100 125 150 24.0 Temp(℃) Figure 7.Over Voltage Protection vs. Temp. -25 0 25 50 75 100 125 150 Temp(℃) Figure 8. Shutdown Delay Current vs. Temp. [mA] 1.1 1.05 1 [V] 7.6 7.55 7.5 7.45 7.4 -25 0 25 50 75 100 125 150 0.95 0.9 0.85 0.8 -25 0 25 50 75 100 125 150 Temp(℃) Figure 9. Shutdown Feedback Voltage vs. Temp. [V] Temp(℃) Figure 10. Feedback Source Current vs. Temp. [A] 3.3 3.25 2.7 2.6 3.2 3.15 3.1 2.5 2.4 3.05 3 -25 2.3 -25 0 25 50 75 100 125 150 Temp(℃) 0 25 50 75 100 125 150 Temp(℃) Figure 12. Peak Current Limit vs. Temp. Figure 11. Line UVLO threshold voltage vs. Temp. 7 FS6X1220R Functional Description 1. Startup : To guarantee stable operation of the control IC, Vcc has under voltage lockout (UVLO) with 6V hysteresis. Figure 1 shows the relation between the supply current (Icc) and the supply voltage (Vcc). Before Vcc reaches 15V, the start-up current is 60µA, which is usually provided by the DC link through start-up resistor. When Vcc reaches 15V, the control IC begins operation and the operating current increases to 10mA as shown. Once the control IC starts operation, it continues its normal operation unless Vcc goes below the stop voltage of 9V. Icc 3. Protection Circuit : Besides pulse-by-pulse current limit, the FS6X1220R has 3 self protection functions; over load protection (OLP), over voltage protection (OVP) and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external components, the reliability can be improved. In the event of these fault conditions, FS6X1220R enters into auto-restart operation. Once the fault condition occurs, switching operation is terminated and MOSFET remains off, which causes Vcc to be reduced. When Vcc reaches 9V, the protection is reset and the supply current reduces to 60uA. Then, Vcc begin to increase with the current provided through the start-up resistor. When Vcc reaches 15V, FS6X1220R resumes its normal operation if the fault condition is removed. In this manner, the auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is eliminated as illustrated in figure 3. Fault occurs 10mA Vds Power on Fault removed 60uA Vstop=9V Vstart=15V Vz Vcc Vcc Figure 1. Relation between supply current and voltage 2. Feedback Control : The FS6X1220R employs current mode control. The voltage of the feedback pin is compared with the current sense voltage for pulse width modulation (PWM). Figure 2 illustrates the simplified PWM block. The feedback voltage determines the peak drain current of the SenseFET. Usually opto-coupler along with TL431 are used to implement feedback network. The collector of the optocoupler transistor is connected to feedback pin and the emitter is connected to the ground pin. When the voltage of the reference pin of TL431 exceeds the internal reference voltage of 2.5V, the opto-coupler diode current increases, pulling down the feedback voltage. 15V 9V Icc 10mA 60uA t Normal operation Fault situation Normal operation Vcc 5uA Vref 0.9mA OSC Figure 3. Auto restart operation after protection Vo Vfb FB 4 Cfb D1 D2 Vfb* 28R Gate driver R 431 VSD OLP 3.1 Pulse-by-pulse current limit : As shown in figure 2, the drain current of the power MOSFET is limited by the inverting input of PWM comparator (Vfb*). Assuming that the 0.9mA current source flows only through the internal resistor (28R +R= 2.9k), the cathode voltage of diode D2 is about 2.6V. Since D1 is blocked when the feedback voltage (Vfb) exceeds 2.6V, the maximum voltage of the cathode of D2 is 2.6V. Therefore, the maximum value of Vfb* is about 0.1V, which limits the peak value of the power MOSFET drain current. Figure 2. Pulse width modulation (PWM) circuit 8 FS6X1220R 3.2 Over Load Protection (OLP) : Overload means that the load current exceeds a pre-set level due to an abnormal situation. In this situation, protection circuit should be activated in order to protect the SMPS. However, even when the SMPS is in the normal operation, the over load protection circuit can be activated during the load transition. In order to avoid this undesired operation, the over load protection circuit is designed to be activated after a specified period to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SMPS is limited, and therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage (Vo) decreases below the set voltage. This reduces the current through the opto-coupler diode, which also reduces opto-coupler transistor current increasing Vfb. If Vfb exceeds 2.6V, D1 is blocked and the 5µA current source starts to charge Cfb slowly compared to when the 0.9mA current source charges Cfb. In this condition, Vfb continues increasing until it reaches 7.5V, and the switching operation is terminated at that time as shown in figure 4. The delay time for shutdown is the time required to charge Cfb from 2.6V to 7.5V with 5µA. When Cfb is 10nF (103), T12 is approximately 9.8ms and when Cfb is 0.1µF (104), T12 is approximately 98ms. These values are enough to prevent SMPS from being shut down during transient situations. voltage and FS6X1220R uses Vcc instead of directly monitoring the output voltage. If VCC exceeds 25V, OVP circuit is activated resulting in termination of switching. In order to avoid undesired activation of OVP during normal operation, Vcc should be properly designed to be below 25V. 3.4 Thermal Shutdown (TSD) : The thermal shutdown circuitry senses the junction temperature. The threshold is set at 160°C. When the junction temperature rises above this threshold (160°C) the power MOSFET is disabled. 4. The Line UVLO and Sleep Mode According to the voltage of Line Sense pin, three operation modes are defined; Normal operation mode, Line under voltage lock out mode and Sleep mode as shown in figure 5. When the voltage of this pin is over 2.55V, FS6X1220R operates in normal mode. When the voltage of this pin is smaller than 2.55V, it goes into line under voltage lock out mode terminating switching operation. When the voltage of this pin is smaller than 1.8V, it enters into sleep mode. During sleep mode, reference voltage generation circuit including shunt regulator is disabled and only 300µA operation current is required. Vin 3 Vcc good Vcc VFB Over load protection 7.5V Sleep ON OFF 9V/15V R1 Line Sense VSL (1.8v) 5 VLU (2.5V) Line UVLO Internal Bias Enable Vref R2 2.6V T12= Cfb*(7.5-2.6)/Idelay T1 Figure 4. Over load protection T2 t Figure 5. Line Sense block 3.3 Over voltage Protection (OVP) : In case of malfunction in the secondary side feedback circuit, or feedback loop open caused by a defect of solder, the current through the optocoupler transistor becomes almost zero. Then, Vfb climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the secondary side until the over load protection is activated. Because energy more than required is provided to the output, the output voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side. In order to prevent this situation, an over voltage protection (OVP) circuit is employed. In general, Vcc is proportional to the output 9 FS6X1220R Typical Application Circuit 1. Application circuit for DC-DC converter (Flyback) 1 T1: EPC19 9 D201 1 + L201 2 + 12V 2A DC INPUT VOLTAGE: 36~72V C101 47uF/100V R103 120K C103 12nF R104 10K C201 330uF/16V 2 6 C202 330uF/16V D101 UF4007 R201 1K IC201 H11A817A R101 200k D102 1N4148 5 L&S 4 3 Vfb Vcc R105 10 Drain GND 1 2 R202 1k R203 30k R204 15K C105 10nF R205 3.9K 3 4 IC201 KA431 C102 10n R106 R102 18k + IC101 FS6X1220RT C109 4.7nF Sleep On/Off signal 3.9k IC102 KSC945 C104 22uF/50V C105 47nF/50V 2. Transformer Schematic Diagram 10 FS6X1220R 3.Winding Specification No Np1 Nvo1 Nvcc Np2 Pin (s→f) 2→1 9→6 3→4 2→1 Wire 0.3 × 1 0.3φ × 2 0.2φ × 1 0.3φ × 1 φ Turns 20 12 18 20 Winding Method Solenoid Winding Solenoid Winding Solenoid Winding Solenoid Winding Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Outer Insulation: Polyester Tape t = 0.050mm, 2Layers 4.Electrical Characteristics Pin Inductance Leakage Inductance 1-2 1-2 Specification 22uH ± 10% 2uH Max Remarks 300kHz, 1V 2nd all short 5. Core & Bobbin Core : EPC 19 Bobbin : EPC 19 Ae(mm2) : 22.7 6.Demo Circuit Part List Part R101 R102 R103 R104 R105 R106 R201 R202 R203 R204 R205 C101 C102 C103 C104 C105 Value Resistor 200K, 1/4W 18K, 1/4W 120K, 1/4W 10K, 1/4W 18, 1/4W 3.9K, 1/4W 1K, 1/4W 1K, 1/4W 33K, 1/4W 15K, 1/4W 3.9K, 1/4W Capacitor 47uF, 100V 10nF, 50V 1.2nF, 200V 22uF, 50V 47nF, 50V Electrolytic Capacitor Ceramic Capacitor Ceramic Capacitor Electrolytic Capacitor Electrolytic Capacitor IC101 IC102 IC201 PC FS6X1220RT KSC945 KA431(LM431) H11A817A D101 D102 D201 UF4004 1N4148 MBRF10100 IC (3.2A, 200V) npn transistor Voltage reference Photo coupler / QT Note Part C201 C202 C203 Value 330uF/16V 330uF/16V 10nF/50V Diode Note Electrolytic Capacitor Electrolytic Capacitor Ceramic Capacitor - 11 FS6X1220R Package Dimensions TO-220F-5L 12 FS6X1220R Package Dimensions (Continued) TO-220F-5L(Forming) 13 FS6X1220R Package Dimensions (Continued) D2-PAK-5L 14 FS6X1220R Ordering Information Product Number FS6X1220RTTU FS6X1220RTYDTU FS6X1220RD TU : Non Forming Type YDTU : Forming Type Package TO-220F-5L TO-220F-5L(Forming) D2-PAK-5L Marking Code 6X1220R BVdss 200V Rds(on)Max. 0.30Ω 15 FS6X1220R DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 4/7/04 0.0m 001  2004 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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