FSFM261N

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) August 2009 FSFM260N / FSFM261N / FSFM300N Green-Mode Fairchild Power Switch (FPS™) Features ! Internal Avalanche-Rugged SenseFET ! Advanced Burst-Mode Operation Consumes Under Description The FSFM260/261/300 is an integrated Pulse Width Modulator (PWM) and SenseFET specifically designed for high-performance offline Switch Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high-voltage powerswitching regulator that combines an avalanche-rugged SenseFET with a current-mode PWM control block. The PWM controller includes an integrated fixed-frequency oscillator, under-voltage lockout, leading-edge blanking (LEB), optimized gate driver, internal soft-start, temperature-compensated precise-current sources for a loop compensation, and self-protection circuitry. Compared with discrete MOSFET and PWM controller solutions, it can reduce total cost, component count, size, and weight while simultaneously increasing efficiency, productivity, and system reliability. This device is a basic platform for cost-effective designs of flyback converters. 1W at 240VAC and 0.5W Load ! Precision Fixed Operating Frequency: 67kHz ! Internal Startup Circuit ! Over-Voltage Protection (OVP) ! Overload Protection (OLP) ! Internal Thermal Shutdown Function (TSD) ! Abnormal Over-Current Protection (AOCP) ! Auto-Restart Mode ! Under-Voltage Lockout (UVLO) with Hysteresis ! Low Operating Current: 2.5mA ! Built-in Soft-Start: 15ms Applications ! Power Supply for LCD TV and Monitor, VCR, SVR, STB, DVD, and DVD Recorder ! Adapter Related Resources Visit: http://www.fairchildsemi.com/apnotes/ for: ! AN-4134: Design Guidelines for Offline Forward ! ! ! ! ! ! Converters Using Fairchild Power Switch (FPS™) AN-4137: Design Guidelines for Offline Flyback Converters Using Fairchild Power Switch (FPS™) AN-4140: Transformer Design Consideration for Offline Flyback Converters Using Fairchild Power Switch (FPS™) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPS™) Flyback Applications AN-4145: Electromagnetic Compatibility for Power Converters AN-4147: Design Guidelines for RCD Snubber of Flyback Converters AN-4148: Audible Noise Reduction Techniques for Fairchild Power Switch (FPS™) Applications © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Ordering Information Maximum Output Power(1) Product Number FSFM260N FSFM261N FSFM300N PKG.(5) Operating Current RDS(ON) Temp. Limit Max. -25 to +85°C -25 to +85°C -25 to +85°C 1.5A 1.5A 1.6A 2.6Ω 2.7Ω 2.2Ω 230VAC±15%(2) Adapter(3) 23W 23W 26W 85-265VAC Adapter(3) 17W 17W 20W Open Frame(4) 35W 35W 40W Open Frame(4) 26W 26W 30W Replaces Devices 8-DIP 8-DIP 8-DIP FSDM0465RS FSQ0465RS Notes: 1. The junction temperature can limit the maximum output power. 2. 230VAC or 100/115VAC with doubler. 3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature. 4. Maximum practical continuous power in an open-frame design at 50°C ambient. 5. Eco status for all the FSFM260N, FSFM261N and FSFM300NS is RoHS. For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Eco Status: RoHS. © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 2 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Application Diagram VO AC IN VSTR ILIM Drain PWM GND FB V CC FSFM260 Rev. 00 Figure 1. Typical Flyback Application Internal Block Diagram Vstr 5 VCC 2 Drain 678 VCC VBURL/VBURH VCC Idelay IFB 2.5R Normal Burst OSC Vref VCC good 8V/12V VCC FB 3 ILIM 4 PWM SoftStart SQ LEB 250ns RQ Gate driver R VSD VCC VOVP LPF SQ RQ 1 VOCP GND TSD VCC good FSFM260 Rev.00 Figure 2. Internal Block Diagram © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 3 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Pin Configuration GND VCC FB ILIM 8-DIP Drain Drain Drain VSTR FSFM260 Rev.1.0.0 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # 1 2 Name GND VCC Description Ground. This pin is the control ground and the SenseFET source. Power Supply. This pin is the positive supply input, providing internal operating current for both startup and steady-state operation. Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload protection triggers, which shuts down the FPS. Peak Current Limit. Adjusts the peak current limit of the Sense FET. The feedback 0.9mA current source is diverted to the parallel combination of an internal 2.8kΩ resistor and any external resistor to GND on this pin to determine the peak current limit. Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is disabled. It is not recommended to connect VSTR and drain together. SenseFET Drain. High-voltage power SenseFET drain connection. 3 FB 4 ILIM 5 6,7,8 VSTR Drain © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 4 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25°C, unless otherwise specified. Symbol VSTR VDS1 VDS2 VCC VFB IDM VSTR Pin Voltage Parameter Drain Pin Voltage of FSFM260N and FSFM300N Drain Pin Voltage of FSFM261N Supply Voltage Feedback Voltage Range Drain Current Pulsed Continuous Drain Current of FSFM260 and FSFM261(7) Continuous Drain Current of FSFM300(7) Single Pulsed Avalanche Energy(8) Total Power Dissipation (TC=25°C) Operating Junction Temperature Operating Ambient Temperature Storage Temperature Electrostatic Discharge Capability Human Body Model, JESD22-A114 Electrostatic Discharge Capability, Charged Device Model, JESD22-C110 TC = 25°C TC = 100°C TC = 25°C TC = 100°C FSFM260 and FSFM261 FSFM300 (6) Min. 650 650 700 Max. Unit V V V 21 -0.3 8.0 9.6 2.2 1.4 2.8 1.7 120 190 1.5 Internally Limited -25 -55 2.0 +85 +150 V V A ID A EAS PD TJ TA TSTG ESD mJ W °C °C °C kV 2.0 Notes: 6. VFB is internally clamped and its maximum clamping current capability is 100μA. 7. Repetitive rating: pulse-width limited by maximum junction temperature. 8. L=14mH, starting TJ=25°C. Thermal Impedance TA = 25°C unless otherwise specified. Symbol θJA θJC ΨJT Parameter Junction-to-Ambient Thermal Resistance(9) (10) Package 8-DIP Value 80 20 35 Unit °C/W ° Junction-to-Case Thermal Resistance Junction-to-Top Thermal C/W Resistance(11) °C/W Notes: 9. Free standing with no heat-sink under natural convection. 10. Infinite cooling condition - refer to the SEMI G30-88. 11. Measured on the package top surface. © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 5 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Electrical Characteristics TA = 25°C unless otherwise specified. Symbol SenseFET Section BVDSS1 BVDSS2 IDSS1 IDSS2 Parameter Drain Source Breakdown Voltage of FSFM260 and FSFM300 Drain Source Breakdown Voltage of FSFM261 Zero Gate Voltage Drain Current1 Zero Gate Voltage Drain Current2 Static Drain Source on Resistance of FSFM260(12) Condition Min. Typ. Max. Unit VCC = 0V, ID = 250µA VCC = 0V, ID = 250µA VDS = 650V, VGS = 0V, TC = 25°C VDS = 520V, VGS = 0V, TC = 125°C 650 700 250 250 2.20 2.60 2.70 2.20 V V µA µA Ω Ω Ω pF RDS(ON) Static Drain Source on Resistance of FSFM261(12) Static Drain Source on Resistance of FSFM300(12) VGS = 10V, ID = 2.5A 2.30 1.76 COSS td(on) tr td(off) tf COSS td(on) tr td(off) tf fOSC ΔfSTABLE ΔfOSC IFB DMAX DMIN VSTART VSTOP tS/S VBURH VBURL Output Capacitance of FSFM260/261 Turn-On Delay Time of FSFM260/261 Rise Time of FSFM260/261 Turn-Off Delay Time of FSFM260/261 Fall Time of FSFM260/261 Output Capacitance of FSFM300 Turn-On Delay Time of FSFM300 Rise Time of FSFM300 Turn-Off Delay Time of FSFM300 Fall Time of FSFM300 Switching Frequency Switching Frequency Stability Switching Frequency Maximum Duty Cycle Minimum Duty Cycle UVLO Threshold Voltage Internal Soft-Start Time Variation(13) Feedback Source Current VGS = 0V, VDS = 25V, f = 1MHz 60 12 20 30 16 75 14 26 32 25 VDD = 325V, ID = 5A ns VGS = 0V, VDS = 25V, f = 1MHz pF VDD = 325V, ID = 5A ns Control Section VFB = 3V 13V ≤ VCC ≤ 18V -25°C ≤ TA ≤ 85°C VFB = GND 61 0 0 0.7 71 11 7 10 67 1 ±5 0.9 77 12 8 15 0.50 0.35 73 3 ±10 1.1 83 0 VFB = GND VFB = 3V 13 9 20 kHz % % mA % % V V ms V V Burst Mode Section Burst Mode Voltages VCC = 14V © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 6 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Electrical Characteristics (Continued) TA = 25°C unless otherwise specified. Symbol Protection Section VSD IDELAY tLEB ILIMIT VOVP TSD IOP ISTART ICH VSTR Parameter Shutdown Feedback Voltage Shutdown Delay Current Leading Edge Blanking Time(13) Peak Current Limit Over-Voltage Protection Thermal Shutdown Temperature(13) FSFM260/ FSFM261 FSFM300 Condition VFB ≥ 5.5V VFB = 5V Min. Typ. Max. Unit 5.5 3.5 200 6.0 5.0 6.5 6.5 V µA ns 1.50 1.60 19.0 140 3 200 0.85 24 5 250 1.00 1.68 1.79 20.5 V °C mA µA mA V A TJ = 25°C, di/dt = 200mA/µs 1.32 1.41 18.0 125 Total Device Section Operating Supply Current Start Current Startup Charging Current Minimum VSTR Supply Voltage VFB = GND, VCC = 14V VCC = 10V (before VCC reaches VSTART) VCC = 0V, VSTR=min. 50V at ISTRIN=ISTART 1 150 0.70 Notes: 12. Pulse test: pulse width ≤ 300µs, duty ≤ 2%. 13. Guaranteed by design; not tested in production. © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 7 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Typical Performance Characteristics Graphs are normalized at TA= 25°C. Normalized 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Normalized 1.2 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Temperature [°C] Figure 4. Operating Supply Current (IOP) vs. TA Temperature [°C] Figure 5. UVLO Start Threshold Voltage (VSTART) vs. TA Normalized 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Normalized 1.2 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Temperature [°C] Figure 6. UVLO Stop Threshold Voltage (VSTOP) vs. TA Temperature [°C] Figure 7. Startup Charging Current (ICH) vs. TA Normalized 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Normalized 1.2 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Temperature [°C] Figure 8. Switching Frequency (fOSC) vs. TA © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 8 Temperature [°C] Figure 9. Maximum Duty Cycle (DMAX) vs. TA www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Typical Performance Characteristics (Continued) Graphs are normalized at TA= 25°C. Normalized 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Normalized 1.2 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Temperature [°C] Figure 10. Over-Voltage Protection (VOVP) vs. TA Temperature [°C] Figure 11. Feedback Source Current (IFB) vs. TA Normalized 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Normalized 1.2 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Temperature [°C] Figure 12. Shutdown Delay Current (IDELAY) vs. TA Temperature [°C] Figure 13. Burst-Mode HIGH Threshold Voltage (VBURH) vs. TA Normalized 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Normalized 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 Temperature [°C] Figure 14. Burst-Mode LOW Threshold Voltage (VBURL) vs. TA © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 9 Temperature [°C] Figure 15. Peak Current Limit (ILIMIT) vs. TA www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Functional Description 1. Startup: In previous generations of Fairchild Power Switches (FPS™), the VCC pin had an external startup resistor to the DC input voltage line. In this generation, the startup resistor is replaced by an internal highvoltage current source. At startup, an internal highvoltage current source supplies the internal bias and charges the external capacitor (Cvcc) connected to the VCC pin, as illustrated in Figure 16. When VCC reaches 12V, the FSFM260/261/300 begins switching and the internal high-voltage current source is disabled. Then, the FSFM260/261/300 continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless VCC goes below the stop voltage of 8V. VDC values of 2.5V and 1.5A, respectively. The pulse-bypulse current limit can be adjusted using a resistor to GND on the current limit pin (#4). The current limit level using an external resistor (RLIM) is given by: ILIM = RLIM⋅ ILIM_SPEC 2.8kΩ + RLIM (1) (2) => RLIM = ILIM ⋅ 2.8kΩ ILIM _SPEC − ILIM where, ILIM is the desired drain current limit. VCC Idelay VCC IFB OSC VO FOD817A Vfb CB 3 D1 D2 + Vfb* 2.5R SenseFET R Gate driver KA431 - CVcc VSD OLP Rsense VCC 2 Istart Vref 8V/12V VCC good 5 Vstr FSFM260 Rev: 00 Figure 17. Pulse Width Modulation (PWM) Circuit 2.2 Leading-Edge Blanking (LEB): At the instant the internal SenseFET is turned on, a high-current spike occurs through the SenseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the RSENSE resistor would lead to incorrect feedback operation in the currentmode PWM control. To counter this effect, the FSFM260/ 261/300 employs a leading edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (tLEB) after the SenseFET is turned on. 2.3 Constant Power Limit Circuit: Due to the circuit delay of FPS, the pulse-by-pulse limit current increases a little bit when the input voltage increases. This means unwanted excessive power is delivered to the secondary side. To compensate, the auxiliary power compensation network in Figure 18 can be used. RLIM can adjust pulseby-pulse current by absorbing internal current source (IFB: typical value is 0.9mA) depending on the ratio between resistors. With the suggested compensation circuit, additional current from IFB is absorbed more proportionally to the input voltage (VDC) and achieves constant power in wide input range. Choose RLIM for proper current to the application, then check the pulseby-pulse current difference between minimum and maximum input voltage. To eliminate the difference (to gain constant power), Ry can be calculated by: Internal Bias FSFM260 Rev: 00 Figure 16. Internal Startup Circuit 2. Feedback Control: FSFM260/261/300 employs current-mode control, as shown in Figure 17. An optocoupler (such as the FOD817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the RSENSE resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5V, the opto coupler LED current increases, pulling down the feedback voltage and reducing the duty cycle. This typically occurs when the input voltage is increased or the output load is decreased. 2.1 Pulse-by-Pulse Current Limit: Because currentmode control is employed, the peak current through the SenseFET is determined by the inverting input of the PWM comparator (VFB*), as shown in Figure 17. When the current through the opto-transistor is zero and the current limit pin (#4) is left floating, the feedback current source (IFB) of 0.9mA flows only through the internal resistor (R+2.5R=2.8k). In this case, the cathode voltage of diode D2 and the peak drain current have maximum Ilim_spec ×Vdc × Ry ≅ Na Np Ifb × ΔIlim_comp (3) © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 10 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) where, Ilim_spec is the limit current stated on the specification; Na and Np are the number of turns for VCC and primary side, respectively; Ifb is the internal current source at feedback pin with a typical value of 0.9mA; and ΔIlim_comp is the current difference that must be eliminated. In case of capacitor in the circuit 1µF, 100V is good choice for all applications. components, the reliability is improved without increasing cost. Once the fault condition occurs, switching is terminated and the SenseFET remains off. This causes VCC to fall. When VCC reaches the UVLO stop voltage, 8V, the protection is reset and the internal high-voltage current source charges the VCC capacitor via the Vstr pin. When VCC reaches the UVLO start voltage, 12V, the FSFM260/261/300 resumes normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated (see Figure 19). 3.1 Overload Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is in the normal operation, the overload protection circuit can be activated during the load transition. To avoid this undesired operation, the overload protection circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SenseFET is limited and, therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage (VO) decreases below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the optocoupler transistor current, increasing the feedback voltage (VFB). If VFB exceeds 2.5V, D1 is blocked and the 5µA current source starts to charge CB slowly up to VCC. In this condition, VFB continues increasing until it reaches 6V, when the switching operation is terminated, as shown in Figure 20. The delay time for shutdown is the time required to charge CB from 2.5V to 6.0V with 5µA. In general, a 10 ~ 50ms delay time is typical for most applications. VFB FSFM260 Rev: 00 VDC Np L Vfb Drain Vcc Na I_lim RLIM GND RY FSFM260 Rev. 00 - compensation network Vy = VDC × Na Np CY + Figure 18. Constant Power Limit Circuit Fault occurs Vds Power on Fault removed Vcc Overload protection 12V 8V 6.0V t Normal operation Fault situation Normal operation 2.5V FSFM260 Rev: 00 T12= Cfb*(6.0-2.5)/Idelay T1 T2 Figure 19. Auto Restart Operation t 3. Protection Circuit: The FSFM260/261/300 has several self protective functions, such as overload protection (OLP), over-voltage protection (OVP), and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external Figure 20. Overload Protection © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 11 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) 3.2 Over-Voltage Protection (OVP): If the secondary side feedback circuit malfunctions or a solder defect causes an open in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then, VFB climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is activated. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the overload protection is activated, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an overvoltage protection (OVP) circuit is employed. In general, VCC is proportional to the output voltage and the FSFM260/261/300 uses VCC instead of directly monitoring the output voltage. If VCC exceeds 19V, an OVP circuit is activated, terminating the switching operation. To avoid undesired activation of OVP during normal operation, VCC should be designed below 19V. 3.3 Thermal Shutdown (TSD): The SenseFET and the control IC are built in one package. This allows for the control IC to detect the heat generation from the SenseFET. When the temperature exceeds approximately 140°C, the thermal shutdown is activated. 3.4 Abnormal Over-Current Protection (AOCP): When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the LEB time. Even though the FPS has overload protection, it is not enough to protect the FPS in those abnormal cases, since severe current stress is imposed on the SenseFET until OLP triggers. This IC has an internal AOCP circuit shown in Figure 21. When the gate turn-on signal is applied to the power SenseFET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing resistor voltage is greater than the AOCP level, the set signal is applied to the latch, resulting in the shutdown of the SMPS. 4. Soft-Start: The FSFM260/261/300 has an internal soft- start circuit that increases PWM comparator inverting input voltage, together with the SenseFET current, slowly after it starts up. The typical soft-start time is 15ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish the required output voltage. It also helps prevent transformer saturation and reduce the stress on the secondary diode during startup. 5. Burst Operation: To minimize power dissipation in standby mode, the FSFM260/261/300 enters burst mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 22, the device automatically enters burst mode when the feedback voltage drops below VBURL (350mV). At this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBURH (500mV) switching resumes. The feedback voltage then falls and the process repeats. Burst mode operation alternately enables and disables switching of the power SenseFET, thereby reducing switching loss in standby mode. Vo Voset VFB 0.5V 0.35V Ids OSC 2.5R LEB R S R Q Q Vds Gate driver time FSFM260 Rev: 00 AOCP protection VOCP FSFM260 Rev: 00 T1 Switching disabled T2 T3 Switching disabled T4 1 GND Figure 22. Waveforms of Burst Operation Figure 21. Abnormal Over-Current Protection © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 12 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) PCB Layout Guide Due to the combined scheme, FPS shows better noise immunity than conventional PWM controller and MOSFET discrete solutions. Furthermore, internal drain current sense eliminates noise generation caused by a sensing resistor. There are some recommendations for PCB layout to enhance noise immunity and suppress the noise inevitable in power-handling components. There are typically two grounds in the conventional SMPS: power ground and signal ground. The power ground is the ground for primary input voltage and power, while the signal ground is ground for PWM controller. In FPS, those two grounds share the same pin, GND. Normally the separate grounds do not share the same trace and meet only at one point, the GND pin. More, wider patterns for both grounds are good for large currents by decreasing resistance. Capacitors at the VCC and FB pins should be as close as possible to the corresponding pins to avoid noise from the switching device. Sometimes Mylar® or ceramic capacitors with electrolytic for VCC is better for smooth operation. The ground of these capacitors needs to connect to the signal ground not the power ground. The cathode of the snubber diode should be close to the drain pin to minimize stray inductance. The Y-capacitor between primary and secondary should be directly connected to the power ground of DC link to maximize surge immunity. Because the voltage range of feedback line is small, it is affected by the noise of the drain pin. Those traces should not draw across or close to the drain line. In FSFM260/261/300, drain pins are the heat radiation pins, so wider PCB pattern is recommended to decrease the package temperature. Drain pins are also high voltage switching pins; however, too wide PCB pattern may deteriorate EMI immunity. Figure 23. Recommended PCB Layout Mylar® is a registered trademark of DuPont Teijin Films. © 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 13 www.fairchildsemi.com FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™) Typical Application Circuit Application LCD Monitor Power Supply FPS™ Device FSFM300N Input Voltage Range 85-265VAC Rated Output Power 30W Output Voltage (Maximum Current) 5.0V (2.0A) 14V (1.4A) Features ! Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input ! Low standby mode power consumption (