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FSFR2100_08

FSFR2100_08

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FSFR2100_08 - Power Switch (FPS™) for Half-Bridge Resonant Converters - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FSFR2100_08 数据手册
FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter May 2008 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converters Features Variable Frequency Control with 50% Duty Cycle for Half-bridge Resonant Converter Topology High Efficiency through Zero Voltage Switching (ZVS) Internal SuperFET™s with Fast-Recovery Type Body Diode (trr=120ns) for FSFR2100 and UniFETs with Fast-Recovery Type Body Diode (trr 0.6V No switching, VCON < 0.4V fOSC=100KHz, VCON > 0.6V No switching, VCON < 0.4V 50 100 6 100 7 2 50 120 200 9 200 11 4 μA μA μA mA μA mA mA UVLO Section LVCCUV+ LVCCUVLVCCUVH HVCCUV+ HVCCUVHVCCUVH LVCC Supply Under-Voltage Positive Going Threshold (LVCC Start) LVCC Supply Under-Voltage Negative Going Threshold (LVCC Stop) LVCC Supply Under-Voltage Hysteresis HVCC Supply Under-Voltage Positive Going Threshold (HVCC Start) HVCC Supply Under-Voltage Negative Going Threshold (HVCC Stop) HVCC Supply Under-Voltage Hysteresis 8.2 7.8 13.0 10.2 14.5 11.3 3.2 9.2 8.7 0.5 10.2 9.6 16.0 12.4 V V V V V V © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 6 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Electrical Characteristics (Continued) TA=25°C unless otherwise specified. Specifications Symbol Parameter Test Conditions Min Oscillator & Feedback Section VCONDIS VCONEN VRT fOSC DC fSS tSS Control Pin Disable Threshold Voltage Control Pin Enable Threshold Voltage V-I Converter Threshold Voltage Output Oscillation Frequency Output Duty Cycle Internal Soft-Start Initial Frequency Internal Soft-Start Time fSS=fOSC+40kHz, RT=5.2KΩ 2 RT=5.2KΩ 0.36 0.54 1.5 94 48 0.40 0.60 2.0 100 50 140 3 4 0.44 0.66 2.5 106 52 V V V KHz % KHz ms Typ Max Unit Protection Section IOLP VOLP VOVP VAOCP tBAO VOCP tBO tDA TSD ISU VPRSET OLP Delay Current OLP Protection Voltage LVCC Over-Voltage Protection AOCP Threshold Voltage AOCP Blanking Time (5) VCON=4V VCON > 3.5V L-Vcc > 21V ΔV/Δt=-0.1V/µs VCS < VAOCP; ΔV/Δt=-0.1V/µs V/Δt=-1V/µs VCS < VOCP; ΔV/Δt=-1V/µs ΔV/Δt=-1V/µs 3.6 4.5 21 -1.0 4.8 5.0 23 -0.9 50 6.0 5.5 25 -0.8 μA V V V ns OCP Threshold Voltage OCP Blanking Time (5) -0.64 1.0 -0.58 1.5 250 -0.52 2.0 400 150 150 V μs ns °C μA V Delay Time (Low Side) Detecting from VAOCP (5) to Switch Off Thermal Shutdown Temperature (5) 110 LVcc=7.5V 5 130 100 Protection Latch Sustain LVCC Supply Current Protection Latch Reset LVCC Supply Voltage (6) Dead-Time Control Section DT Dead Time 350 ns Notes: 5. This parameter, although guaranteed, is not tested in production. 6. These parameters, although guaranteed, are tested only in EDS (wafer test) process. © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 7 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Typical Performance Characteristics These characteristic graphs are normalized at TA=25ºC. 1.1 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC 1 1 0.95 0.95 0.9 -50 -25 0 25 50 O 0.9 75 100 -50 -25 0 25 50 75 100 Temp ( C) Temp (OC) Figure 4. Low-side MOSFET Duty Cycle vs. Temp. 1.1 Figure 5. Switching Frequency vs. Temp. 1.1 1.05 1.05 Normalized at 25OC 1 Normalized at 25OC -50 -25 0 25 50 75 100 1 0.95 0.95 0.9 0.9 -50 -25 0 25 50 75 100 Temp (OC) Temp (OC) Figure 6. High-side VCC (HVCC) Start vs. Temp. 1.1 Figure 7. High-side VCC (HVCC) Stop vs. Temp. 1.1 1.05 1.05 Normalized at 25OC 1 Normalized at 25OC -50 -25 0 25 50 75 100 1 0.95 0.95 0.9 0.9 -50 -25 0 25 50 75 100 Temp (OC) Temp (OC) Figure 8. Low-side VCC (LVCC) Start vs. Temp. Figure 9. Low-side VCC (LVCC) Stop vs. Temp. © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 8 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Typical Performance Characteristics (Continued) These characteristic graphs are normalized at TA=25ºC. 1.1 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC 1 1 0.95 0.95 0.9 -50 -25 0 25 50 75 100 0.9 -50 -25 0 25 50 75 100 Temp (OC) Temp (OC) Figure 10. OLP Delay Current vs. Temp. 1.1 Figure 11. OLP Protection Voltage vs. Temp. 1.1 1.05 1.05 Normalized at 25OC Normalized at 25OC 1 1 0.95 0.95 0.9 -50 -25 0 25 50 75 100 0.9 -50 -25 0 25 50 75 100 Temp (OC) Temp (OC) Figure 12. LVCC OVP Voltage vs. Temp. 1.1 Figure 13. RT Voltage vs. Temp. 1.1 1.05 1.05 Normalized at 25OC 1 Normalized at 25OC 1 0.95 0.95 0.9 -50 -25 0 25 50 75 100 0.9 -50 -25 0 25 50 75 100 Temp (OC) Temp (OC) Figure 14. CON Pin Enable Voltage vs. Temp. Figure 15. OCP Voltage vs. Temp. © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 9 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Functional Description 1. Basic Operation: FSFR-series is designed to drive high-side and low-side MOSFETs complementarily with 50% duty cycle. A fixed dead time of 350ns is introduced between consecutive transitions, as shown in Figure 16. Dead time Gain 1.8 f min 1.6 f normal f max f ISS High side MOSFET gate drive 1.4 1.2 Low side MOSFET gate drve time 1.0 Soft-start 0.8 Figure 16. MOSFETs Gate Drive Signal 0.6 60 70 80 90 100 110 freq (kHz) 120 130 140 150 2. Internal Oscillator: FSFR-series employs a currentcontrolled oscillator, as shown in Figure 17. Internally, the voltage of RT pin is regulated at 2V and the charging/discharging current for the oscillator capacitor, CT, is obtained by copying the current flowing out of RT pin (ICTC) using a current mirror. Therefore, the switching frequency increases as ICTC increases. Figure 18. Resonant Converter Typical Gain Curve LVcc VDL RT Rmax Rmin Rss Css CON Control IC SG PG Figure 19. Frequency Control Circuit Figure 17. Current Controlled Oscillator The minimum switching frequency is determined as: f min = 3. Frequency Setting: Figure 18 shows the typical voltage gain curve of a resonant converter, where the gain is inversely proportional to the switching frequency in the ZVS region. The output voltage can be regulated by modulating the switching frequency. Figure 19 shows the typical circuit configuration for RT pin, where the opto-coupler transistor is connected to the RT pin to modulate the switching frequency. 5.2k Ω × 100(kHz ) Rmin (1) Assuming the saturation voltage of opto-coupler transistor is 0.2V, the maximum switching frequency is determined as: f max = ( 5.2k Ω 4.68k Ω + ) × 100(kHz ) Rmin Rmax (2) To prevent excessive inrush current and overshoot of output voltage during start-up, increase the voltage gain of the resonant converter progressively. Since the voltage gain of the resonant converter is inversely proportional to the switching frequency, the soft-start is implemented by sweeping down the switching frequency ISS from an initial high frequency (f ) until the output voltage is established. The soft-start circuit is made by © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 10 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter connecting R-C series network on the RT pin, as shown in Figure 19. FSFR-series also has an internal soft-start for 3ms to reduce the current overshoot during the initial cycles, which adds 40kHz to the initial frequency of the external soft-start circuit, as shown in Figure 20. The initial frequency of the soft-start is given as: f ISS = ( 5.2k Ω 5.2k Ω ) × 100 + 40 (kHz ) (3) + Rmin RSS It is typical to set the initial frequency of soft-start two ~ three times the resonant frequency (fO) of the resonant network. The soft-start time is three to four times of the RC time constant. The RC time constant is as follows: Figure 22. Control Pin Configuration for Pulse Skipping Remote On / Off: When an auxiliary power supply is used for standby, the main power stage using FSFRseries can be shut down by pulling down the control pin voltage, as shown in Figure 23. R1 and C1 are used to ensure soft-start when switching resumes. TSS = RSS ⋅ CSS fs f ISS 40kHz (4) Control loop take over time Figure 20. Frequency Sweeping of Soft-start 4. Control Pin: The FSFR-series has a control pin for protection, cycle skipping, and remote on/off. Figure 21 shows the internal block diagram for control pin. Figure 23. Remote On / Off Circuit Figure 21. Internal Block of Control Pin Protection: When the control pin voltage exceeds 5V, protection is triggered. Detailed applications are described in the protection section. Pulse Skipping: FSFR-series stops switching when the control pin voltage drops below 0.4V and resumes switching when the control pin voltage rises above 0.6V. To use pulse-skipping, the control pin should be connected to the opto-coupler collector pin. The frequency that causes pulse skipping is given as: SKIP 5. Protection Circuits: The FSFR-series has several self-protective functions, such as Overload Protection (OLP), Over-Current Protection (OCP), Abnormal OverCurrent Protection (AOCP), Over-Voltage Protection (OVP), and Thermal Shutdown (TSD). OLP, OCP, and OVP are auto-restart mode protections; while AOCP and TSD are latch-mode protections, as shown in Figure 24. Auto-restart Mode Protection: Once a fault condition is detected, switching is terminated and the MOSFETs remain off. When LVCC falls to the LVCC stop voltage of 11.3V, the protection is reset. The FPS resumes normal operation when LVCC reaches the start voltage of 14.5V. = 5.2 k 4.16 k + R min R max x100 (kHz) (5) © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 11 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Latch-Mode Protection: Once this protection is triggered, switching is terminated and the MOSFETs remain off. The latch is reset only when LVCC is discharged below 5V. Current Sensing Using Resonant Capacitor Voltage: For high-power applications, current sensing using a resistor may not be available due to the severe power dissipation in the resistor. In that case, indirect current sensing using the resonant capacitor voltage can be a good alternative because the amplitude of the resonant p-p capacitor voltage (Vcr ) is proportional to the resonant p-p current in the primary side (Ip ) as: VCr p − p = I p p− p 2π f sCr (6) To minimize power dissipation, a capacitive voltage divider is generally used for capacitor voltage sensing, as shown in Figure 27. Figure 24. Protection Blocks Np CON Cd Rd SG PG 100 VSENSE Np Ns Current Sensing Using Resistor: FSFR-series senses drain current as a negative voltage, as shown in Figure 25 and Figure 26. Half-wave sensing allows low power dissipation in the sensing resistor, while full-wave sensing has less switching noise in the sensing signal. Cr Control IC Ip Ns Ns CB Cr CSENSE Ns Control IC VCS CS SG PG Ip Ids VCr VCrp-p Ids Rsense VCS Vsense Vsense pk CB = VCr p − p Csense + CB Vsense pk = VCON 2 Figure 25. Half-wave Sensing Ids VCON Vsensepk Vsensepk Tdelay = Rd Cd VCS Figure 27. Current Sensing Using Resonant Capacitor Voltage 5.1 Over-Current Protection (OCP): When the sensing pin voltage drops below -0.6V, OCP is triggered and the MOSFETs remain off. This protection has a shutdown time delay of 1.5µs to prevent premature shutdown during startup. 5.2 Abnormal Over-Current Protection (AOCP): If the secondary rectifier diodes are shorted, large current with extremely high di/dt can flow through the MOSFET before OCP or OLP is triggered. AOCP is triggered without shutdown delay when the sensing pin voltage Cr VCS CS Control IC Np Ns SG PG Rsense Ns Ids Figure 26. Full-wave Sensing © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 12 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter drops below -0.9V. This protection is latch mode and reset when LVCC is pulled down below 5V. 5.3 Overload Protection (OLP): Overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. In this situation, the protection circuit should trigger to protect the power supply. However, even when the power supply is in the normal condition, the overload situation can occur during the load transition. To avoid premature triggering of protection, the overload protection circuit should be designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. Figure 27 shows a typical overload protection circuit. By sensing the resonant capacitor voltage on the control pin, the overload protection can be implemented. Using RC time constant, shutdown delay can be also introduced. The voltage obtained on the control pin is given as: 6. PCB Layout Guideline: Duty unbalance problems may occur due to the radiated noise from main transformer, the inequality of the secondary side leakage inductances of main transformer, and so on. Among them, it is one of the dominant reasons that the control components in the vicinity of RT pin are enclosed by the primary current flow pattern on PCB layout. The direction of the magnetic field on the components caused by the primary current flow is changed when the high and low side MOSFET turns on by turns. The magnetic fields with opposite direction from each other induce a current through, into, or out of the RT pin, which makes the turnon duration of each MOSFET different. It is highly recommended to separate the control components in the vicinity of RT pin from the primary current flow pattern on PCB layout. Figure 28 shows an example for the duty balanced case. VCON = where VCr voltage. p-p CB VCr p − p 2(CB + Csense ) (7) is the amplitude of the resonant capacitor 5.4 Over-Voltage Protection (OVP): When the LVCC reaches 23V, OVP is triggered. This protection is used when auxiliary winding of the transformer to supply VCC to FPS is utilized. 5.5 Thermal Shutdown (TSD): The MOSFETs and the control IC in one package makes it easy for the control IC to detect the abnormal over-temperature of the MOSFETs. If the temperature exceeds approximately 130°C, the thermal shutdown triggers. Figure 28. Example for Duty Balancing © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 13 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Typical Application Circuit (Half-bridge LLC Resonant Converter) Application LCD TV FPS™ Device FSFR2100 Input Voltage Range 400V (20ms hold-up time) Rated Output Power 192W Output Voltage (Rated Current) 24V-8A Features High efficiency ( >94% at 400VDC input) Reduced EMI noise through zero-voltage-switching (ZVS) Enhanced system reliability with various protection functions Brownout circuit R113 400k C109 22µF R109 1M R110 1M C111 330n/ 275VAC R111 45k C107 10µF R107 2.2k C101 220uF/ 450V C108 12nF C104 open R114 10k C102 22nF/ 630V EER3542 D211 FYP2010DN C202 2200µF 35V VCC=16~20VDC VCC 1 U5 R112 10k U4 ZD101 6.8V JP2, 0 C105 0.33µF/ 50V R106 27 D101 1N4937 16 C201 2200µF 35V 12, 13 VO LVCC C112 680pF VDL RT Line Filter R104 5.1k R105 7.5k HVCC C106 150nF R202 1k D212 FYP2010DN R201 10k 8 9 R204 62k U2 C204 12nF CON Control IC VCTR R206 2k R108 open U2 R103, 0 C110 330n/ 275VAC NTC 5D-9 F101 3.15A/ 250V JP1, 0 CS SG C103 100pF U3 KA431 C203 47nF R203 33k PG C301 R205 7k R102 1kΩ Vin=340~390Vdc R101 0.2Ω Figure 29. Typical Application Circuit © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 14 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Typical Application Circuit (Continued) Usually, LLC resonant converters require large leakage inductance value. To obtain a large leakage inductance, sectional winding method is used. Core: EER3542 (Ae=107 mm ) Bobbin: EER3542 (Horizontal) 2 Figure 30. Transformer Construction Pin (S → F) Np Ns1 Ns2 8→1 12 → 9 16 → 13 Wire 0.12φ×30 (Litz wire) 0.1φ×100 (Litz wire) 0.1φ×100 (Litz wire) Pin Specification 630μH ± 5% 135μH ± 5%. Turns 36 4 4 Winding Method Section winding Section winding Section winding Remark Primary-side Inductance (Lp) Primary-side Effective Leakage (Lr) 1- 8 1- 8 100kHz, 1V Short one of the secondary windings © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 15 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter Physical Dimensions SIPMODAA09RevA Figure 31. 9-SIP Package Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 16 FSFR-Series — Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converter © 2007 Fairchild Semiconductor Corporation FSFR series • 1.0.3 www.fairchildsemi.com 17
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