GTLP16617

GTLP16617 17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock June 1997 Revised October 1998 GTLP16617 17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock General Description The GTLP16617 is a 17-bit registered synchronous bus transceiver that provides TTL to GTLP signal level translation. It allows for transparent, latched and clocked modes of data flow and provides a buffered GTLP (CLKOUT) clock output from the TTL CLKAB. The device provides a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels. High speed backplane operation is a direct result of GTLP’s reduced output swing ( VCC ESD Rating Storage Temperature (TSTG) −50 mA +50 mA >2000V −65°C to +150°C −50 mA 80 mA −64 mA 64 mA −0.5V to +7.0V −0.5V to VCC + 0.5V −0.5V to +7.0V −0.5V to +7.0V Recommended Operating Conditions (Note 8) Supply Voltage VCC VCC VCCQ Bus Termination Voltage (VTT) GTLP Input Voltage (VI) on A-Port and Control Pins HIGH Level Output Current (IOH) A-Port LOW Level Output Current (IOL) A-Port B-Port Operating Temperature (TA) +32 mA +34 mA −40°C to +85°C −32 mA 0.0V to 5.5V 3.15V to 3.45V 4.75V to 5.25V 1.35V to 1.65V Note 6: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 7: IO Absolute Maximum Rating must be observed. Note 8: Unused inputs must be held high or low. www.fairchildsemi.com 4 GTLP16617 DC Electrical Characteristics Over Recommended Operating Free-Air Temperature Range, VREF = 1.0V (Unless Otherwise Noted). Symbol VIH VIL VREF VIK VOH A-Port B-Port Others B-Port Others GTLP GTL VCC = 3.15V, VCCQ = 4.75V VCC, VCCQ = Min to Max (Note 10) VCC = 3.15V VCCQ = 4.75V VOL A-Port VCC, VCCQ = Min to Max (Note 10) VCC = 3.15V VCCQ = 4.75V B-Port II Control Pins A-Port VCC = 3.15V VCCQ = 4.75V VCC, VCCQ = 0 or Max VCC = 3.45V VCCQ = 5.25V B-Port IOFF II(hold) IOZH IOZL ICCQ (VCCQ) A-Port and Control Pins A-Port A-Port B-Port A-Port B-Port A or B Ports VCC = 3.45V VCCQ = 5.25V VCC = VCCQ = 0 VCC = 3.15V, VCCQ = 4.75V VCC = 3.45V, VCCQ = 5.25V VCC = 3.45V, VCCQ = 5.25V VCC = 3.45V, VCCQ = 5.25V, IO = 0 , VI = VCCQ or GND ICC (VCC) ∆ICC (Note 11) A or B Ports VI = VCCQ or GND A-Port and Control Pins VCC = 3.45V, VCCQ = 5.25V, A or Control Inputs at VCC or GND CIN CI/O CI/O Control Pins A-Port B-Port VI = VCCQ or 0 VI = VCCQ or 0 VI = VCCQ or 0 8 9 6 pF VCC = 3.45V, VCCQ = 5.25V, IO = 0, Outputs Disabled Outputs HIGH Outputs LOW Outputs Disabled One Input at 2.7V 30 0 0 0 0 40 1 1 1 1 mA mA IOL = 34 mA VI = 5.5V or 0V VI = 5.5V VI = VCC VI = 0 VI = VCCQ VI = 0 VI or VO = 0 to 4.5V VI = 0.8V VI = 2.0V VO = 3.45V VO = 1.5V VO = 0 VO = 0.65V Outputs HIGH Outputs LOW 30 30 75 −20 1 5 −20 −10 40 40 mA 0.65 ±10 20 1 −30 5 −5 100 µA µA µA µA µA µA V µA IOH = −100 µA IOH = −8 mA IOH = −32 mA IOL = 100 µA IOL = 32 mA VCC −0.2 2.4 2.0 0.2 0.5 V V II = −18 mA 1.0 0.8 −1.2 Test Conditions Min VREF +0.1 2.0 0.0 VREF −0.2 0.8 Typ (Note 9) VTT V V V V V V V Max Units Note 9: All typical values are at VCC = 3.3V, VCCQ = 5.0V, and TA = 25°C. Note 10: For conditions shown as Min or Max, use the appropriate value specified under recommended operating conditions. Note 11: This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 5 www.fairchildsemi.com GTLP16617 AC Operating Requirements Over recommended ranges of supply voltage and operating free-air temperature, VREF = 1.0V (unless otherwise noted). Symbol fCLOCK tW Max Clock Frequency Pulse Duration LEAB or LEBA HIGH CLKAB or CLKBA HIGH or LOW tS Setup Time A before CLKAB↑ OEAB before CLKAB↑ B before CLKBA↑ A before LEAB↓ B before LEBA↓ CEAB before CLKAB↑ CEBA before CLKBA↑ tH Hold Time A after CLKAB↑ OEAB after CLKAB↑ B after CLKBA↑ A after LEAB↓ B after LEBA↓ CEAB after CLKAB↑ CEBA after CLKBA↑ Min 175 3.0 ns 3.2 0.5 1.5 3.1 1.3 3.7 0.7 1.0 1.5 1.0 0.0 0.5 0.0 1.5 1.7 ns ns Max Unit MHz www.fairchildsemi.com 6 GTLP16617 AC Electrical Characteristics B-Port and CL = 50 pF for A-Port. Symbol Over recommended range of supply voltage and operating free-air temperature, VREF = 1.0V (unless otherwise noted). CL = 30 pF for From (Input) tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tSKEW tRISE tFALL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH, tPZL tPHZ, tPLZ Note 12: All typical values are at VCC = 3.3V, VCCQ = 5.0V, and TA = 25°C. Note 13: Three-state delays are actually synchronous with CLKAB Note 14: Skew is defined as the absolute value of the difference between the actual propagation delays for the CLKOUT pin and any B output transition when measured with reference to CLKAB↑. This guarantees the relationship between B output data and CLKOUT such that data is coincident or ahead of CLKOUT. This specification is guaranteed but not tested. To (Output) B Min Typ (Note 12) Max Unit A 1.0 1.0 4.3 5.0 4.5 5.3 4.6 5.4 6.2 5.7 4.4 6.1 6.5 8.2 6.7 8.7 6.7 8.7 10.0 10.0 8.0 9.8 2 ns LEAB B 1.8 1.5 ns CLKAB B 1.8 1.5 ns CLKAB CLKOUT 3.0 3.0 ns OEAB (CLKAB) (Note 13) B (Note 14) B 1.6 1.3 ns CLKOUT 0 2.6 2.6 2.0 1.4 5.6 5.0 4.2 3.3 4.4 3.5 6.0 6.43 5.0 3.9 ns ns Transition time, B outputs (20% to 80%) Transition time, B outputs (20% to 80%) B A 8.2 7.2 6.3 5.0 6.8 5.2 10.0 10.0 6.4 8.0 ns LEBA A 2.1 1.9 ns CLKBA A 2.3 2.1 ns CLKOUT CLKIN 3.0 3.0 ns OEBA A or CLKIN 1.5 1.4 ns 7 www.fairchildsemi.com GTLP16617 Test Circuits and Timing Waveforms Test Circuit for A Outputs Test Circuit for B Outputs CL includes probes and jig capacitance. CL includes probes and jig capacitance. For B-Port outputs, CL = 30 pF is used for worst case edge rate. Voltage Waveforms Pulse Duration (Vm = 1.5V for A-Port and 1.0V for B-Port) Voltage Waveforms Propagation Delay and Setup and Hold Times (Vm = 1.5V for A-Port and 1.0V for B-Port) Voltage Waveforms Enable and Disable Times (A-Port) Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. All input pulses have the following characteristics: frequency = 10 MHz, tr = t f = 2 ns, Z O = 50 Ω. The outputs are measured one at a time with one transition per measurement. www.fairchildsemi.com 8 GTLP16617 Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package, JEDEC MO-118 0.300” Wide Package Number MS56A 9 www.fairchildsemi.com GTLP16617 17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package, JEDEC MO-153, 6.1mm Wide Package Number MTD56 LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.