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HGTG20N120CND

HGTG20N120CND

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    HGTG20N120CND - 63A, 1200V, NPT Series N-Channel IGBT with Anti-Parallel Hyperfast Diode - Fairchild...

  • 数据手册
  • 价格&库存
HGTG20N120CND 数据手册
HGTG20N120CND D ata Sheet December 2001 63A, 1200V, NPT Series N-Channel IGBT with Anti-Parallel Hyperfast Diode The HGTG20N120CND is a Non-Punch Through (NPT) IGBT design. This is a new member of the MOS gated high voltage switching IGBT family. IGBTs combine the best features of MOSFETs and bipolar transistors. This device has the high input impedance of a MOSFET and the low onstate conduction loss of a bipolar transistor. The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: AC and DC motor controls, power supplies and drivers for solenoids, relays and contactors. Formerly Developmental Type TA49305. Features • 63A, 1200V, TC = 25oC • 1200V Switching SOA Capability • Typical Fall Time . . . . . . . . . . . . . . . . 340ns at TJ = 150oC • Short Circuit Rating • Low Conduction Loss Packaging JEDEC STYLE TO-247 E C G Ordering Information PART NUMBER HGTG20N120CND PACKAGE TO-247 BRAND 20N120CND NOTE: When ordering, use the entire part number. Symbol G E FAIRCHILD SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,598,461 4,682,195 4,803,533 4,888,627 4,417,385 4,605,948 4,684,413 4,809,045 4,890,143 4,430,792 4,620,211 4,694,313 4,809,047 4,901,127 4,443,931 4,631,564 4,717,679 4,810,665 4,904,609 4,466,176 4,639,754 4,743,952 4,823,176 4,933,740 4,516,143 4,639,762 4,783,690 4,837,606 4,963,951 4,532,534 4,641,162 4,794,432 4,860,080 4,969,027 4,587,713 4,644,637 4,801,986 4,883,767 ©2001 Fairchild Semiconductor Corporation HGTG20N120CND Rev. B HGTG20N120CND Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HGTG20N120CND 1200 63 30 160 ±20 ±30 100A at 1200V 390 3.12 -55 to 150 260 8 15 UNITS V A A A V V W W/oC oC oC µs µs Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IC110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC (Figure 2) . . . . . . . . . . . . . . . . . . . . SSOA Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Short Circuit Withstand Time (Note 2) at VGE = 15V . . . . . . . . . . . . . . . . . . . . . . . . . . tSC Short Circuit Withstand Time (Note 2) at VGE = 12V . . . . . . . . . . . . . . . . . . . . . . . . . . tSC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Pulse width limited by maximum junction temperature. 2. VCE(PK) = 960V, TJ = 125oC, RG = 3Ω. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVCES BVECS ICES TEST CONDITIONS IC = 250µA, VGE = 0V IC = 10mA, VGE = 0V VCE = 1200V TC = 25oC TC = 125oC TC = 150oC TC = 25oC TC = 150oC MIN 1200 15 6.0 100 VGE = 15V VGE = 20V TYP 450 2.1 2.9 6.9 10.2 155 200 23 17 200 220 2.0 2.8 MAX 250 6 2.4 3.5 ±250 200 250 28 22 240 270 2.5 3.3 UNITS V V µA µA mA V V V nA A V nC nC ns ns ns ns mJ mJ Collector to Emitter Breakdown Voltage Emitter to Collector Breakdown Voltage Collector to Emitter Leakage Current Collector to Emitter Saturation Voltage VCE(SAT) IC = 20A, VGE = 15V IC = 150µA, VCE = VGE VGE = ±20V Gate to Emitter Threshold Voltage Gate to Emitter Leakage Current Switching SOA Gate to Emitter Plateau Voltage On-State Gate Charge VGE(TH) IGES SSOA VGEP QG(ON) TJ = 150oC, RG = 3Ω, VGE = 15V, L = 200µH, VCE(PK) = 1200V IC = 20A, VCE = 600V IC = 20A, VCE = 600V Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy Turn-Off Energy (Note 3) td(ON)I trI td(OFF)I tfI EON EOFF IGBT and Diode at TJ = 25oC ICE = 20A VCE = 960V VGE = 15V RG = 3Ω L = 1mH Test Circuit (Figure 20) ©2001 Fairchild Semiconductor Corporation HGTG20N120CND Rev. B HGTG20N120CND Electrical Specifications PARAMETER Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy Turn-Off Energy (Note 3) Diode Forward Voltage Diode Reverse Recovery Time TC = 25oC, Unless Otherwise Specified (Continued) SYMBOL td(ON)I trI td(OFF)I tfI EON EOFF VEC trr IEC = 20A IEC = 20A, dIEC/dt = 200A/µs IEC = 2A, dIEC/dt = 200A/µs Thermal Resistance Junction To Case RθJC IGBT Diode NOTE: 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. TEST CONDITIONS IGBT and Diode at TJ = 150oC ICE = 20A VCE = 960V VGE = 15V R G = 3Ω L = 1mH Test Circuit (Figure 20) MIN TYP 21 17 225 340 3.8 4.6 2.6 62 44 MAX 26 22 270 400 5.0 5.3 3.2 75 55 0.32 0.75 UNITS ns ns ns ns mJ mJ V ns ns oC/W oC/W Typical Performance Curves 70 ICE , DC COLLECTOR CURRENT (A) Unless Otherwise Specified ICE, COLLECTOR TO EMITTER CURRENT (A) VGE = 15V 60 50 40 30 20 10 0 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) 120 100 80 60 40 20 0 TJ = 150oC, RG = 3Ω, VGE = 15V, L = 200µH 0 200 400 600 800 1000 1200 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 1400 FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA ©2001 Fairchild Semiconductor Corporation HGTG20N120CND Rev. B HGTG20N120CND Typical Performance Curves fMAX, OPERATING FREQUENCY (kHz) Unless Otherwise Specified (Continued) tSC , SHORT CIRCUIT WITHSTAND TIME (µs) 25 300 ISC 20 250 VCE = 960V, RG = 3Ω , TJ = 125oC 100 50 TC = 75oC, VGE = 15V, IDEAL DIODE 15 tSC 10 200 10 fMAX1 = 0.05 / (td(OFF)I + td(ON)I) TC fMAX2 = (PD - PC) / (EON + EOFF) 75oC PC = CONDUCTION DISSIPATION 75oC (DUTY FACTOR = 50%) 110oC RØJC = 0.32oC/W, SEE NOTES 110oC 5 VGE 15V 12V 15V 12V 40 150 1 5 10 30 20 ICE, COLLECTOR TO EMITTER CURRENT (A) 12 13 14 15 100 16 VGE , GATE TO EMITTER VOLTAGE (V) FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT FIGURE 4. SHORT CIRCUIT WITHSTAND TIME ICE , COLLECTOR TO EMITTER CURRENT (A) 100 ICE, COLLECTOR TO EMITTER CURRENT (A) 100 TC = 25oC 80 TC = -55oC 60 TC = 150oC 40 80 TC = -55oC 60 TC = 150oC 40 TC = 25oC 20 DUTY CYCLE < 0.5%, VGE = 12V PULSE DURATION = 250µs 0 0 6 8 2 4 VCE , COLLECTOR TO EMITTER VOLTAGE (V) 10 20 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250µs 0 0 2 4 6 8 VCE , COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE 12 EON , TURN-ON ENERGY LOSS (mJ) 10 8 6 4 2 EOFF , TURN-OFF ENERGY LOSS (mJ) RG = 3Ω, L = 1mH, VCE = 960V TJ = 150oC, VGE = 12V, VGE = 15V 8 7 6 5 4 3 2 1 0 40 5 RG = 3Ω , L = 1mH, VCE = 960V TJ = 150oC, VGE = 12V OR 15V TJ = 25oC, VGE = 12V OR 15V TJ = 25oC, VGE = 12V, VGE = 15V 0 5 10 15 20 25 30 35 10 15 20 25 30 35 ICE , COLLECTOR TO EMITTER CURRENT (A) ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT ©2001 Fairchild Semiconductor Corporation HGTG20N120CND Rev. B ISC , PEAK SHORT CIRCUIT CURRENT (A) 40 TJ = 150oC, RG = 3Ω, L = 1mH, V CE = 960V HGTG20N120CND Typical Performance Curves 40 tdI , TURN-ON DELAY TIME (ns) RG = 3Ω , L = 1mH, VCE = 960V TJ = 25oC, TJ = 150oC, VGE = 12V trI , RISE TIME (ns) 80 60 40 20 TJ = 25oC, TJ = 150oC, VGE = 15V 15 5 10 15 20 25 30 35 40 ICE , COLLECTOR TO EMITTER CURRENT (A) 0 5 TJ = 25oC OR TJ = 150oC, VGE = 15V 10 15 20 25 30 35 ICE , COLLECTOR TO EMITTER CURRENT (A) 40 Unless Otherwise Specified (Continued) 120 100 RG = 3Ω, L = 1mH, VCE = 960V TJ = 25oC, TJ = 150oC, VGE = 12V 35 30 25 20 FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT 450 td(OFF)I , TURN-OFF DELAY TIME (ns) 400 RG = 3Ω , L = 1mH, VCE = 960V 700 RG = 3Ω , L = 1mH, VCE = 960V 600 tfI , FALL TIME (ns) VGE = 12V, VGE = 15V, TJ = 150oC 350 300 VGE = 12V, VGE = 15V, TJ = 25oC 250 200 150 500 400 300 200 TJ = 25oC, VGE = 12V OR 15V 100 TJ = 150oC, VGE = 12V OR 15V 5 10 15 20 25 30 35 40 5 10 15 20 25 30 35 40 ICE , COLLECTOR TO EMITTER CURRENT (A) ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT ICE, COLLECTOR TO EMITTER CURRENT (A) 250 VGE , GATE TO EMITTER VOLTAGE (V) DUTY CYCLE < 0.5%, VCE = 20V PULSE DURATION = 250µs 200 20 IG(REF) = 2mA, RL = 30Ω, TC = 25oC 15 VCE = 1200V VCE = 800V 150 10 VCE = 400V 5 100 TC = 25oC 50 TC = 150oC TC = -55oC 14 15 0 6 7 11 9 10 12 13 VGE , GATE TO EMITTER VOLTAGE (V) 8 0 0 50 100 150 QG , GATE CHARGE (nC) 200 FIGURE 13. TRANSFER CHARACTERISTIC FIGURE 14. GATE CHARGE WAVEFORMS ©2001 Fairchild Semiconductor Corporation HGTG20N120CND Rev. B HGTG20N120CND Typical Performance Curves 6 FREQUENCY = 1MHz 5 C, CAPACITANCE (nF) CIES 4 3 2 1 0 CRES 0 5 10 15 20 25 Unless Otherwise Specified (Continued) ICE , COLLECTOR TO EMITTER CURRENT (A) 30 25 20 DUTY CYCLE < 0.5%, TC = 110oC PULSE DURATION = 250µs VGE = 15V OR 12V VGE = 10V 15 10 5 0 0 1 2 3 4 VCE , COLLECTOR TO EMITTER VOLTAGE (V) COES VCE , COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE FIGURE 16. COLLECTOR TO EMITTER ON-STATE VOLTAGE ZθJC , NORMALIZED THERMAL RESPONSE 100 0.5 0.2 0.1 10-1 0.05 0.02 0.01 10-2 10-5 SINGLE PULSE 10-4 10-3 10-2 PD t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC 10-1 100 t1 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 17. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE 70 100 IF , FORWARD CURRENT (A) 60 t, RECOVERY TIMES (ns) 50 t rr 40 ta 30 20 1 10 0 1 2 3 4 5 1 2 5 IF , FORWARD CURRENT (A) 10 20 VF , FORWARD VOLTAGE (V) tb TC = 25oC, dIEC/dt = 200A/µs 150oC 10 25oC FIGURE 18. DIODE FORWARD CURRENT vs FORWARD VOLTAGE DROP FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT ©2001 Fairchild Semiconductor Corporation HGTG20N120CND Rev. B HGTG20N120CND Test Circuit and Waveforms HGTG20N120CND 90% VGE EOFF L = 1mH RG = 3Ω + ICE VDD = 960V VCE 90% 10% td(OFF)I tfI trI td(ON)I 10% EON - FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21. SWITCHING TEST WAVEFORMS Handling Precautions for IGBTs Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD™ LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. Operating Frequency Information Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM . td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC . The sum of device switching and conduction losses must not exceed PD . A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON and EOFF are defined in the switching waveforms shown in Figure 21. EON is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0). ©2001 Fairchild Semiconductor Corporation HGTG20N120CND Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT ™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ DISCLAIMER FAST ® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench ® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER ® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET ® VCX™ STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4
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