MM74C221

MM74C221 Dual Monostable Multivibrator November 1987 Revised January 1999 MM74C221 Dual Monostable Multivibrator General Description The MM74C221 dual monostable multivibrator is a monolithic complementary MOS integrated circuit. Each multivibrator features a negative-transition-triggered input and a positive-transition-triggered input, either of which can be used as an inhibit input, and a clear input. Once fired, the output pulses are independent of further transitions of the A and B inputs and are a function of the external timing components CEXT and REXT. The pulse width is stable over a wide range of temperature and VCC. Pulse stability will be limited by the accuracy of external timing components. The pulse width is approximately defined by the relationship tW(OUT) ≈ CEXT REXT. For further information and applications, see AN-138. Features s Wide supply voltage range: s Guaranteed noise margin: s High noise immunity: 4.5V to 15V 1.0V 0.45 VCC (typ.) fan out of 2 driving 74L s Low power TTL compatibility: Ordering Code: Order Number 74MMC221N Package Number N16E Package Description 16-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Connection Diagrams Timing Component Truth Table Inputs Clear L X X H H A X H X L ↓ B X X L ↑ H Outputs Q L L Q H H Pin Assignments for DIP H = HIGH Level = One HIGH level pulse L = LOW Level = One LOW level pulse ↑ = Transition from LOW-to-HIGH X= Irrelevant ↓ = Transition from HIGH-to-LOW    L H Top View © 1999 Fairchild Semiconductor Corporation DS005904.prf www.fairchildsemi.com MM74C221 Absolute Maximum Ratings(Note 1) Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating VCC Range 700 mW 500 mW 4.5V to 15V −0.3V to VCC + 0.3V −40°C to +85°C −65°C to +150°C Absolute Maximum VCC REXT ≥ 80 VCC (Ω) Lead Temperature (Soldering, 10 seconds) 18V 260°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions for actual device operation. DC Electrical Characteristics Max/min limits apply across temperature range, unless otherwise noted Symbol CMOS to CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC ICC Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Output Voltage Logical “0” Output Voltage Logical “1” Input Current Logical “0” Input Current Supply Current (Standby) Supply Current (During Output Pulse) VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V, IO = −10 µA VCC = 10V, IO = −10 µA VCC = 5V, IO = +10 µA VCC = 10V, IO = +10 µA VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V, REXT = ∞, Q1, Q2 = Logic “0” (Note 2) VCC = 15V, Q1 = Logic “1”, Q2 = Logic “0” (Figure 4) VCC = 5V, Q1 = Logic “1”, Q2 = Logic “0” (Figure 4) Leakage Current at R/CEXTPin CMOS/LPTTL Interface VIN(1) VIN(0) VOUT(1) VOUT(0) ISOURCE ISOURCE ISINK ISINK Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Output Voltage Logical “0” Output Voltage Output Source Current (P-Channel) Output Source Current (P-Channel) Output Sink Current (N-Channel) Output Sink Current (N-Channel) V CC = 4.75V VCC = 4.75V V CC = 4.75V, IO = −360 µA VCC = 4.75V, IO = 360 µA VCC = 5V TA = 25°C, VOUT = 0V VCC = 10V TA = 25°C, VOUT = 0V VCC = 5V TA = 25°C, VOUT = VCC VCC = 10V TA = 25°C, VOUT = VCC 8 mA 1.75 mA −8 mA −1.75 2.4 0.4 VCC − 1.5 0.8 V V V V mA VCC = 15V, VCEXT = 5V 0.01 3.0 µA 2 mA 15 mA −1.0 0.005 −0.005 0.05 300 4.5 9.0 0.5 1 1.0 3.5 8.0 1.5 2.0 V V V V V V V V µA µA µA Parameter Conditions Min Typ Max Units Output Drive (See Family Characteristics Data Sheet) (Short Circuit Current) Note 2: In Standby (Q = Logic “0”) the power dissipated equals the leakage current plus VCC/REXT. www.fairchildsemi.com 2 MM74C221 AC Electrical Characteristics TA = 25°C, CL = 50 pF, unless otherwise noted Symbol tpd A, B tpd CL tS tW(A, B) tW(CL) tW(OUT) Parameter Propagation Delay from Trigger Input (A, B) to Output Q, Q Propagation Delay from Clear Input (CL) to Output Q, Q Time Prior to Trigger Input (A, B) that Clear must be Set Trigger Input (A, B) Pulse Width Clear Input (CL) Pulse Width (Note 3) Conditions Min Typ 250 120 250 120 150 60 150 70 150 70 50 20 50 30 50 30 900 Max 500 250 500 250 Units ns ns ns ns ns ns ns ns ns ns ns VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V, REXT = 10k, CEXT = 0 pF VCC = 10V, REXT = 10k, CEXT = 0 pF VCC = 15V, REXT = 10k, CEXT = 0 pF VCC = 5V, REXT = 10k, CEXT = 1000 pF (Figure 1) VCC = 10V, REXT = 10k, CEXT = 1000 pF (Figure 1) VCC = 15V, REXT = 10k, CEXT = 1000 pF (Figure 1) VCC = 5V, REXT = 10k, CEXT = 0.1 µF (Figure 3) VCC = 10V, REXT = 10k, CEXT = 0.1 µF (Figure 3) VCC = 15V, REXT = 10k, CEXT = 0.1 µF (Figure 3) 900 900 900 8.9 9.0 9.0 Q or Q Output Pulse Width 350 320 10.6 10 9.8 1020 1000 990 50 25 16.7 12.2 11 10.8 1200 1100 1100 150 65 45 90 90 15 5 25 ns ns µs µs µs µs µs µs Ω Ω Ω % % pF pF RON ON Resistance of Transistor between R/C EXT to CEXT Output Duty Cycle VCC = 5V (Note 4) VCC = 10V (Note 4) VCC = 15V (Note 4) R = 10k, C = 1000 pF R = 10k, C = 0.1 µF (Note 5) CIN Input Capacitance R/CEXT Input (Note 6) Any Other Input (Note 6) Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: See AN-138 for detailed explanation RON. Note 5: M aximum output duty cycle = REXT/REXT + 1000. Note 6: C apacitance is guaranteed by periodic testing. 3 www.fairchildsemi.com MM74C221 Typical Performance Characteristics 0% Point pulse width: At VCC = 5V, TW = 10.6 µs At VCC = 10V,TW = 10 µs At VCC = 15V,TW = 9.8 µs Percentage of units within +4%: At VCC = 5V,90% of units At VCC = 10V,95% of units At VCC = 15V,98% of units 0% Point pulse width: At VCC = 5V, TW = 1020 µs At VCC = 10V,TW = 1000 µs At VCC = 15V,TW = 982 µs Percentage of units within +4%: At VCC = 5V,95% of units At VCC = 10V,97% of units At VCC = 15V,98% of units FIGURE 1. Typical Distribution of Units for Output Pulse Width FIGURE 3. Typical Distribution of Units for Output Pulse Width FIGURE 2. Typical Variation in Output Pulse Width vs Temperature FIGURE 4. Typical Power Dissipation per Package www.fairchildsemi.com 4 MM74C221 Typical Performance Characteristics Switching Time Waveforms (Continued) tr = tf = 20 ns 5 www.fairchildsemi.com MM74C221 Dual Monostable Multivibrator Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.