MM74HC4052NX

MM74HC4051 • MM74HC4052 • MM74HC4053 8-Channel Analog Multiplexer • August 1984 Revised May 1999 MM74HC4051 • MM74HC4052 • MM74HC4053 8-Channel Analog Multiplexer • Dual 4-Channel Analog Multiplexer • Triple 2-Channel Analog Multiplexer General Description The MM74HC4051, MM74HC4052 and MM74HC4053 multiplexers are digitally controlled analog switches implemented in advanced silicon-gate CMOS technology. These switches have low “on” resistance and low “off” leakages. They are bidirectional switches, thus any analog input may be used as an output and vice-versa. Also these switches contain linearization circuitry which lowers the on resistance and increases switch linearity. These devices allow control of up to ±6V (peak) analog signals with digital control signals of 0 to 6V. Three supply pins are provided for VCC, ground, and VEE. This enables the connection of 0– 5V logic signals when VCC = 5V and an analog input range of ±5V when VEE = 5V. All three devices also have an inhibit control which when HIGH will disable all switches to their off state. All analog inputs and outputs and digital inputs are protected from electrostatic damage by diodes to VCC and ground. MM74HC4051: This device connects together the outputs of 8 switches, thus achieving an 8 channel Multiplexer. The binary code placed on the A, B, and C select lines determines which one of the eight switches is “on”, and connects one of the eight inputs to the common output. MM74HC4052: This device connects together the outputs of 4 switches in two sets, thus achieving a pair of 4-channel multiplexers. The binary code placed on the A, and B select lines determine which switch in each 4 channel section is “on”, connecting one of the four inputs in each section to its common output. This enables the implementation of a 4-channel differential multiplexer. MM74HC4053: This device contains 6 switches whose outputs are connected together in pairs, thus implementing a triple 2 channel multiplexer, or the equivalent of 3 singlepole-double throw configurations. Each of the A, B, or C select lines independently controls one pair of switches, selecting one of the two switches to be “on”. Features s Wide analog input voltage range: ±6V s Low “on” resistance: 50 typ. (VCC–VEE = 4.5V) 30 typ. (VCC–VEE = 9V) s Logic level translation to enable 5V logic with ±5V analog signals s Low quiescent current: 80 µA maximum (74HC) s Matched Switch characteristic Ordering Code: Order Number MM74HC4051M MM74HC4051WM MM74HC4051SJ MM74HC4051MTC MM74HC4051N MM74HC4052M MM74HC4052WM MM74HC4052SJ MM74HC4052MTC MM74HC4052N MM74HC4053M MM74HC4053WM MM74HC4053SJ MM74HC4053MTC MM74HC4053N Package Number M16A M16B M16D MTC16 N16E M16A M16B M16D MTC16 N16E M16A M16B M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-0010.300” Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-0010.300” Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-0010.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 1999 Fairchild Semiconductor Corporation DS005353.prf www.fairchildsemi.com MM74HC4051 • MM74HC4052 • MM74HC4053 Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP Truth Tables MM744051 Input Inh H L L L L L L L L C X L L L L H H H H B X L L H H L L H H A X L H L H L H L H “ON” Channel None Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Top View MM744052 Inputs Inh H L L L L B X L L H H A X L H L H “ON” Channels X None 0X 1X 2X 3X Y None 0Y 1Y 2Y 3Y Top View Input MM744053 “ON” Channels C CX CX CX CX CY CY CY CY b BX BX BY BY BX BX BY BY a AX AY AX AY AX AY AX AY Inh C B A H L L L L L L L L L L L L X X X None None None LH LHL LHH HL L HLH HHL HHH Top View www.fairchildsemi.com 2 MM74HC4051 • MM74HC4052 • MM74HC4053 Logic Diagrams MM74HC4051 MM74HC4052 MM74HC4053 3 www.fairchildsemi.com MM74HC4051 • MM74HC4052 • MM74HC4053 Absolute Maximum Ratings(Note 1) (Note 2) Supply Voltage (VCC) Supply Voltage (VEE) Control Input Voltage (VIN) Switch I/O Voltage (VIO) Clamp Diode Current (IIK, IOK) Output Current, per pin (IOUT) VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S.O. Package only Lead Temperature (TL) (Soldering 10 seconds) 260°C 600 mW 500 mW −0.5 to +7.5V +0.5 to −7.5V −1.5 to VCC +1.5V VEE −0.5 to VCC +0.5V ±20 mA ±25 mA ±50 mA −65°C to +150°C Recommended Operating Conditions Min Supply Voltage (VCC) Supply Voltage (VEE) DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times (tr, tf) VCC = 2.0V VCC = 4.5V VCC = 6.0V 1000 500 400 ns ns ns 0 −40 VCC +85 V °C 2 0 Max 6 −6 Units V V Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C. DC Electrical Characteristics Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage RON Maximum “ON” Resistance (Note 5) (Note 4) VEE VCC 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V TA = 25°C Typ 1.5 3.15 4.2 0.5 1.35 1.8 40 30 20 100 40 20 15 10 5 5 160 120 100 230 110 90 80 20 10 10 ±0.1 GND 6.0V −6.0V 6.0V GND 6.0V −6.0V 6.0V GND 6.0V −6.0V 6.0V GND 6.0V −6.0V 6.0V GND 6.0V −6.0V 6.0V 8 16 ±60 ±100 ±0.2 ±0.4 ±0.1 ±0.2 ±0.1 ±0.1 TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits 1.5 3.15 4.2 0.5 1.35 1.8 200 150 125 280 140 120 100 25 15 12 ±1.0 80 160 ±600 ±1000 ±2.0 ±4.0 ±1.0 ±2.0 ±1.0 ±1.0 1.5 3.15 4.2 0.5 1.35 1.8 240 170 140 320 170 140 115 25 15 15 ±1.0 160 320 ±600 ±1000 ±2.0 ±4.0 ±1.0 ±2.0 ±1.0 ±1.0 Units V V V V V V Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω µA µA µA nA nA µA µA µA µA µA µA Conditions VINH = VIL, IS = 2.0 mA VIS = VCC to VEE (Figure 1) VINH = VIL, IS = 2.0 mA VIS = VCC or VEE (Figure 1) GND 4.5V −4.5V 4.5V −6.0V 6.0V GND 2.0V GND 4.5V −4.5V 4.5V −6.0V 6.0V GND 4.5V −4.5V 4.5V −6.0V 6.0V RON Maximum “ON” Resistance Matching VCTL = VIL VIS = VCC to GND VIN = VCCor GND VCC = 2−6V VIN = VCC or GND IOUT = 0 µA VOS = VCCor VEE VIS = VEEor VCC VINH = VIH (Figure 2) VIS = VCC to VEE IIN ICC IIZ Maximum Control Input Current Maximum Quiescent Supply Current Maximum Switch “OFF” Leakage Current (Switch Input) IIZ Maximum Switch “ON” Leakage Current HC4051 VINH = VIL (Figure 3) VIS = VCC to VEE HC4052 VINH = VIL (Figure 3) VIS = VCC to VEE HC4053 VINH = VIL (Figure 3) www.fairchildsemi.com 4 MM74HC4051 • MM74HC4052 • MM74HC4053 DC Electrical Characteristics Symbol IIZ Parameter Maximum Switch “OFF” Leakage Current (Common Pin) (Continued) T A = 2 5 °C Typ ±0.2 ±0.4 ±0.1 ±0.2 ±0.1 ±0.1 TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits ±2.0 ±4.0 ±1.0 ±2.0 ±1.0 ±1.0 ±2.0 ±4.0 ±1.0 ±2.0 ±1.0 ±1.0 µA µA µA µA µA µA Conditions VOS = VCC or VEE HC4051 VIS = VEE or VCC VINH = VIH VOS = VCC or VEE HC4052 VIS = VEE or VCC VINH = VIH VOS = VCC or VEE HC4053 VIS = VEE or VCC VINH = VIH VEE VCC Units GND 6.0V −6.0V 6.0V GND 6.0V −6.0V 6.0V GND 6.0V −6.0V 6.0V Note 4: For a power supply of 5V ±10% the worst case on resistances (RON) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current occur for CMOS at the higher voltage and so the 5.5V values should be used. Note 5: At supply voltages (VCC–VEE) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital only when using these supply voltages. AC Electrical Characteristics VCC = 2.0V−6.0V, VEE = 0V−6V, CL = 50 pF (unless otherwise specified) Symbol Parameter Conditions VEE GND GND −4.5V −6.0V tPZL, tPZH Maximum Switch Turn “ON” Delay RL = 1 kΩ GND GND −4.5V −6.0V tPHZ, tPLZ Maximum Switch Turn “OFF” Delay GND GND −4.5V −6.0V fMAX Minimum Switch Frequency Response 20 log (VI/VO) = 3 dB Control to Switch Feedthrough Noise Crosstalk between any Two Switches Switch OFF Signal Feedthrough Isolation THD Sinewave Harmonic Distortion CIN CIN Maximum Control Input Capacitance Maximum Switch Input Capacitance Input 4051 Common 4052 Common 4053 Common CIN Maximum Feedthrough Capacitance 15 90 45 30 5 pF pF RL = 600Ω, f = 1 MHz, CL = 50 pF RL = 600Ω, f = 1 MHz RL = 600Ω, f = 1 MHz, VCTL = VIL RL = 10 kΩ, CL = 50 pF, f = 1 kHz 5 10 10 10 pF VIS = 4 VPP VIS = 8 VPP 0V −4.5V 4.5V 4.5V 0.013 0.008 % % VIS = 4 VPP VIS = 8 VPP VIS = 4 VPP VIS = 8 VPP 0V −4.5V 0V −4.5V 4.5 4.5V 4.5V 4.5V −52 −50 −42 −44 dB dB dB dB VIS = 4 VPP VIS = 8 VPP 0V −4.5V 4.5V 4.5V 1080 250 mV mV GND −4.5V VCC 2.0V 4.5V 4.5V 6.0V 2.0V 4.5V 4.5V 6.0V 2.0V 4.5V 4.5V 6.0V 4.5V 4.5V 16 15 65 28 18 16 30 35 TA = 25°C Typ 25 5 4 3 92 60 12 8 7 355 69 46 41 290 58 37 32 TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits 75 15 12 11 435 87 58 51 365 73 46 41 90 18 14 13 515 103 69 62 435 87 56 48 Units ns ns ns ns ns ns ns ns ns ns ns ns MHz MHz tPHL, tPLH Maximum Propagation Delay Switch In to Out 5 www.fairchildsemi.com MM74HC4051 • MM74HC4052 • MM74HC4053 AC Test Circuits and Switching Time Waveforms FIGURE 1. “ON” Resistance FIGURE 2. “OFF” Channel Leakage Current FIGURE 3. “ON” Channel Leakage Current FIGURE 4. tPHL, tPLH Propagation Delay Time Signal Input to Signal Output FIGURE 5. tPZL, tPLZ Propagation Delay Time Control to Signal Output FIGURE 6. tPZH, tPHZ Propagation Delay Time Control to Signal Output www.fairchildsemi.com 6 MM74HC4051 • MM74HC4052 • MM74HC4053 AC Test Circuits and Switching Time Waveforms (Continued) FIGURE 7. Crosstalk: Control Input to Signal Output FIGURE 8. Crosstalk Between Any Two Switches Typical Performance Characteristics Typical “On” Resistance vs Input Voltage VCC =−VEE Special Considerations In certain applications the external load-resistor current may include both VCC and signal line components. To avoid drawing VCC current when switch current flows into the analog switch pins, the voltage drop across the switch must not exceed 1.2V (calculated from the ON resistance). 7 www.fairchildsemi.com MM74HC4051 • MM74HC4052 • MM74HC4053 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Package Number M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Package Number M16B www.fairchildsemi.com 8 MM74HC4051 • MM74HC4052 • MM74HC4053 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 9 www.fairchildsemi.com MM74HC4051 • MM74HC4052 • MM74HC4053 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 www.fairchildsemi.com 10 MM74HC4051 • MM74HC4052 • MM74HC4053 8-Channel Analog Multiplexer • Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.