NDH8447

May 1996 NDH8447 P-Channel Enhancement Mode Field Effect Transistor General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features -4.4A, -30V. RDS(ON) = 0.053 @ VGS = -10V RDS(ON) = 0.095Ω @ VGS = -4.5V High density cell design for extremely low RDS(ON). Enhanced SuperSOTTM-8 small outline surface mount package with high power and current handling capability. ____________________________________________________________________________________________ 5 6 7 8 4 3 2 1 SuperSOTTM-8 Absolute Maximum Ratings Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed PD T A = 25°C unless otherwise note NDH8447 -30 -20 (Note 1a) Units V V A -4.4 -20 Maximum Power Dissipation (Note 1a) (Note 1b) (Note 1c) 1.8 1 0.9 -55 to 150 W TJ,TSTG Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 70 20 °C/W °C/W © 1997 Fairchild Semiconductor Corporation NDH8447 Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 µA VDS = -24 V, VGS = 0 V TJ = 55°C Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = -250 µA TJ = 125°C Static Drain-Source On-Resistance VGS = -10 V, ID = -4.4 A TJ = 125°C VGS = -4.5 V, ID = -3.4 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current Forward Transconductance VGS = -10 V, VDS = -5 V VDS = -10 V, ID = -4.4 A VDS = -15 V, VGS = 0 V, f = 1.0 MHz -15 7 -1 -0.7 -1.5 -1.2 0.045 0.075 0.08 -30 -1 -10 100 -100 V µA µA nA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage -3 -2.2 0.053 0.11 0.095 A S V Ω DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 670 430 160 pF pF pF SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -15 V, ID = -4.4 A, VGS = -10 V VDD = -15 V, ID = -1 A, VGEN = -10 V, RGEN = 6 Ω 11 15 36 27 20 2.8 6 20 25 50 40 30 ns ns ns ns nC nC nC NDH8447 Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max -1.5 (Note 2) Units A V DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.5 A -0.8 -1.2 PD (t ) = R θJA(t ) TJ −TA = TJ −TA R θJC+RθC (t ) A = I 2 (t ) × RDS(ON ) D TJ Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 70oC/W when mounted on a 1 in2 pad of 2oz cpper. b. 125oC/W when mounted on a 0.026 in2 pad of 2oz copper. c. 135oC/W when mounted on a 0.005 in2 pad of 2oz copper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDH8447 Rev. C1 Typical Electrical Characteristics -20 3 I D , DRAIN-SOURCE CURRENT (A) - 5.0 -15 DRAIN-SOURCE ON-RESISTANCE VGS = - 10V -8.0 -6.0 - 4.5 R DS(on), NORMALIZED V GS = - 3.5V 2.5 - 4.0 - 4.5 - 5.0 - 4.0 -10 2 - 3.5 -5 1.5 - 6.0 - 8.0 - 10 - 3.0 1 0 0 -1 -2 V DS , DRAIN-SOURCE VOLTAGE (V) -3 0.5 0 -5 -10 ID , DRAIN CURRENT (A) -15 -20 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 2 DRAIN-SOURCE ON-RESISTANCE 1.4 DRAIN-SOURCE ON-RESISTANCE R DS(ON), NORMALIZED I D =-4.4A V GS = -10V R DS(on), NORMALIZED V G S = - 10V 1.5 1.2 TJ = 125°C 1 2 5°C 1 0.8 - 55°C 0.6 -50 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) J 125 150 0.5 0 -5 -10 I D , DRAIN CURRENT (A) -15 -20 Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Drain Current and Temperature. -15 1.2 V DS = -10V ID , DRAIN CURRENT (A) -12 25°C 125°C V th , NORMALIZED GATE-SOURCE THRESHOLD VOLTAGE T = -55°C J VDS = V GS 1.1 I D = -250µA -9 1 -6 0.9 -3 0.8 0 -1 -2 -3 -4 VGS , GATE TO SOURCE VOLTAGE (V) -5 0.7 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature. NDH8447 Rev. C1 Typical Electrical Characteristics (continued) 1.1 20 DRAIN-SOURCE BREAKDOWN VOLTAGE 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 -50 -IS , REVERSE DRAIN CURRENT (A) I D = -250µA 10 5 V GS = 0V BV DSS, NORMALIZED 1 0.5 T = 125°C J 25°C - 55°C 0.1 0.01 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 150 0.001 0.2 0.4 0.6 0.8 1 -VSD , BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 7. Breakdown Voltage Variation with Temperature. Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature. 2000 10 I D = -4.4A -V GS , GATE-SOURCE VOLTAGE (V) 1000 CAPACITANCE (pF) V DS = -5.0V -10V -15V C i ss C o ss 8 500 300 200 6 C r ss f = 1 MHz V GS = 0V 4 100 2 50 0.1 0.2 0.5 1 2 5 10 -VDS , DRAIN TO SOURCE VOLTAGE (V) 30 0 0 4 8 12 Q g , GATE CHARGE (nC) 16 20 Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics. -VDD t d(on) t on t off tr 90% t d(off) 90% V IN D RL V OUT VOUT 10% tf VGS R GEN 10% 90% G DUT S V IN 10% 50% 50% P ULSE W IDTH INVERTED Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms. NDH8447 Rev. C1 Typical Electrical and ThermalCharacteristics (continued) 15 , TRANSCONDUCTANCE (SIEMENS) 2.5 V DS = -10V 12 TJ = -55°C 2 5°C STEADY-STATE POWER DISSIPATION (W) 2 1a 9 1.5 1 25°C 6 1 1b 1c 3 0.5 4.5"x5" FR-4 Board T A = 25 o C Still Air g FS 0 0 0 -5 I D -10 , DRAIN CURRENT (A) -15 -20 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 Figure 13. Transconductance Variation with Drain Current and Temperature. Figure 14. SOT-8 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area. 5 -I D , STEADY-STATE DRAIN CURRENT (A) 50 30 1a 4.5 10 -I D, DRAIN CURRENT (A) R (O DS N) LIM IT 10 1m 10 s ms 10 0m s 1s 10 DC s 0u s 4 3 1 0.3 0.1 0.03 0.01 0.1 3.5 1b 1c 3 4.5"x5" FR-4 Board VGS = 1 0 V SINGLE PULSE R θJ A = See Note 1c T A = 25°C 0.2 2.5 TA = 2 5 o C Still Air VG S = - 1 0 V 2 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 0.5 1 2 5 10 - V DS , DRAIN-SOURCE VOLTAGE (V) 20 30 50 Figure 15. Maximum Steady-State Drain Current versus Copper Mounting Pad Area. Figure 16. Maximum Safe Operating Area. 1 TRANSIENT THERMAL RESISTANCE 0 .5 0 .3 0 .2 0 .1 0.05 0 .02 0 .2 0 .1 0 .05 D = 0 .5 r(t), NORMALIZED EFFECTIVE R JA ( t) = r(t) * R JA θ θ R JA = See Note 1c θ P(pk) t1 TJ - T t2 0.03 0.02 0.01 0 .0 0 0 1 0 .01 S ingle Pulse = P * R JA (t) A θ D uty Cycle, D = t 1 / t 2 0 .0 1 0 .1 t 1, TIME (sec) 1 10 100 300 0 .001 Figure 17. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDH8447 Rev. C1 NDH8447 Rev. C1