NDS8852H

February 1996 NDS8852H Complementary MOSFET Half Bridge General Description These Complementary MOSFET half bridge devices are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage half bridge applications or CMOS applications when both gates are connected together. Features N-Channel 4.3A, 30V, RDS(ON)=0.08Ω @ VGS=10V. P-Channel -3.4A, -30V, RDS(ON)=0.13Ω @ VGS=-10V. High density cell design or extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Matched pair for equal input capacitance and power capability . ________________________________________________________________________________ V+ P-Gate Vout Vout Vout N -Gate Vout V- Absolute Maximum Ratings Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation (Single Device) TJ,TSTG T A= 25°C unless otherwise noted N-Channel 30 20 (Note 1a & 2) P-Channel -30 -20 -3.4 -10 2.5 1.2 1 -55 to 150 Units V V A 4.3 15 (Note 1a) (Note 1b) (Note 1c) W Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS RθJA RθJC Thermal Resistance, Junction-to-Ambient (Single Device) Thermal Resistance, Junction-to-Case (Single Device) 50 (Note 1a) °C/W °C/W 25 (Note 1) © 1997 Fairchild Semiconductor Corporation NDS8852H Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol BVDSS IDSS Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Conditions VGS = 0 V, ID = 250 µA VGS = 0 V, ID = -250 µA VDS = 24 V, VGS = 0 V TJ = 55oC VDS = -24 V, VGS = 0 V TJ = 55 C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse Gate Threshold Voltage VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = 250 µA TJ = 125oC VDS = VGS, ID = -250 µA TJ = 125oC RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 3.4 A TJ = 125oC VGS = 4.5 V, ID = 2.8 A VGS = -10 V, ID = -3.4 A TJ = 125oC VGS = -4.5 V, ID = -2.8 A ID(on) gFS On-State Drain Current Forward Transconductance VGS = 10 V, VDS = 5 V VGS = -10 V, VDS = -5 V VDS = 15 V, ID = 3.4 A VDS = -15 V, ID = -3.4 A DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance N-Channel VDS = 15 V, VGS = 0 V, f = 1.0 MHz P-Channel VDS = -15 V, VGS = 0 V, f = 1.0 MHz N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 300 330 190 190 70 70 pF pF pF N-Ch P-Ch N-Ch P-Ch 10 -10 6 4 S P-Ch N-Ch P-Ch All All N-Ch 1 0.7 -1 -0.85 1.7 1.2 -1.6 -1.25 0.06 0.08 0.08 0.11 0.15 0.17 o Type N-Ch P-Ch N-Ch P-Ch Min 30 -30 Typ Max Units V V OFF CHARACTERISTICS 2 25 -2 -25 100 -100 2.8 2.2 -2.8 -2.5 0.08 0.13 0.11 0.13 0.21 0.2 µA µA µA µA nA nA V ON CHARACTERISTICS (Note 3) Ω A NDS8852H Rev. C1 Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol tD(on) tr tD(off) tf Qg Qgs Qgd Parameter Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge N-Channel VDS = 10 V, ID = 3.4 A, VGS = 10 V P-Channel VDS = -10 V, ID = -3.4 A, VGS = -10 V Conditions N-Channel VDD = 10 V, ID = 1 A, VGEN = 10 V, RGEN = 6 Ω P-Channel VDD = -10 V, ID = -1 A, VGEN = -10 V, RGEN = 6 Ω Type N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD trr Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time VGS = 0 V, IS = 2.1 A VGS = 0 V, IS = -2.1 A N-Ch P-Ch (Note 2) (Note 2) Min Typ 10 9 13 21 21 21 5 8 9.5 10 1.5 1.6 2.6 2.7 Max 15 40 20 40 50 90 50 50 27 25 Units ns ns ns ns nC SWITCHING CHARACTERISTICS (Note 3) 2.1 -2.1 0.8 -0.8 1.2 -1.2 100 100 A V ns N-Ch P-Ch N-Ch P-Ch N-Channel VGS = 0 V, IF = 2.1 A, dIF/dt = 100 A/µs P-Channel VGS = 0 V, IF = -2.1 A, dIF/dt = 100 A/µs Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. PD(t ) = R θJ At ) ( T J −TA = T J −TA R θJ C RθCA t ) + ( = I 2 (t ) × RDS ( ON ) D TJ Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 50oC/W when mounted on a 1 in2 pad of 2oz cpper. b. 105oC/W when mounted on a 0.04 in2 pad of 2oz cpper. c. 125oC/W when mounted on a 0.006 in2 pad of 2oz cpper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDS8852H Rev. C1 Typical Electrical Characteristics -20 20 VGS =10V , DRAIN-SOURCE CURRENT (A) 8 .0 6.0 , DRAIN-SOURCE CURRENT (A) VGS = - 10V 5 .0 -15 - 8.0 - 7.0 - 6.0 - 5.5 15 4 .5 10 4 .0 -10 - 5.0 - 4.5 - 4.0 3 .5 5 -5 - 3.5 - 3.0 I 3 .0 0 0 1 2 V DS , DRAIN-SOURCE VOLTAGE (V) 3 D I 0 0 D -1 V DS -2 -3 , DRAIN-SOURCE VOLTAGE (V) -4 -5 Figure 1. N-Channel On-Region Characteristics. Figure 2. P-Channel On-Region Characteristics. 3 3 DRAIN-SOURCE ON-RESISTANCE VGS = 3.5V 2.5 R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.5 VGS = - 3.5V - 4.0 - 4.5 - 5.0 R DS(on) , NORMALIZED 4 .0 2 2 4 .5 1.5 - 5.5 - 6.0 5 .0 6 .0 8 .0 10 1.5 1 1 - 7.0 - 8.0 - 10 0.5 0 3 6 9 I D , DRAIN CURRENT (A) 12 15 0.5 0 -3 -6 -9 I D , DRAIN CURRENT (A) -12 -15 Figure 3. N-Channel On-Resistance Variation with Gate Voltage and Drain Current. Figure 4. P-Channel On-Resistance Variation with Gate Voltage and Drain Current. 1.6 1.6 DRAIN-SOURCE ON-RESISTANCE I D = 3.4A DRAIN-SOURCE ON-RESISTANCE 1.4 R DS(ON), NORMALIZED V GS = 10V R DS(ON), NORMALIZED 1.4 I D = -3.4A V GS = -10V 1.2 1.2 1 1 0.8 0.8 0.6 -50 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 150 0.6 - 50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 Figure 5. N-Channel On-Resistance Variation with Temperature. Figure 6. P-Channel On-Resistance Variation with Temperature. NDS8852H Rev. C1 Typical Electrical Characteristics 2 2 DRAIN-SOURCE ON-RESISTANCE V G S = 10 V DRAIN-SOURCE ON-RESISTANCE 1.5 V G S = - 10V T J = 125°C R DS(on) , NORMALIZED 25°C 1 R DS(on) , NORMALIZED TJ = 125°C 1.5 2 5°C 1 -55°C - 55°C 0.5 0 3 6 9 I D , DRAIN CURRENT (A) 12 15 0.5 0 -3 -6 -9 I D , DRAIN CURRENT (A) -12 -15 Figure 7. N-Channel On-Resistance Variation with Drain Current and Temperature. Figure 8. P-Channel On-Resistance Variation with Drain Current and Temperature. 10 -10 V DS = 1 0 V 8 I D, DRAIN CURRENT (A) TJ = -55°C 125°C -8 I D , DRAIN CURRENT (A) V DS = -10V T = -55°C J 25°C 125°C 25°C 6 -6 4 -4 2 -2 0 1 2 3 4 5 0 -1 -2 V GS , GATE TO SOURCE VOLTAGE (V) -3 -4 -5 V GS , GATE TO SOURCE VOLTAGE (V) -6 Figure 9. N-Channel Transfer Characteristics. Figure 10. P-Channel Transfer Characteristics. 1.2 GATE-SOURCE THRESHOLD VOLTAGE GATE-SOURCE THRESHOLD VOLTAGE 1.2 1.1 V DS = V GS I D = 250µA V th , NORMALIZED 1.1 VDS = VG S I D = -250µA Vth , NORMALIZED 1 1 0.9 0.9 0.8 0.7 0.8 0.6 -50 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 150 0.7 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 Figure 11. N-Channel Gate Threshold Variation with Temperature. Figure 12. P-Channel Gate Threshold Variation with Temperature. NDS8852H Rev. C1 Typical Electrical Characteristics DRAIN-SOURCE BREAKDOWN VOLTAGE 1.12 DRAIN-SOURCE BREAKDOWN VOLTAGE 1.1 I D = 250µA 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 -50 I D = -250µA BV DSS , NORMALIZED 1.08 BV DSS, NORMALIZED 1.04 1 0.96 0.92 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 150 Figure 13. N-Channel Breakdown Voltage Variation with Temperature. Figure 14. P-Channel Breakdown Voltage Variation with Temperature. 1000 800 500 1000 800 500 CAPACITANCE (pF) CAPACITANCE (pF) C i ss 300 200 C i ss 300 200 C o ss C o ss 100 f = 1 MHz V GS = 0V C r ss 30 100 f = 1 MHz V GS = 0 V C r ss 50 0.1 0.2 0.5 1 2 5 10 V DS , DRAIN TO SOURCE VOLTAGE (V) 50 0.1 0.2 0.5 1 2 5 10 -VDS , DRAIN TO SOURCE VOLTAGE (V) 30 Figure 15. N-Channel Capacitance Characteristics. Figure 16. P-Channel Capacitance Characteristics. 10 10 I D = 3.4A V GS , GATE-SOURCE VOLTAGE (V) 8 V DS = 10V -V GS , GATE-SOURCE VOLTAGE (V) 20V I D = -3.4A 8 V DS = -10V -20V -15V 15V 6 6 4 4 2 2 0 0 2 4 6 8 Q g , GATE CHARGE (nC) 10 12 0 0 2 4 6 8 Q g , GATE CHARGE (nC) 10 12 Figure 17. N-Channel Gate Charge Characteristics. Figure 18. P-Channel Gate Charge Characteristics. NDS8852H Rev. C1 Typical Electrical and Thermal Characteristics 10 5 I S, REVERSE DRAIN CURRENT (A) 10 5 -I S , REVERSE DRAIN CURRENT (A) V GS = 0V V GS = 0V 1 0.5 TJ = 125°C 1 0.5 25°C - 55°C T = 125°C J 25°C - 55°C 0.1 0.1 0.01 0.01 0.001 0.2 0.4 0.6 0.8 1 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V) 1.4 0.001 0.2 0.4 0.6 0.8 1 1.2 -VSD , BODY DIODE FORWARD VOLTAGE (V) 1.4 Figure 19. N-Channel Body Diode Forward Voltage Variation with Current and Temperature. Figure 20. P-Channel Body Diode Forward Voltage Variation with Current and Temperature. 10 6 V DS =10V , TRANSCONDUCTANCE (SIEMENS) 8 T J = -55°C , TRANSCONDUCTANCE (SIEMENS) 5 V DS = -10V TJ = -55°C 2 5°C 2 5°C 1 25°C 4 6 1 25°C 3 4 2 2 1 FS g 0 g 0 2 4 6 8 10 FS 0 0 -2 I D , DRAIN CURRENT (A) -4 -6 I D , DRAIN CURRENT (A) -8 -10 Figure 21. N-Channel Transconductance Variation with Drain Current and Temperature. Figure 22. P-Channel Transconductance Variation with Drain Current and Temperature. 2.5 STEADY-STATE POWER DISSIPATION (W) 1a 2 1.5 1b 1c 1 4.5"x5" FR-4 Board TA = 2 5 C Still Air o 0.5 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 Figure 23. SO-8 Single Device DC Power Dissipation versus Copper Mounting Pad Area. NDS8852H Rev. C1 Typical Thermal Characteristics 5 1a 5 -I D , STEADY-STATE DRAIN CURRENT (A) I D , STEADY-STATE DRAIN CURRENT (A) 4 4 1a 1b 3 1c 3 1b 1c 2 4.5"x5" FR-4 Board TA = 2 5 C Still Air VG S = 1 0 V o 2 4.5"x5" FR-4 Board TA = 2 5 C Still Air VG S = - 1 0 V o 1 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 1 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 Figure 24. N-Ch Maximum Steady-State Drain Current versus Copper Mounting Pad Area. Figure 25. P-Ch Maximum Steady-State Drain Current versus Copper Mounting Pad Area. 30 10 ID , DRAIN CURRENT (A) 3 1 0.3 0.1 0.03 0.01 0.1 RD S(O N) IT 30 LIM 0 1m us s ms s -I D , DRAIN CURRENT (A) 10 10 T MI 0u 10 3 1 S(O N) LI s 1m 10 10 0m ms s 10 10 1s 0m s RD 1s 0.3 0.1 0.03 0.01 0.1 VGS = 1 0V SINGLE PULSE R θJ A = See Note 1c T A = 25°C 10 s DC V GS = -10V SINGLE PULSE R θJ A = See Note 1c T A = 25°C 10 s DC 0.2 0.5 1 2 5 10 V DS , D RAIN-SOURCE VOLTAGE (V) 30 50 0.2 0.5 1 2 5 10 - VDS , DRAIN-SOURCE VOLTAGE (V) 30 50 Figure 26. N-Ch Maximum Safe Operating Area. Figure 27. P-Ch Maximum Safe Operating Area. 1 0 .5 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0 .5 0 .2 0 .1 0 .05 0 .02 0 .01 S ingle Pulse P(pk) 0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1 0 .0 0 5 0 .0 0 2 0 .0 0 1 0 .0001 R JA ( t) = r(t) * R JA θ θ R JA = See Note 1c θ t1 TJ - T A t2 = P * R JA (t) θ D uty Cycle, D = t 1 / t 2 0 .001 0 .0 1 0 .1 1 10 100 300 t 1 , TIME (sec) Figure 28. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDS8852H Rev. C1 SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure 1.0 Packaging Description: EL ECT ROST AT IC SEN SIT IVE DEVICES DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms Antistatic Cover Tape ESD Label SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. Static Dissipative Embossed Carrier Tape F63TNR Label Customized Label F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.0774 0.6060 L86Z Rail/Tube 95 530x130x83 30,000 0.0774 F011 TNR 4,000 13" Dia 343x64x343 8,000 0.0774 0.9696 D84Z TNR 500 7" Dia 184x187x47 1,000 0.0774 0.1182 F852 NDS 9959 Pin 1 SOIC-8 Unit Orientation 343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC: F63TNLabel F63TN Label ESD Label (F63TNR)3 D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: N/F: F SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0 Carrier Tape Cover Tape Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0 T E1 P0 D0 F K0 Wc B0 E2 W Tc A0 P1 D1 User Direction of Feed Dimensions are in millimeter Pkg type SOIC(8lds) (12mm) A0 6.50 +/-0.10 B0 5.30 +/-0.10 W 12.0 +/-0.3 D0 1.55 +/-0.05 D1 1.60 +/-0.10 E1 1.75 +/-0.10 E2 10.25 min F 5.50 +/-0.05 P1 8.0 +/-0.1 P0 4.0 +/-0.1 K0 2.1 +/-0.10 T 0.450 +/0.150 Wc 9.2 +/-0.3 Tc 0.06 +/-0.02 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). 20 deg maximum Typical component cavity center line 0.5mm maximum B0 20 deg maximum component rotation 0.5mm maximum Sketch A (Side or Front Sectional View) Component Rotation A0 Sketch B (Top View) Typical component center line Sketch C (Top View) Component lateral movement SOIC(8lds) Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max Dim N See detail AA 7" Diameter Option B Min Dim C See detail AA W3 Dim D min 13" Diameter Option W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size 12mm Reel Option 7" Dia Dim A 7.00 177.8 13.00 330 Dim B 0.059 1.5 0.059 1.5 Dim C 512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2 Dim D 0.795 20.2 0.795 20.2 Dim N 2.165 55 7.00 178 Dim W1 0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0 Dim W2 0.724 18.4 0.724 18.4 Dim W3 (LSL-USL) 0.469 – 0.606 11.9 – 15.4 0.469 – 0.606 11.9 – 15.4 12mm 13" Dia © 1998 Fairchild Semiconductor Corporation July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S1) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0774 9 September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ DISCLAIMER ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™ UHC™ VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.