RC4200AM

www.fairchildsemi.com RC4200 Analog Multiplier Features • High accuracy • Nonlinearity – 0.1% Temperature coefficient – 0.005%/°C • Multiple functions • Multiply, divide, square, square root, RMS-to-DC conversion, AGC and modulate/demodulate • Wide bandwidth – 4 MHz • Signal-to-noise ratio – 94 dB Description The RC4200 analog multiplier has complete compensation for nonlinearity, the primary source of error and distortion. This multiplier also has three onboard operational amplifiers designed specifically for use in multiplier logging circuits. These amplifiers are frequency compensated for optimum AC response in a logging circuit, the heart of a multiplier, and can therefore provide superior AC response. The RC4200 can be used in a wide variety of applications without sacrificing accuracy. Four-quadrant multiplication, two-quadrant division, square rooting, squaring and RMS conversion can all be easily implemented with predictable accuracy. The nonlinearity compensation is not just trimmed at a single temperature, it is designed to provide compensation over the full temperature range. This nonlinearity compensation combined with the low gain and offset drift inherent in a well-designed monolithic chip provides a very high accuracy and a low temperature coefficient. Applications • Low distortion audio modulation circuits • Voltage-controlled active filters • Precision oscillators Block Diagram I2 I1 – + – VOS2 + + – Q3 I3 Q4 I4 VOS1 Q2 Q1 RC4200 65-4200-01 REV. 1.2.1 6/14/01 RC4200 PRODUCT SPECIFICATION Functional Description The RC4200 multiplier is designed to multiply two input currents (I1 and I2) and to divide by a third input current (I4). The output is also in the form of a current (I3). A simplified circuit diagram is shown in the Block Diagram. The nominal relationship between the three inputs and the output is: I1 I2 I 3 = -------I4 (1) Previous multiplier designs have suffered from an additional undesired linear term in the above equation; the collector current times the emitter resistance. The ICrE term introduces a parabolic nonlinearity even with matched transistors. Fairchild Semiconductor has developed a unique and proprietary means of inherently compensating for this undesired ICrE term. Furthermore, this Fairchild Semiconductor developed circuit technique compensates linearity error over temperature changes. The nonlinearity versus temperature is significantly improved over earlier designs. From equation (2) and by assuming equal transistor junction temperatures, summing base-to-emitter voltage drops around the transistor array yields: I1 I2 I3 I4 KT ------- In ------ = In ------ – In ------ – In -----I S1 I S2 I S3 I S4 q This equation reduces to: I S1 I S2 I1 I2 -------- = -------------I S3 I S4 I3 I4 (4) =0 (3) The three input currents must be positive and restricted to a range of 1 µA to 1 mA. These currents go into the multiplier chip at op amp summing junctions which are nominally at zero volts. Therefore, an input voltage can be easily converted to an input current by a series resistor. Any number of currents may be summed at the inputs. Depending on the application, the output current can be converted to a voltage by an external op amp or used directly. This capabilty of combining input currents and voltages in various combinations provides great versatility in application. Inside the multiplier chip, the three op amps make the collector currents of transistors Q1, Q2 and Q4 equal to their respective input currents (I1, I2, and I4). These op amps are designed with current source outputs and are phase-compensated for optimum frequency response as a multiplier. Power drain of the op amps was minimized to prevent the introduction of undesired thermal gradients on the chip. The three op amps operate on a single supply voltage (nominally -15V) and total quiescent current drain is less than 4 mA. These special op amps provide significantly improved performance in comparison to 741-type op amps. The actual multiplication is done within the log-antilog configuration of the Q1-Q4 transistor array. These four transistors, with associated proprietary circuitry, were specially designed to precisely implement the relationship. kT I CN V BEN = ------ In -------Q I SN (2) The rate of reverse saturation current IS1IS2/IS3IS4, depends on the transistor matching. In a monolithic multiplier this matching is easily achieved and the rate is very close to unity, typically 1.0±1%. The final result is the desired relationship: I1 I2 I 3 = -------I4 (5) The inherent linearity and gain stability combined with low cost and versatility makes this new circuit ideal for a wide range of nonlinear functions. Pin Assignments I2 VOS2 –VS I3 (Output) 1 2 3 4 65-4200-07 8 7 6 5 I1 VOS1 GND I4 2 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Absolute Maximum Ratings Parameter Supply Voltage Input Current Storage Temperature Range Operating Temperature Range RC4200/4200A RC4200/4200A -55 0 1 Min. Max. -22 -5 +125 +70 Unit V mA °C °C Notes: 1. For a supply voltage greater than -22V, the absolute maximum input voltage is equal to the supply voltage. 2. Observe package thermal characteristics. Thermal Characteristics (Still air, soldered into PC board) 8-Lead Plastic DIP Maximum Junction Temperature Maximum PD TA < 50°C Thermal Resistance θJC Thermal Resistance θJA For TA > 50°C Derate at +125°C 468mW — 160°C/W 6.25mW/°C 8-Lead SOIC +125˚C 300mW — 240˚C/W 4.17mW/˚C Electrical Characteristics (Over operating temperature range, VS = -15V unless otherwise noted) 4200A Parameters Total Error as Multiplier Test Conditlons TA = +25°C Untrimmed1 With External Trim Versus Temperature Versus Supply (-9 to -18V) Nonlinearity2 Input Current Range (I1, I2 and I4) Input Offset Voltage Input Bias Current Average Input Offset Voltage Drift Output Current Range (I3)3 I1 = I2 = I4 = 150 µA TA = +25°C I1 = I2 = I4 = 150 µA TA = +25°C I1 = I2 = I4 = 150 µA 1.0 50µA ≤ I1,2,4 ≤ 250 µA, TA = +25°C 1.0 ±0.2 ±0.005 ±0.1 ±0.1 1000 ±5.0 300 ±50 1000 1.0 1.0 ±2.0 ±0.2 ±0.005 ±0.1 ±0.3 1000 ±10 500 ±3.0 % % %/°C %/V % µA mV nA Min. Typ. Max. Min. 4200 Typ. Max. Units ±100 µV/°C 1000 µA REV. 1.2.1 6/14/01 3 RC4200 PRODUCT SPECIFICATION Electrical Characteristics (continued) (Over operating temperature range, VS = -15V unless otherwise noted) 4200A Parameters Frequency Response, -3dB point Supply Voltage Supply Current I1 = I2 = I4 = 150 µA TA = +25°C Test Conditlons Min. Typ. 4.0 -15 Max. Min. 4200 Typ. 4.0 -15 Max. Units MHz V mA -18 -9.0 4.0 -18 -9.0 4.0 Notes: 1. Refer to Figure 6 for example. 2. The input circuits tend to become unstable at I1, I2, I4 < 50 µA and linearity decreases when I1, I2, I4 > 250 µA (eq. @ I1 = I2 = 500 µA, nonlinearity error ≈ 0.5%). 3. These specifications apply with output (I3) connected to an op amp summing junction. If desired, the output (I3) at pin (4) can be used to drive a resistive load directly. The resistive load should be less than 700Ω and must be pulled up to a positive supply such that the voltage on pin (4) stays within a range of 0 to +5V. Applications Discussion Current Multiplier/ Divider The basic design criteria for all circuit configurations using the RC4200 multiplier is contained in equation (1), that is, I1 I2 I 3 = -------I4 The current-product-balance equation restates this as: I1 I2 = I3 I4 R1 + I1 = VX R1 Dynamic Range and Stability The precision dynamic range for the RC4200 is from +50 µA to +250 µA inputs for I1, I2 and I4. Stability and accuracy degrade if this range is exceeded. To improve the stability for input currents less than 50 µA, filter circuits (RSCS) are added to each input (see Figure 2). R1 VX 8 I1 7 5 I4 R4 +VZ RS CS (6) R4 I4 I4 = VZ R4 + +VZ VY RS CS R2 VX 8 I1 7 5 RC4200 1 I2 4 2 3 –VS 6 I3 RC4200 VY + I2 = VY R2 R2 1 I2 2 3 – VS 6 RS RO VO +VS – A1 + –VS 65-4200-03 Ammeter 4 I3 65-4200-02 CS A RS = 10k Ohms CS = 0.005 µF Figure 1. Current Multiplier/Divider Figure 2. Current Multiplier/Divider with Filters Amplifier A1 is used to convert the I3 current to an output voltage. Multiplier: Vz = constant ≠ 0 Divider: Vy = constant ≠ 0 4 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Voltage Multiplier/Divider R1 VX 8 I1 7 5 I4 R4 VZ Resistors Ra and Rb extend the range of the VX and VY inputs by picking values such that: V X ( min. ) V REF I 1 ( min. ) = ----------------------- + ------------- = 50 µA, R1 Ra V X (max.) V REF and I 1 (max.) = ----------------------- + ------------- = 250 µA, Ra R1 V Y (min.) V REF also I 2 (min.) = ---------------------- + ------------- = 50 µA, R2 Rb RO VO RC4200 R2 VY I2 2 3 VXVY VV = OZ R 1R 2 R OR 4 – VS 65-4200-04 1 4 6 I3 V Y (max.) V REF and I 2 (max.) = ----------------------- + ------------- = 250 µA. Rb R2 Resistor RC supplies bias current for I3 which allows the output to go negative. Resistors RCX and RCY permit equation (6) to balance, ie.: V   V REF  V 0 V REF V X  V X V REF  V Y V REF Y  -------- + ---------------   -------- + ---------------  =  ------ + --------------- + ------------ + ------------  ---------------  R   RD  R R R R  R  R0  R1 CY CX C b a 2 V VV VV VV REF Y REF X REF YX ----------------- + ------------------------- + ------------------------- + --------------- = RR RR RR RR ab 2a 1b 12 2 V VV VV VV REF 0 REF X REF Y REF ----------------------- + ------------------------- + ------------------------- + ---------------RR RR R R RR cd 0d cx d CY d Figure 3. Voltage Multiplier/Divider VX VY R0 R4 Solving for V 0 = ------------------------------------VZ R1 R2 For a multiplier circuit V Z = V R = cons tan t R0 R4 Therefore: V 0 = V X V Y K where K = -------------------VR R1 R2 For a divider circuit V Y = V R = cons tan t VX VR R0 R4 Therefore: V 0 = ------- K where K = -------------------VZ R1 R2 Cross-Product Cancellation Cross-products are a result of ths VXVR and VYVR terms. To the extend that R1Rb = RCXRD, and R2Ra = RCYRd cross-product cancellation will occur. Extended Range The input and output voltage ranges can be extended to include 0 and negative voltage signals by adding bias currents. The RSCS filter circuits are eliminated when the input and biasing resistors are selected to limit the respective currents to 50 µA min. and 250 µA max. Arithmetic Offset Cancellation The offset caused by the VREF2 term will cancel to the extent that RaRb = R0Rd, and the result is: V 0 V REF VY VX --------------- = -------------------- or V 0 = V X V Y K R0 Rd R1 R2 R0 Rd where K = --------------------------V REF R 1 R 2 Extended Range Multiplier +VREF RA VX (Input) RB 8 R1 I1 7 RC 5 I4 RD Resistor Values Inputs: V X ( min. ) ≤ V X ≤ V X (max.) RO VO (Output) RC4200 R2 VY (Input) I2 2 3 RC4 6 – VS 1 4 I3 +VS ∆ V X = V X (max.) – V X (min.) V Y ( min. ) ≤ V Y ≤ V Y (max.) ∆ V Y = V Y (max.) = V Y (min.) V REF = Constant (+7V to +18V) RCX – VS 65-4200-05 V0 K = --------------- ( Design Requirements ) VX VY Figure 4. Extended Range Multiplier REV. 1.2.1 6/14/01 5 RC4200 PRODUCT SPECIFICATION ∆ VX ∆ VY V REF R 1 = ---------------- , R 2 = ---------------- , R d = ---------------200 µ A 200 µ A 250 µ A ∆ V X V REF R a = ------------------------------------------------------------------------------250 µ A ∆ V X – 200 µ A V X ( max. ) ∆ V X V REF R b = ------------------------------------------------------------------------------250 µ A ∆ V Y – 200 µ A V Y ( max. ) Ra Rb R1 Rb R2 Ra -, R c = ------------ , R CX = ------------ R cy = -----------Rd Rd Rd ∆ VX ∆ VY K R 0 = ---------------------------160 µ A Multiplying Circuit Offset Adjust 10K ≤ R5 = R9 = R16 ≤ 50K R7 = R11 = R14, = 100Ω R6 = R10 = 100Ω (VS/0.05) R15 = 100Ω (VS/0.10) R8 = R1 | | Ra R12 = R2 | | Rb R13 = R0 | | RC | | RCX | | RCY +VREF Ra R1 VX (Input) XOS +VS R6 R5 –VS VY (Input) R7 0.1 µF 1 +VS R9 YOS – VS RCY RCX R10 R12 R11 0.1 µF 3 – VS – 6 R2 I2 2 4 I3 R8 I1 Rb Rc 8 7 5 I4 Rd 100 Rd R17 R18 –VS R19 R20 ZOS +VS RC4200 R17–R20 can be used to help cancel crossproduct errors caused by resistor product mismatch. RO VO (Output) RC5534 + 0.1 µF +VS R13 R16 VOS R15 R14 –VS 65-4200-06 Figure 5. Multiplying Circuit Offset Adjust Procedure 1. 2. Set all trimmer pots to 0V on the wiper. Connect VX input to ground. Put in a full scale square wave on VY input. Adjust XOS(R5) for no square wave on V0 output (adjust for 0 feedthrough). 3. Connect VY input to ground. Put in a full scale square wave on VX input. Adjust YOS(R9) for no square wave on V0 output (adjust for 0 feedthrough). Connect VX and VY to ground. Adjust VOS(R16) for 0V on V0 output. 4. 6 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Extended Range Divider +VREF +VREF Ra Rb R az Rc Rd Notice that it is necessary to match the above resistor crossproducts to within the amount of error tolerable in the output offset, i.e., with a 10V F.S. output, 0.1% resistor crossproduct match will give 0.1% x 10V. untrimmable output offset voltage. Resistor Values Inputs: VX(min.) ≤ VX ≤ VX(max.) VZ (Output) R1 VX (Input) 8 I1 7 RC4200 Multiplier 1 I2 2 3 -VS 6 5 I4 R4 ∆VX = VX(max.) = VX(min.) VZ(min.) ≤ VZ ≤ VZ(max.) ∆VZ = VZ(max.) = VZ(min.) VREF = Constant (+7V to +18V) 4 I3 RO VO (Output) Outputs: V0 (min.) ≤ V0 ≤ V0 (max.) ∆V0 = V0 (max.) = V0 (min.) V0 VZ K = -------------- ( Design Requirement ) VX ∆ V0 ∆ V REF ∆ VZ R 0 = ---------------- , R b = ----------------- , R 4 = ---------------750 µ A 250 µ A 200 µ A ∆ V 0 V REF R c = ----------------------------------------------------------------------------750 µ A ∆ V 0 – 700 µ A V 0 ( max. ) ∆ V X V REF R d = -----------------------------------------------------------------------------250 µ A ∆ V Z – 200 µ A V Z ( max. ) Rc Rd Rc R4 R0 Rd R a = ------------ , R az = ------------ , R ao = -----------Rb Rb Rb ∆ V0 ∆ VZ R 1 = ---------------------600 µ AK +VS RC5534 -VS ao 65-4200-08 R Figure 6. Extended Range Divider As with the extended range multiplier, resistors Raz and Rao are added to cancel the cross-product error caused by the biasing resistors, i.e.  V 0 V REF  V Z V REF  V X V 0 V Z V REF  V REF  -------- + --------- + --------- + ---------------   ---------------  =  ------ + ---------------   ------- + ---------------  R R R R   Rb   R0  R 1 R ao R az D C 4 a 2 V VV VV VV REF Z REF 0 REF X REF ------------------------- + ----------------------- + ------------------------ + ---------------- = RR RR RR RR ab az b ao b 1b 2 V VV VV VV REF 0Z 0 REF Z REF --------------- + ----------------------- + ------------------------ + ---------------RR RR RR RR cd 04 0d 4c To cancel cross-product and arithmetic offset: RaoRb = R0Rd, RazRb = R4Rc and RaRb = RcRd and the result is: V0 VZ VX V X V REF --------------------- = -------------- or V 0 = ----------R0 R4 VZ K R1 Rb V REF R 0 R 4 where K = --------------------------R1 Rb REV. 1.2.1 6/14/01 7 RC4200 PRODUCT SPECIFICATION Divider Circuit with Offset Adjustment +VREF Ra Rb R AX 8 Rc Rd VZ (Input) +VS R12 R13 Z OS VZ (Offset) -VS R1 VX (Input) +VS R5 R7 +VS YOS R18 R21 = Rb R19 R20 -VS R9 0.1 µ F -VS 0.1 µF I2 V X (Offset) R6 X OS R8 5 I4 RC4200 Multiplier R10 R4 I1 7 R11 1 4 2 3 -VS 6 I3 RO VO (Output) R ao 0.1 µ F R14 +VS R16 R17 V OS V O (Offset) R15 -VS R18-R21 can be used in place of R9 to help cancel gain error due to resistor product mis-match (See Appendix 1). 65-1878 General 10K ≤ R5 = R13 = R17 ≤ 50K R7 + R8 ≈ R1 | | Ra | | Raz | | Rao R6 ≈ R7 (VS/0.05) R9 = Rb R10 ≈ 100 x R4 R11 = 20K R12 = 100K R14 + R15 ≈ R0 | | Rc R16 ≈ R15 (VS/0.10) Example: Two-Quad Divider V0 = K(VX/VZ), K = k, VREF = +VS = +15V -10 ≤ VX ≤ +10, therefore ∆VX = 20 0 ≤ VZ ≤ +10, therefore ∆VZ = 20 -10 ≤ V0 ≤ +10, therefore ∆V0 = 20 R0 = 26.7K R1 = 333K Rb = 60K R5, R13, R17 = 10K R4 = 50K R7, R15 = 1K Rc = 37.5K R8, R11 = 20K Rd = 300K R6, R9, R16 = 300K Ra = 187.5K R10 = 4.7M Raz = 31.25 R12 = 100K Rao = 133K Figure 7. Divider Circuit with Offset Adjustment 8 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Divider Circuit Offset Adjustment Procedure 1. 2. Set each trimmer pot to 0V on the wiper. Connect VX (input) to ground. Put a DC voltage of approximatey 1/2 VZ (max.) DC on the VZ (input) with an AC (squarewave is easiest) voltage of 1/2 VZ (max.) peak-to-peak superimposed on it. Adjust XOS (R5) for zero feedthrough. (No AC at V0) V z (Max.) Square Root Circuit V0 = N√VX +V REF Ra Rb Rc Rd R1 VX (Input) 8 I1 7 RC4200 Multiplier 5 I4 R4 1/2 V z (Max.) 1/2 Vz (Max.) I2 1 4 2 3 6 I3 +VS RO VO (Output) 0V 3. Connect VX (input) to VZ (input) and put in the 1/2 VZ(max.) DC with an AC of approximately 20 mV less than VZ(max.). Adjust ZOS (R13) for zero feedthrough. V z (Max.) 1/2 Vz (Max.) 0V ~ 10 mV ~ 65-1868 -VS R ao -VS 65-1877 Figure 8. 2V V 2 VV V2 VV V V VV 0 REF 0 REF 0 0 REF REF REF X REF ------------------------- + ---------------- + ----------------------- = -------------- + ----------------------- + ----------------------- + ---------------RR RR RR RR RR RR RR c4 04 ao b ab cd 1b 0d If R R = R R and R R R R + R R R R = R R R R ab cd ao b 0 d ao b c 4 cd04 V RR VV V2 REF 0 4 X REF 0 Then -------------- = ------------------------- or V 2= V K where K = ------------------------------0 X RR RR RR 1b 1b 04 and V 0 X =N V X where N = K 4. Return VX (Input) to ground and connect VZ(max.) DC on VZ(input). Adjust output VOS(R17) for VO = 0VO Connect VX (input) to VZ (input) and and in VZ (max.) DC. (The output will equal K.) Decrease the input slowly until the output (V0 - K) deviates beyond the desired accuracy. Adjust ZOS to bring it back into tolerance and return to Step 4. Continue steps 4 and 5 until VZ reduces to the lowest value desired. 0≤V ≤ V ( max. ) and V ( max. ) = N V ( max. ) X 0 X 5. V 0 N = ------------ ( Design Requirements ) V X V ( max. ) 2 0 = --------------------------2 74 µ A N R 1 Notice that as the input to VX and VZ gets closer to zero (an illegal state) the system noise will predominate so much that an integrating voltmeter will be very helpful. V REF R = R = --------------a d 50 µ A R V REF = R = ---------------c 150 µ A V ( max. ) 0 = ----------------------50 µ A V ( max. ) 0 = ----------------------125 µ A V ( max. ) 0 = ----------------------225 µ A b R 4 R ao R 0 REV. 1.2.1 6/14/01 9 RC4200 PRODUCT SPECIFICATION Square Root Circuit Offset Adjust +V REF Ra R1 VX (Input) +VS R6 XOS R5 R7 +VS YOS R14 R17 = Rb R15 R16 -VS R9 -VS R8 Rb 8 I1 7 RC4200 Multiplier Rc 5 I4 Rd R4 1 0.1 µ F I2 2 0.1 µ F 3 -VS 6 4 I3 RO +VS VO (Output) R ao 0.1 µF R10 -VS +VS R12 R13 V OS R11 R14-R17 can be used in place of R9 to help reduce linearity error due to resistor product mis-match (See Appendix 1). -VS 65-1876 Figure 9. Square Root Circuit Offset Adjust 10K ≤ R 5 = R 13 ≤ 50K R 7 = 100 Ω VS R 6 = R 7 --------0.05 R 8 = R 1 || R a || R ao R9 = Rb R 10 = R 0 || R C R 11 = 100 Ω VS R 12 = R 11 -----0.1 Procedure 1. 2. Set both trimmer pots to 0V on the wiper. Put in a full scale (0 to VX(max.) squarewave on VX input. Adjust XOS(R5) for proper peak-to-peak amplitude on V0 output. (Scaling adjust) Connect VX input to ground. Adjust VOS(R13) for 0V on V0 output. 3. 10 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Squaring Circuits V0 = K VX2 +V REF Ra R1 VX (Input) Rb 8 I1 7 RC4200 Multiplier 5 Rc Rd I4 R1 I2 1 4 2 3 -VS 6 I3 +VS RO VO (Output) RCX RC5534 -VS 65-1875 Figure 10. Squaring Circuit V X2 2V X V REF V REF 2 V 0 V REF V REF 2 V X V REF ------- + ------------------------- + ------------- = -------------------- + ------------- + --------------------R1 Ra R0 Rd Rc Rd Rc Rd R1 2 R a2 if R a2 = R c R d and R 1 R a = 2R CX R D V X2 R0 Rd V 0 V REF then -------------------- = -------2 or V 0 = KV X2 where K = -------------------- 2 R0 Rd R1 V REF R 1 VX(min.) ≤ VX ≤ VX(max.) ∆VX = VX(max.) – VX(min.) V0 K = -------2 (Design Requirement) VX ∆ VX R 1 = ---------------200 µ A ∆ V X V REF R a = ------------------------------------------------------------------------------250 µ A ∆ V X – 200 µ A V X ( max. ) V REF R d = ---------------250 µ A R a2 R c = -----Rd R1 Ra R cx = -----------2R d ∆ VX 2 K R 0 = -----------------160 µ A REV. 1.2.1 6/14/01 11 RC4200 PRODUCT SPECIFICATION Squaring Circuits Offset Adjust +VREF Ra R1 R5 Rb Rc 8 5 I4 Rd R7 = 100 Rd R9 +VS VX (Input) R10 Z OS R8 I1 7 -VS R1 0.1 µF 1 R6 I2 2 RC4200 Multiplier R7-R10 can be used to cancel all linearity errors caused by input offsets and resistor product mis-match (See Appendix 1). 4 0.1 µ F R CX +VS R14 VOS R13 R15 R16 3 -VS 6 I3 RO VO (Output) +VS -VS 0.1 µ F 65-1874 -VS Figure 11. Squaring Circuit Offset Adjust 10K ≤ R 10 = R 11 ≤ 50K R 8 , R 15 = 100 Ω R 9 , R 14 VS = 100 Ω -----0.1 Procedure 1. 2. 3. Set both trimmer pots to 0V on the wiper. Put in a full scale (±VX) squarewave on VX input. Adjust ZOS(R10) for uniform output. Connect VX input to ground. Adjust VOS(R11) for 0V on V0 outputs. R 5 , R 6 = R 1 || R a R 16 = R 0 || R c || R a 12 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Appendix 1—System Errors There are four types of accuracy errors which affect overall system performance. They are: • Nonimearity—Incremental deviation from absolute accuracy. See Note 1. • Scaling Error—Linear deviation from absolute accuracy. • Output Offset—Constant deviation from absolute accuracy. • Feedthrough.—Cross-product errors caused by input offsets and external circuit limitations. See Note 2. This nonlinearity error in the transfer function of the RC4200 is ±0.1% maximum (±0.03 maximum for the RC4200A). That is, I1 I2 I 3 = -------- ± 0.1% F.S. ( 4 ) I4 The other system errors are caused by voltage offsets on the inputs of the RC4200 and can be as high as ±3.0% (±2.0% for RC4200A). VX VY R0 R4 V 0 = --------------- ------------ ± 3.0% F.S. ( 3 ) ( 4 ) VZ R1 R2 R1 VX R4 I4 RC4200 Multiplier R2 VY I2 2 3 -VS 6 1 4 I3 RO VO +VS Errors Caused by Input Offsets V0 = 1 R0R4 VXVY ± VV ± VXVOSY ± V0VOSZ ± VOSXVOSY VZ VZ Y OSX R0R4 VY Feedthrough VX Feedthrough Scaling Error Output Offset Error System errors can be greatly reduced by externally trimming the input offset voltages of the RC4200. (±3.0% F.S. for RC4200 and ±0.1% for RC4200A.) VX R1 8 5 R4 VZ +VS R1 X OS -VS +VS R2 1 RO VO 7 RC4200 Multiplier VY 100 R4 ZOS -VS 4 2 3 -VS -VS Ideal Op-Amp V OS = 0 6 +VS R2 8 I1 7 5 VZ 65-1870 If XOS = XOSX, YOS = YOSY, ZOS = -VOSZ, VX VY R0 R4 ( then V O --------------- ------------ ±0.3% F.S.3 ) VZ R1 R2 Figure 13. RC4200 with Input Offset Adjustment Extended Range Circuit Errors The extended range configurations have a disadvantage in that additional accuracy errors may be introduced by resistor product mismatching. Ideal Op-Amp V OS = 0 65-1871 Multiplier An error in resistor product matching will cause an equivalent feedthrough or output offset error. See Figure 6. R1Rb = RCXRd ±α, VX feedthrough (VY = 0) = IαVX R2Ra = RCYRd ±β, VY feedthrough (VX = 0) = ±βVY RaRb = RCRd ±γ, V0 offset (VX = VY = 0) = ±γVREF* Note: * Output offset errors can always be trimmed out with the output op amp offset adjust, VOS (R16). Figure 12. Notes: 1. The input circuits tend to become unstable at I1, I2, I4 < 50 µA and linearity decreases when I1, I2, I4 > 250 µA (e.g., @ I1 = I2 = 500µA nonlinearity error ≈ 0.5%). 2. This section will not deal with feedthrough which is proportional to frequency of operation and caused by stray capacitance and/or bandwidth limitations. (refer to Figure 12.) 3. Not including resistor tolerance or output offset on the operational amplifier. 4. For 50 µA ≤ I1, I2, I4 ≤ 250 µA. REV. 1.2.1 6/14/01 13 RC4200 PRODUCT SPECIFICATION Reducing Mismatch Errors You need not use 0.01% resistors to reduce resistor product mismatch errors. Here are a couple of ways to obtain maximum accuracy out of the extended range multiplier (see Figure 4) using 1% resistors. Method 1 VX feedthrough, for example, occurs when VY = 0 and VOSY ≠ 0. This VX feedthrough will equal ±VXVOSY. Also, if VOSZ ≠ 0, there is a VX feedthrough equal to VXVOSZ. A resistor-product error of α will cause a VX feedthrough of ±αVX. Likewise, VY feedthrough errors are: ±VYVOSX, ±VYVOSZ and ±βVY Select Rd to be 1% or 2% below (or above) the calculated value. This will cause α and β to both be positive (or negative) by nearly the same amount. Now the effective value of Rd can be trimmed with an offset adjustment ZOS(R20) on pin 5. This technique causes: a slight gain error which can be compensated with the R0 value, and an output of offset error that can be trimmed with VOS(R16) on the output op amp. Extended Range Divider The only cross-product error of interest is the VZ feedthrough (VX = 0 and VOSX ≠ 0) which is easily adjusted with XOS(R5). See Figure 6. Resistor product mismatch will cause scaling errors (gain) that could be a problem for very low values of VZ. Adjustments to YOS(R18) can be made to improve the high gain accuracy. Total feedthrough: ±VXVOSY ±VYVOSX ±αVX ±βVY ±(VX + VY) VOSZ By carefully abusing XOS(R5), YOS(R9) and ZOS(R20) this equation can be made to very nearly equal zero and the feedthrough error will practically disappear. A residual of set will probably remain which can be trimmed outwith VOS(R16) at the output of amp. Method 2 Square Root and Squaring These circuits are functions of single variables so feedthrough, as such, is not a consideration. Cross product errors will effect incremental accuracy that can be corrected YOS(R14) or ZOS(R10). See Figure 9 and Figure 11. Notice that the ratios of R1Rb:RCXRd and R2Ra:RCYRd are both dependent of Rd also that R1, R2, Ra and Rb are all functions of the maximum input requirements. By designing a multiplier for the same input ranges on both VX and VY then R1 = R2, RCX = RCY and Ra = Rb. (Note: it is acceptable to design a four quadrant multiplier and use only two quadrants of it.) 14 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Appendix 2—Applications Design Considerations for RMS-to-DC Circuits Average Value Consider Vin = Asinωτ. By definition, Therefore, the rms value of Asinωt becomes: A V rms = -----2 RMS Value for Rectified Sine Waves Consider Vin = |A sin ωt|, a rectified wave. To solve, V AG = ∫0 VIN dt T -2 integrate of each half cycle. 1 2 i.e. -- TV in dt = T0 Where T = Period ω = 2πf 2π = ----T ∫ 1 -T ∫0 T -- 2 2A sin 2 ω t dt+ ∫T- ( –Asin ω t ) dt -2 2 T VIN A 1 2 2 This is the same as -- TA sin ω t dt 1 ∫0 so, |Asin ω t| rms = Asin ω t rms t 0 T 2 T 65-1873 Practical Consideration: |Asinωt| has high-order harmonics; Asinωt does not. Therefore, non-ideal integrators may cause different errors for two approaches. (a) VIN a2 Low Pass Filter 2 2 V AG = -T ∫0 A sin ω t dt T -2 0 T -2 V O = VIN rms 2A 1 -= ------ – --- cos ω t Tω (b) VIN Absolute Value VIN a2 b VIN VO Low Pass Filter VO = A VG V IN2 2A = ------ [ – cos ( π ) + cos ( 0 ) ] 2π 2 Average Value of Asin ω t is -- A π RMS Value 65-4200-09 Figure 14. Again, consider VIN = Asinωt V rms = V AVG = 1 -T ∫0 [ VIN ]2 dt T V IN Avg --------V0 2 = V0 Avg ( VIN 2 2 implies V 0 = V0 = ) V rms for Asin ω tdt: V rms = 1 -T ∫0 A sin ω t dt 2 2 2T T Avg VIN V rms = A -----T 2 ∫0 11 -- – -- cos 2 cos 2 ω t dt -22 T 0 V rms = AT 1 ------ -- – ------ sin2 ω t 2 2 4ω AT ------ -22 A -----2 2 2 V rms = V rms = REV. 1.2.1 6/14/01 15 RC4200 PRODUCT SPECIFICATION +V REF 100K VIN 100K 100K 8 167K 5 60K 300K 100K 8 100K 5 300K 200K 13.3K 7 RC4200A Multiplier 50K 100K 50K 2 3 -VS 83.3K 0.1 µF 1/2 RC5532 22 µ F 7 10K 1 RC4200A Multiplier X X2 1 4 6 250K* 60K 4 2 3 -VS 6 44.4K** VOUT 1/2 RC5532 0.1 µF 80K +VS 15K 30K 10K 10K 100 -VS +VS 45.5 K 30K *Determines sacle factor (K) for X 2 function. **Determines sacle factor (K) for X function. +Vs = +VREF = +15V -Vs = -15V 100 -VS 65-1869 Figure 15. RMS to DC Converter VOUT=√VIN2 Amplitude Modulator with A.G.C. In many AC modulator applications, unwanted output modulation is caused by variations in carrier input amplitude. The versatility of the RC4200 multiplier can be utilizes to eliminate this undesired fluctuation. The extended range multiplier circuit (Figure 4) shows an output amplitude inversely proportional to the reference voltage VREF. VX VY R0 Rd i.e., V 0 = --------------- -----------V REF R 1 R 2 By making VREF proportional to VY (where VY is the carrier input) such that: V REF = V H = If VH is made proportional to the average value of Asinωt (i.e., 2A/π) and scaled by a value of π/2 then: VH=A and if: VX = Modulating input (VM) and: VY Carrier input (Asinωt) R0 Rd Then: V0 = K VM sinωt where K = -----------R1 R2 The resistor scaling is determined by the dynamic range of the carrier variation and modulating input. The resistor values are solved, as with the other extended range circuits, in terms of the input voltages. Input voltages: Modulation voltage (VM): 0 ≤ VM ≤ VX(max.) Carrier (VY): VY = Asinωt Carrier amplitude fluctuation (∆A): A(min.) sint ≤ VY ≤ A(max.) sinΩωt Dynamic Range (N): A(max.)/A(min.), A(max.) = VH(max.) and A(min.) = VH(min.) ∫ ( VY ) Then the denominator becomes a variable value that automatically provides constant gain, such that the modulating input (VX) modulates the carrier (VY) with a fixed scale factor even though the carrier varies in amplitude. 16 REV. 1.2.1 6/14/01 PRODUCT SPECIFICATION RC4200 Ra R1 +VS 10K 100 -VS VY = A SIN ω t R2 +V S 10K 100 -VS 30K R1 Ra Ra 5 Ra VM 8 7 Ra RC4200 Multiplier RO 0.1 µF 1 R2 Ra 30K 2 4 0.1 µF 3 -VS 6 1/4 RC4156 0.1 µ F R* VO = VM sin ω t +VS R1 R2 10K R3 30K R3 30K 1N914 1/4 RC4156 1/2 R3 15K C1 470 -VS R3 30K p R3 47K 2 1/4 RC4156 30K VH = p AVG A sin ω t = A 2 *R1 1N914 R2 Ra RO 65-1866 Figure 16. Amplitude Modulator with A.G.C. The maximum and minimum values for I1 and I2 lead to: V X ( max. ) V H ( max. ) I 1 (max.) = ------------------------ + ------------------------ = 250 µ A R1 Ra V H ( min. ) I 1 (min.) = ----------------------- = 50 µ A V M( min. ) = 0 Ra A ( max. ) V H ( max. ) I 2 (max.) = -------------------- + ------------------------ = 250 µ A R2 Ra V H ( min. ) I 2 (min.) = ----------------------- = 50 µ A Ra For a dynamic range of N, where A ( max. ) N = -------------------- < 5, A ( min. ) These equations combine to yield: V X (max.) A(max.) R 1 = -------------------------------- , R2 -------------------------------- , ( 5 – N ) 50 µ A ( 5 – N ) 50 µ A R1 R2 A(min.) -, R a = ------------------ and R O = K -----------50 µ A Ra REV. 1.2.1 6/14/01 Example 1 VY = Asinωt 2.5V ≤ A ≤ 10V, therefore N = 4 0V ≤ VM ≤ 10V, therefore VX(max.) = 10V K = 1, therefore V0 = VM sinωt V X (max.) 10V R 1 = ----------------------- = ------------- = 200K 50 µ A 50 µ A A(max.) 10V R 1 = ------------------- = ------------- = 200K 50 µ A 50 µ A A(min.) 2.5V R a = ------------------ = ------------- = 50K 50 µ A 50 µ A R1 R2 200K × 200K R O = K ------------ = 1 -------------------------------- = 800K Ra 50K Example 2 VY = Asinωt 3 ≤ A ≤ 6, therefore N = 2 0V ≤ VM ≤ 8V, therefore VX(max.) = 8V K = 0.2, therefore V0 = 0.2 VM sinwt so: R1 = 53.3K, R2 = 40K Ra = 60K and R0 = 7.11K 17 RC4200 PRODUCT SPECIFICATION Inputs VZ R1 VX Rs +VS Cs VOS1 R1 -VS VY Rs +VS Cs VOS2 2 3 -VS 6 RO I2 4 I3 VOS3 1/4 4156 0.1 µF +VS 50 mV R2 100 0.1 µF 1 Gain Adj. Output VO 7 RC4200 Multiplier RO I1 8 5 I4 50 mV VOS4 ADJ R4 100 R4 +VS -VS 100 -VS 50 mV 0.1 µ F RS = 10K, C S = 0.005 µF VX VY K Vz R O R4 R1 R2 100 µV -VS Vs = Where K = 65-1867 Limited Range, First Quadrant Applications The following circuit has the advantage that cross-product errors are due only to input offsets and nonlinearity error is sightly error is slightly less for lower input currents. The circuit also has no standby current to add to the noise content, although the signal-to-noise ratio worsens at very low input currents (1-5 µA) due to the noise current of the input stages. The RSCS filter circuits are added to each input to improve the stability for input currents below 50 µA. Thermal Symmetry I2 Thermal Symmetry Line VOS2 –VS Output I3 1 2 3 4 8 7 6 5 I1 VOS1 GND I4 65-0070 Caution! The bandpass drops off significantly for lower currents (