RC5061

www.fairchildsemi.com RC5061 High Performance Programmable Synchronous DC-DC Controller for Multi-Voltage Platforms Features • Programmable output for Vcore from 1.3V to 3.5V using an integrated 5-bit DAC • Controls adjustable linears for Vtt (1.5V), and Vclock (2.5V) • Meets VRM specification with as few as 5 capacitors • Meets 1.550V +40/-70mV over initial tolerance, temperature and transients • • • • • • • Remote sense Active Droop (Voltage Positioning) Drives N-Channel MOSFETs Overcurrent protection using MOSFET sensing 85% efficiency typical at full load Integrated Power Good and Enable/Soft Start functions 20 pin SOIC package Applications • • • • Power supply for Pentium® III Camino Platform Power supply for Pentium III Whitney Platform VRM for Pentium III processor Programmable multi-output power supply Description The RC5061 is a synchronous mode DC-DC controller IC which provides a highly accurate, programmable set of output voltages for multi-voltage platforms such as the Intel Camino, and provides a complete solution for the Intel Whitney and other high-performance processors. The RC5061 features remote voltage sensing, independently adjustable current limit, and Active Droop for optimal converter transient response. The RC5061 uses a 5-bit D/A converter to program the output voltage from 1.3V to 3.5V. The RC5061 uses a high level of integration to deliver load currents in excess of 16A from a 5V Block Diagram +3.3V 9 10 VCCP 11 + + +5V VCCA 17 REF PWRGD, OCL OCL REF +12V PWRGD, OCL OSC + + 15 RS 16 20 VCCP 1 HIDRV +5V +1.5V 12 +2.5V + + Digital Control 2 VCC 19 LODRV 18 GNDP 5-Bit DAC 8765 4 VID0 VID2 VID4 VID1 VID3 1.24V Reference 3 GNDA 13 ENABLE/SS Power Good 14 PWRGD Pentium is a registered trademark of Intel Corporation. REV. 1.0.0 7/6/00 RC5061 PRODUCT SPECIFICATION source with minimal external circuitry. Synchronous-mode operation offers optimum efficiency over the entire specified output voltage range. An on-board precision low TC reference achieves tight tolerance voltage regulation without expensive external components, while Active Droop permits exact tailoring of voltage for the most demanding load transients. The RC5061 includes linear regulator controllers for Vtt termination (1.5V), and Vclock (2.5V), each adjustable with an external divider. The RC5061 also offers integrated functions including Power Good, Output Enable/Soft Start and current limiting, and is available in a 20 pin SOIC package. Pin Assignments HIDRV SW GNDA VID4 VID3 VID2 VID1 VID0 VTTGATE VTTFB 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCCP LODRV GNDP VCCA VFB IFB PWRGD SS/ENABLE VCKFB VCKGATE RC5061 Pin Definitions Pin Number Pin Name 1 2 3 4-8 HIDRV SW GNDA VID0-4 Pin Function Description High Side FET Driver. Connect this pin through a resistor to the gate of an N-channel MOSFET. The trace from this pin to the MOSFET gate should be 15V. The on-resistance (RDS,ON) is the primary parameter for MOSFET selection. The on-resistance determines the power dissipation within the MOSFET and therefore significantly affects the efficiency of the DC-DC Converter. For details and a spreadsheet on MOSFET selection, refer to Applications Bulletin AB-8. Some margin should be maintained away from both Lmin and Lmax. Adding margin by increasing L almost always adds expense since all the variables are predetermined by system performance except for CO, which must be increased to increase L. Adding margin by decreasing L can be done by purchasing capacitors with lower ESR. The RC5061 provides significant cost savings for the newer CPU systems that typically run at high supply current. RC5061 Short Circuit Current Characteristics The RC5061 protects against output short circuit on the core supply by turning off both the high-side and low-side MOSFETs and resetting softstart. The short circuit limit is set with the RS resistor, as given by the formula RS = ISC *RDS, on IDetect Inductor Selection Choosing the value of the inductor is a tradeoff between allowable ripple voltage and required transient response. The system designer can choose any value within the allowed minimum to maximum range in order to either minimize ripple or maximize transient performance. The first order equation (close approximation) for minimum inductance is: Lmin = (Vin – Vout) f x Vout Vin ESR x Vripple with IDetect ≈ 50µA, ISC is the desired current limit, and RDS,on the high-side MOSFET’s on resistance. Remember to make the RS large enough to include the effects of initial tolerance and temperature variation on the MOSFET’s RDS,on. Alternately, use of a sense resistor in series with the source of the MOSFET eliminates this source of inaccuracy in the current limit. The value of RS should be less than 8.3KΩ. If a greater value is necessary, a lower RDS,on MOSFET should be used instead. As an example, Figure 4 shows the typical characteristic of the DC-DC converter circuit with an FDB6030L high-side MOSFET (RDS = 20mΩ maximum at 25°C * 1.25 at 75°C = 25mΩ) and a 8.2KΩ RS. CPU Output Voltage vs. Output Current 3.5 3.0 where: Vin = Input Power Supply Vout = Output Voltage f = DC/DC converter switching frequency ESR = Equivalent series resistance of all output capacitors in parallel Vripple = Maximum peak to peak output ripple voltage budget. The first order equation for maximum allowed inductance is: Lmax = 2CO (Vin – Vout) Dm Vtb Ipp2 2.5 VOUT (V) 2.0 1.5 1.0 0.5 0 0 5 10 15 20 25 Figure 4. RC5061 Short Circuit Characteristic where: Co = The total output capacitance Ipp = Maximum to minimum load transient current Vtb = The output voltage tolerance budget allocated to load transient Dm = Maximum duty cycle for the DC/DC converter (usually 95%). The converter exhibits a normal load regulation characteristic until the voltage across the MOSFET exceeds the internal short circuit threshold of 50µA * 8.2KΩ = 410mV, which occurs at 410mV/25mΩ = 16.4A. (Note that this current limit level can be as high as 410mV/15mΩ = 27A, if the MOSFET has typical RDS,on rather than maximum, and is at 25°C). At this point, the internal comparator trips and signals the controller to discharge the softstart capacitor. This causes a drastic reduction in the output voltage as the load regulation collapses into the short circuit control mode. With a 40mΩ output short, 13 REV. 1.0.0 7/6/00 RC5061 PRODUCT SPECIFICATION the voltage is reduced to 16.4A * 40mΩ = 650mV. The output voltage does not return to its nominal value until the output current is reduced to a value within the safe operating ranges for the DC-DC converter. If any of the linear regulator outputs are loaded heavily enough that their output voltage drops below 80% of nominal for > 30µsec, all RC5061 outputs, including the switcher, are shut off and remain off until power is recycled. Schottky Diode Selection The application circuit of Figure 1 shows a Schottky diode, D1, which is used as a free-wheeling diode to assure that the body-diode in Q2 does not conduct when the upper MOSFET is turning off and the lower MOSFET is turning on. It is undesirable for this diode to conduct because its high forward voltage drop and long reverse recovery time degrades efficiency, and so the Schottky provides a shunt path for the current. Since this time duration is very short, the selection criterion for the diode is that the forward voltage of the Schottky at the output current should be less than the forward voltage of the MOSFET’s body diode. It is necessary to have some low ESR aluminum electrolytic capacitors at the input to the converter. These capacitors deliver current when the high side MOSFET switches on. Figure 5 shows 3 x 1000µF, but the exact number required will vary with the speed and type of the processor. For the top speed Katmai and Coppermine, the capacitors should be rated to take 9A and 6A of ripple current respectively. Capacitor ripple current rating is a function of temperature, and so the manufacturer should be contacted to find out the ripple current rating at the expected operational temperature. For details on the design of an input filter, refer to Applications Bulletin AB-15. 2.5µH 5V 0.1µF Vin 1000µF, 10V Electrolytic Figure 5. Input Filter Active Droop The RC5061 includes active droop; as the ouptut current increases, the output voltage drops. This is done in order to allow maximum headroom for transient response of the converter. The current is sensed by measuring the voltage across the high-side MOSFET during its on time. Note that this makes the droop dependent on the temperature of the MOSFET. However, when the formula given for selecting RS (current limit) is used, there is a maximum droop possible (-40mV), and when this value is reached, additional drop across the MOSFET will not cause any increase in droop—until current limit is reached. Additional droop can be added to the active droop using a discrete resistor (typically a PCB trace) outside the control loop, as shown in Figure 2. This is typically only required for the most demanding applications, such as for the next generation Intel processor (tolerance = +40/-70mV), as shown in Figure 2. Output Filter Capacitors The output bulk capacitors of a converter help determine its output ripple voltage and its transient response. It has already been seen in the section on selecting an inductor that the ESR helps set the minimum inductance, and the capacitance value helps set the maximum inductance. For most converters, however, the number of capacitors required is determined by the transient response and the output ripple voltage, and these are determined by the ESR and not the capacitance value. That is, in order to achieve the necessary ESR to meet the transient and ripple requirements, the capacitance value required is already very large. The most commonly used choice for output bulk capacitors is aluminum electrolytics, because of their low cost and low ESR. The only type of aluminum capacitor used should be those that have an ESR rated at 100kHz. Consult Application Bulletin AB-14 for detailed information on output capacitor selection. The output capacitance should also include a number of small value ceramic capacitors placed as close as possible to the processor; 0.1µF and 0.01µF are recommended values. Remote Sense The RC5061 offers remote sense of the output voltage to minimize the output capacitor requirements of the converter. It is highly recommended that the remote sense pin, Pin 16, be tied directly to the processor power pins, so that the effects of power plane impedance are eliminated. Further details on use of the remote sense feature of the RC5061 may be found in Applications Bulletin AB-24. Input Filter The DC-DC converter design may include an input inductor between the system +5V supply and the converter input as shown in Figure 5. This inductor serves to isolate the +5V supply from the noise in the switching portion of the DC-DC converter, and to limit the inrush current into the input capacitors during power up. A value of 2.5µH is recommended. 14 REV. 1.0.0 7/6/00 PRODUCT SPECIFICATION RC5061 Adjusting the Linear Regulators’ Output Voltages Any or all of the linear regulators’ outputs may be adjusted high to compensate for voltage drop along traces, as shown in Figure 6. • Each VCC and GND pin should have its own via to the appropriate plane. This helps provide isolation between pins. • Place the MOSFETs, inductor, and Schottky as close together as possible for the same reasons as in the first bullet above. Place the input bulk capacitors as close to the drains of the high side MOSFETs as possible. In addition, placement of a 0.1µF decoupling cap right on the drain of each high side MOSFET helps to suppress some of the high frequency switching noise on the input of the DC-DC converter. • Place the output bulk capacitors as close to the CPU as possible to optimize their ability to supply instantaneous current to the load in the event of a current transient. Additional space between the output capacitors and the CPU will allow the parasitic resistance of the board traces to degrade the DC-DC converter’s performance under severe load transient conditions, causing higher voltage deviation. For more detailed information regarding capacitor placement, refer to Application Bulletin AB-5. • A PC Board Layout Checklist is available from Fairchild Applications. Ask for Application Bulletin AB-11. VGATE VOUT R VFB 10KΩ Figure 6. Adjusting the Output Voltage of the Linear Regulator The resistor value should be chosen as R = 10KΩ* Vout Vnom –1 Additional Information For additional information contact Fairchild Semiconductor at http://www.fairchildsemi.com/cf/tsg.htm or contact an authorized representative in your area. For example, to get the VTT voltage to be 1.55V instead of 1.50V, use R = 10KΩ * [(1.55/1.50) – 1] = 333Ω. PCB Layout Guidelines • Placement of the MOSFETs relative to the RC5061 is critical. Place the MOSFETs such that the trace length of the HIDRV and LODRV pins of the RC5061 to the FET gates is minimized. A long lead length on these pins will cause high amounts of ringing due to the inductance of the trace and the gate capacitance of the FET. This noise radiates throughout the board, and, because it is switching at such a high voltage and frequency, it is very difficult to suppress. • In general, all of the noisy switching lines should be kept away from the quiet analog section of the RC5061. That is, traces that connect to pins 1, 2, 19, and 20 (HIDRV, SW, LODRV and VCCP) should be kept far away from the traces that connect to pins 3, 16 and 17. • Place the 0.1µF decoupling capacitors as close to the RC5061 pins as possible. Extra lead length on these reduces their ability to suppress noise. REV. 1.0.0 7/6/00 15 RC5061 PRODUCT SPECIFICATION Appendix Worst-Case Formulae for the Calculation of Cout, R7, and Cin (Circuit of Figure 1 only) The following formulae design the RC5061 for worst-case operation, including initial tolerance and temperature dependence of all of the IC parameters (initial setpoint, reference tolerance and tempco, active droop tolerance, current sensor gain), the initial tolerance and temperature dependence of the MOSFET, and the ESR of the capacitors. The following information must be provided: VT+, the value of the positive transient voltage limit; |VT-|, the absolute value of the negative transient voltage limit; IO, the maximum output current; Vnom, the nominal output voltage; Vin, the input voltage (typically 5V); ESR, the ESR of the ouput caps, per cap (44mΩ for the Sanyo parts shown in this datsheet); RD, the on-resistance of the MOSFET (10mΩ for the FDB7030); The value of R7 must be ≤ 8.3KΩ. If a greater value is calculated, RD must be reduced. Number of capacitors needed fo Cout = the greater of: ESR * IO VT- X= or ESR * IO VT+ –0.004 * Vnom + 14400 * IO * RD 18 * R5 * 1.1 Y= Example: Suppose that the transient limits are ±134mV, current I is 14.2A, and the nominal voltage is 2.000V, using MOSFET current sensing and the usual caps. We have VT+ = |VT-| = 0.134, IO = 14.2, Vnom = 2.000, and ∆RD = 0.67. We calculate: 2 2.000 14.2 * 5 Cin = 2 – 2.000 5 = 3.47 ⇒ 4 caps R5 = 14.2 * 0.010 * (1 + 0.67) * 1.0 50 * 10-6 0.044 * 14.2 = 5.2KΩ ∆RD, the tolerance of the current sensor (usually about 67% for MOSFET sensing, including temperature). Irms, the rms current rating of the input caps (2A for the sanyo parts shown in this datasheet.) 2 IO * Cin = Irms IO* RD * (1 + ∆RD) * 1.10 50 * 10 -6 X= = 4.66 0.134 0.044 * 14.2 Y= 0.134 – 0.004 * 2.000 + 14400 * 14.2 * 0.020 18 * 10400 * 1.1 = 4.28 Vnom Vin – Vnom Vin R7 = Since X > Y, we choose X, and round up to find we need 5 capacitors for COUT. 16 REV. 1.0.0 7/6/00 PRODUCT SPECIFICATION RC5061 Mechanical Dimension 20-Lead SOIC Symbol A A1 B C D E e H h L N α ccc Inches Min. Max. Millimeters Min. Max. Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5 2 2 5. "C" dimension does not include solder finish thickness. 6. Symbol "N" is the maximum number of terminals. .093 .104 .004 .012 .013 .020 .009 .013 .496 .512 .291 .299 .050 BSC .394 .010 .016 20 0° — 8° .004 .419 .029 .050 2.35 2.65 0.10 0.30 0.33 0.51 0.23 0.32 12.60 13.00 7.40 7.60 1.27 BSC 10.00 0.25 0.40 20 0° — 8° 0.10 10.65 0.75 1.27 3 6 20 11 E H 1 10 D A e B A1 SEATING PLANE –C– LEAD COPLANARITY ccc C α h x 45° C L REV. 1.0.0 7/6/00 17 RC5061 PRODUCT SPECIFICATION Ordering Information Product Number RC5061M Package 20 pin SOIC DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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