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RFP8P06E

RFP8P06E

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    RFP8P06E - 8A, 60V, 0.300 Ohm, P-Channel Power MOSFETs - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
RFP8P06E 数据手册
RFD8P06E, RFD8P06ESM, RFP8P06E D ata Sheet January 2002 8A, 60V, 0.300 Ohm, P-Channel Power MOSFETs These are P-Channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers and emitter switches for bipolar transistors. These transistors can be operated directly from integrated circuits. The RFD8P06E, RFD8P06ESM and RFP8P06E incorporate ESD protection and are designed to withstand 2kV (Human Body Model) of ESD. Formerly developmental type TA49044. Features • 8A, 60V • rDS(ON) = 0.300Ω • Temperature Compensating PSPICE® Model • 2kV ESD Protected • Peak Current vs Pulse Width Curve • UIS Rating Curve • 175oC Operating Temperature • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol D Ordering Information PART NUMBER RFP8P06E RFD8P06ESM RFD8P06E PACKAGE TO-220AB TO-252AA TO-251AA BRAND RFP8P06E D8P06E D8P06E S G NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in tape and reel, i.e. RFD8P06ESM9A. Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) JEDEC TO-251AA SOURCE DRAIN GATE DRAIN (FLANGE) JEDEC TO-252AA DRAIN (FLANGE) GATE SOURCE ©2002 Fairchild Semiconductor Corporation RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B RFD8P06E, RFD8P06ESM, RFP8P06E Absolute Maximum Ratings TC = 25oC RFD8P06E, RFD8P06ESM, RFP8P06E -60 -60 ±20 8 Refer to Peak Current Curve Refer to UIS Curve 48 0.32 2 -55 to 175 300 260 UNITS V V V A A W W/oC kV oC oC oC Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20KΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Single Pulse Avalanche Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrostatic Discharge Rating MIL-STD-883, Category B(2) . . . . . . . . . . . . . . . . . . . .ESD Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS IGSS rDS(ON) tON td(ON) tr td(OFF) tf tOFF Qg(TOT) Qg(-10) Qg(TH) CISS COSS CRSS RθJC RθJA Figure 12 TO-220 TO-251, TO-252 VGS = 0 to -20V VGS = 0 to -10V VGS = 0 to -2V VDD = -48V, ID = 8A, RL = 6Ω Ig(REF) = -1.45mA TEST CONDITIONS ID = 250µA, VGS = 0V VGS = VDS, ID = 250µA VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, TC = 150oC VGS = ±20V ID = 8A, VGS = -10V VDD = -30V, ID ≈ 8A, RL = 3.75Ω, VGS = -10V, RG = 2.5Ω (Figure 13) MIN -60 -2.0 TYP 15 30 40 25 30 15 1.15 600 160 35 MAX -4.0 -1.0 -25 ±10 0.300 70 100 36 18 1.5 3.125 62 100 UNITS V V µA µA µA Ω ns ns ns ns ns ns nC nC nC pF pF pF oC/W oC/W oC/W Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On Resistance (Note 3) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Gate Charge at 5V Threshold Gate Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient VDS = -25V, VGS = 0V, f = 1MHz Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage Diode Reverse Recovery Time NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). SYMBOL VSD trr TEST CONDITIONS ISD = -8A ISD = -8A, dISD/dt = -100A/µs MIN TYP MAX -1.5 125 UNITS V ns ©2002 Fairchild Semiconductor Corporation RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B RFD8P06E, RFD8P06ESM, RFP8P06E Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) 150 175 ID , DRAIN CURRENT (A) Unless Otherwise Specified -10 -8 -6 -4 -2 0 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 THERMAL IMPEDANCE 0.5 ZθJC , NORMALIZED 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 10-5 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC 10-3 10-2 10-1 t 1, RECTANGULAR PULSE DURATION (s) 100 101 PDM 10-4 FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE -100 TC = 25oC, TJ = MAX RATED -102 ID , DRAIN CURRENT (A) 100µs -10 1ms 10ms -1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 100ms DC IDM , PEAK CURRENT (A) FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS: VGS = -20V  175 – T C I = I 25  --------------------- 150   VGS = -10V -10 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10-5 10-4 10-3 10-2 10-1 t, PULSE WIDTH (s) TC = 25oC -0.1 -1 -10 VDS , DRAIN TO SOURCE VOLTAGE (V) -100 -5 10-6 100 101 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY ©2002 Fairchild Semiconductor Corporation RFD8P06E, RFD8P06ESM, RFP8P06E Rev.B RFD8P06E, RFD8P06ESM, RFP8P06E Typical Performance Curves -30 IAS , AVALANCHE CURRENT (A) STARTING TJ = 25oC ID , DRAIN CURRENT (A) -15 VGS = -20V -10 Unless Otherwise Specified (Continued) -20 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC VGS = -10V VGS = -8V -10 VGS = -7V STARTING TJ = 150oC VGS = -6V -5 VGS = -4.5V 0 VGS = -5V If R = 0 tAV = (L) (IAS) / (1.3RATED BVDSS - VDD) -1 0.01 If R ≠ 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] 0.1 1 10 tAV , TIME IN AVALANCHE (ms) 0 -1.5 -3.0 -4.5 -6.0 -7.5 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING FIGURE 7. SATURATION CHARACTERISTICS IDs(ON) , DRAIN TO SOURCE CURRENT (A) -20 VDD = -15V PULSE DURATION = 250µs DUTY CYCLE = 0.5% MAX -15 -55oC NORMALIZED DRAIN TO SOURCE ON RESISTANCE 2.5 2.0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = -10V, ID = 8A 25oC 1.5 -10 175oC -5 1.0 0.5 0 0 -2 -4 -6 -8 -10 VGS, GATE TO SOURCE VOLTAGE (V) 0 -80 -40 0 40 80 120 160 200 TJ , JUNCTION TEMPERATURE (oC) FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 2.0 VGS = VDS, ID = 250µA NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 2.0 ID = 250µA NORMALIZED GATE THRESHOLD VOLTAGE 1.5 1.5 1.0 1.0 0.5 0.5 0 -80 -40 0 40 80 120 160 200 0 -80 -40 0 40 80 120 160 200 TJ , JUNCTION TEMPERATURE (oC) TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs TEMPERATURE FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs TEMPERATURE ©2002 Fairchild Semiconductor Corporation RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B RFD8P06E, RFD8P06ESM, RFP8P06E Typical Performance Curves 1000 VGS = 0V, f = 1MHz Unless Otherwise Specified (Continued) -60 VDS , DRAIN TO SOURCE VOLTAGE (V) -10.0 VDD = BVDSS -45 RL = 1.2Ω IG(REF) = 1.45mA 0.75 BVDSS 0.50 BVDSS -15 0.25 BVDSS VGS = -10V 0 0.0 20 IG(REF) IG(ACT) t, TIME (µs) 80 IG(REF) IG(ACT) 0.75 BVDSS 0.50 BVDSS 0.25 BVDSS -2.5 VDD = BVDSS -7.5 VGS , GATE TO SOURCE VOLTAGE (V) 800 C, CAPACITANCE (pF) CISS 600 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGS -30 -5.0 400 COSS 200 CRSS 0 0 -5 -10 -15 -20 -25 VDS , DRAIN TO SOURCE VOLTAGE (V) NOTE: FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0 VDD + 0V tP -VGS DUT VDD IAS tP BVDSS VDS IAS 0.01Ω FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr tOFF td(OFF) tf 10% 10% RL VDS VGS + 0 VDS 0 90% 90% 0V RGS -VGS DUT 10% 50% VGS PULSE WIDTH 90% 50% FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS ©2002 Fairchild Semiconductor Corporation RFD8P06E, RFD8P06ESM, RFP8P06E Rev.B RFD8P06E, RFD8P06ESM, RFP8P06E Test Circuits and Waveforms (Continued) VDS RL 0 VGS = -2V -VGS Qg(TH) VDS VGS = -10V Qg(-10) VGS VDD + VDD Qg(TOT) 0 Ig(REF) VGS = -20V DUT Ig(REF) FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS ©2002 Fairchild Semiconductor Corporation RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B RFD8P06E, RFD8P06ESM, RFP8P06E PSPICE Electrical Model .SUBCKT RFP8P06E 2 1 3 CA 12 8 7.24e-10 CB 15 14 8.04e-10 CIN 6 8 6.00e-10 DBODY 5 7 DBDMOD DBREAK 7 11 DBKMOD DESD1 91 9 DESD1MOD DESD2 91 7 DESD2MOD DPLCAP 10 6 DPLCAPMOD EBREAK 5 11 17 18 -79.2 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 6 8 1 EVTO 20 6 8 18 1 IT 8 17 1 LDRAIN 2 5 1e-10 LGATE 1 9 2.92e-9 LSOURCE 3 7 2.92e-9 MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 95.2e-3 RGATE 9 20 3.95 RIN 6 8 1e9 RSCL1 5 51 RSCLMOD 1e6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 143.6e-3 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 -0.804 ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/22,9))} .MODEL DBDMOD D (IS=4.15e-15 RS=5.54e-2 TRS1=-1.32e-3 TRS2=-2.48e-6 CJO=6.06e-10 TT=7.50e-8) .MODEL DBKMOD D (RS=4.66e-1 TRS1=1.58e-3 TRS2=-7.49e-6) .MODEL DESD1MOD D (BV=20.2 TBV1=-1.25e-3 TBV2=5.79e-7 RS=36 NBV=50 IBV=7e-6) .MODEL DESD2MOD D (BV=25.4 TBV1=-8.3e-4 TBV2=8.9e-7 NBV=50 IBV=7e-6) .MODEL DPLCAPMOD D (CJO=2.49e-10 IS=1e-30 N=10) .MODEL MOSMOD PMOS (VTO=-3.824 KP=5.163 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=9.48e-4 TC2=-1.42e-7) .MODEL RDSMOD RES (TC1=5.40e-3 TC2=1.25e-5) .MODEL RSCLMOD RES (TC1=1.75e-3 TC2=3.90e-6) .MODEL RVTOMOD RES (TC1=-3.55e-3 TC2=-3.43e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.10 VOFF=3.10) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=3.10 VOFF=5.10) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.1 VOFF=-2.9) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.9 VOFF=2.1) .ENDS NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. REV 6/23/94 LDRAIN 10 DPLCAP RSCL2 5 51 RSCL1 5 2 DRAIN ESCL 17 18 + ESG + GATE 9 1 LGATE RGATE EVTO EBREAK 6 8 VTO RDRAIN 16 DBODY 6 RIN + MOS2 21 MOS1 11 DBREAK 8 RSOURCE 7 LSOURCE 3 18 20 8 DESD1 - + CIN 91 DESD2 SOURCE S1A 12 13 8 S1B CA + 6 EGS -8 13 S2A 14 13 S2B CB 14 + 5 EDS 8 15 17 RBREAK 18 RVTO IT 19 VBAT + - - ©2002 Fairchild Semiconductor Corporation RFD8P06E, RFD8P06ESM, RFP8P06E Rev.B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT ™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ DISCLAIMER FAST ® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench ® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER ® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET ® VCX™ STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4 This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.
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