RMPA0966

PRELIMINARY RMPA0966 i-Lo™ WCDMA Band V Power Amplifier Module April 2007 RMPA0966 i-Lo™ WCDMA Band V Power Amplifier Module Features ■ 42% CDMA/WCDMA efficiency at +28dBm Pout ■ 21% CDMA/WCDMA efficiency (56mA total current) at ■ ■ ■ ■ tm General Description The RMPA0966 Power Amplifier Module (PAM) is Fairchild’s latest innovation in 50Ω matched, surface mount modules targeting Cellular CDMA/WCDMA/HSDPA, AMPS and Wireless Local Loop (WLL) applications. Answering the call for ultra-low DC power consumption and extended battery life in portable electronics, the RMPA0966 uses novel proprietary circuitry to dramatically reduce amplifier current at low to medium RF output power levels ( 16 dBm) Low-Power: Vmode = 2V (Pout < 16 dBm) ©2007 Fairchild Semiconductor Corporation RMPA0966 i-Lo™ Rev. B www.fairchildsemi.com 3 PRELIMINARY RMPA0966 i-Lo™ WCDMA Band V Power Amplifier Module Evaluation Board Layout 1 4 5 3 7 2 0966 XYTT Z 5 6 8 6 Materials List Qty 1 2 8 Ref 2 2 2 1 1 1 A/R A/R Item No. 1 2 3 4 5 5 (Alt) 6 7 7 (Alt) 8 9 10 Part Number G657549-1 V2 #142-0701-841 #2340-5211TN GRM39X7R102K50V ECJ-1VB1H102K C3216X5R1A335M GRM39Y5V104Z16V ECJ-1VB1C104K GRM39X7R331K50V SN63 SN96 PC Board Description SMA Connector Terminals Assembly, RMPA0966 1000pF Capacitor (0603) 1000pF Capacitor (0603) 3.3µF Capacitor (1206) 0.1µF Capacitor (0603) 0.1µF Capacitor (0603) 330pF Capacitor (0603) Solder Paste Solder Paste Vendor Fairchild Johnson 3M Fairchild Murata Panasonic TDK Murata Panasonic Murata Indium Corp. Indium Corp. Evaluation Board Schematic 0.1 µF 1000 pF Vmode 50 Ohm TRL Vcc1 3.3 µF Vref 1 2 4 5 11 3,7,9,10 0966 XYTT 8 50 Ohm TRL SMA1 RF IN SMA2 RF OUT Vcc2 1000 pF 330 pF (package base) Z 6 3.3 µF ©2007 Fairchild Semiconductor Corporation RMPA0966 i-Lo™ Rev. B www.fairchildsemi.com 4 PRELIMINARY RMPA0966 i-Lo™ WCDMA Band V Power Amplifier Module Package Outline I/O 1 INDICATOR TOP VIEW 1 2 10 9 8 0966 XYTT (4.00mm +.100 ) SQUARE –.050 3 4 5 6 1.1mm MAX. FRONT VIEW .25mm TYP. 3.50mm TYP. See Detail A .40mm .30mm TYP. .85mm TYP. 11 2 1 1.08mm 1.84mm BOTTOM VIEW .18mm DETAIL A. TYP. 3.65mm .10mm .10mm .40mm .45mm Signal Descriptions Pin # 1 2 3 4 5 6 7 8 9 10 11 Signal Name Vref Vmode GND RF In Vcc1 Vcc2 GND RF Out GND GND GND Description Reference Voltage High Power/Low Power Mode Control Ground RF Input Signal Supply Voltage to Input Stage Supply Voltage to Output Stage Ground RF Output Signal Ground Ground Paddle Ground ©2007 Fairchild Semiconductor Corporation RMPA0966 i-Lo™ Rev. B 5 ZT T XY 9 6 6 www.fairchildsemi.com 0 Z 7 PRELIMINARY RMPA0966 i-Lo™ WCDMA Band V Power Amplifier Module Applications Information CAUTION: THIS IS AN ESD SENSITIVE DEVICE. Precautions to Avoid Permanent Device Damage: • Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC and ground contact areas. • Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. • Static Sensitivity: Follow ESD precautions to protect against ESD damage: – A properly grounded static-dissipative surface on which to place devices. – Static-dissipative floor or mat. – A properly grounded conductive wrist strap for each person to wear while handling devices. • General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, and ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid. • Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. Device Usage: Fairchild recommends the following procedures prior to assembly. • Assemble the devices within 7 days of removal from the dry pack. • During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30°C • If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure per JEDEC J-STD-020 must be performed. Solder Materials & Temperature Profile: Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended. Reflow Profile • Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A maximum heating rate is 3°C/sec. • Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 60-180 seconds at 150-200°C. • Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 20 seconds. Soldering temperatures should be in the range 255–260°C, with a maximum limit of 260°C. • Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crack-resistant solder joint. The illustration below indicates the recommended soldering profile. Solder Joint Characteristics: Proper operation of this device depends on a reliable void-free attachment of the heat sink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should be subjected to no more than 15°C above the solder melting temperature for no more than 5 seconds. No more than 2 rework operations should be performed. Recommended Solder Reflow Profile 260 Ramp-Up Rate 3 °C/sec max Peak temp 260 +0/-5 °C 10 - 20 sec Temperature (°C) 217 200 Time above liquidus temp 60 - 150 sec 150 Preheat, 150 to 200 °C 60 - 180 sec 100 Ramp-Up Rate 3 °C/sec max 50 25 Time 25 °C/sec to peak temp 6 minutes max Ramp-Down Rate 6 °C/sec max Time (Sec) ©2007 Fairchild Semiconductor Corporation RMPA0966 i-Lo™ Rev. B www.fairchildsemi.com 6 PRELIMINARY RMPA0966 i-Lo™ WCDMA Band V Power Amplifier Module TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ DOME 2 E CMOS ® EcoSPARK EnSigna FACT Quiet Series™ ® FACT ® FAST FASTr FPS ® FRFET GlobalOptoisolator GTO ® HiSeC i-Lo ImpliedDisconnect IntelliMAX ISOPLANAR MICROCOUPLER MicroPak MICROWIRE MSX MSXPro OCX OCXPro ® OPTOLOGIC ® OPTOPLANAR PACMAN POP ® Power220 ® Power247 PowerEdge PowerSaver ® PowerTrench Programmable Active Droop ® QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect ScalarPump SMART START ® SPM STEALTH™ SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET™ TCM ® The Power Franchise ™ TinyLogic TINYOPTO TinyPower TinyWire TruTranslation SerDes ® UHC UniFET VCX Wire ® TinyBoost TinyBuck DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I24 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. No Identification Needed Full Production Obsolete Not In Production ©2007 Fairchild Semiconductor Corporation RMPA0966 i-Lo™ Rev. B www.fairchildsemi.com 7