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RMPA1850

RMPA1850

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    RMPA1850 - Quad Band GSM/GPRS Power Amplifier Module - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
RMPA1850 数据手册
RMPA1850 Quad Band GSM/GPRS Power Amplifier Module December 2004 RMPA1850 Quad Band GSM/GPRS Power Amplifier Module Features I Quad band, matched module I High efficiency- 55% GSM850/900, 50% DCS/PCS I Integrated power control function I I I I I Compact 7*10*1.6mm module InGaP HBT technology GPRS class 12 capable Ruggedness 10:1 50 dB power control range General Description The RMPA1850 power amplifier module (PAM) is designed for GSM/GPRS cellular handset applications. The PAM a fully input and output 50Ω matched. It also includes integrated power control and band select. Functional Block Diagram VCC2 12 DCS/PCS IN BAND SELECT TX EN VBAT VREG VRAMP GSM IN 1 2 3 4 5 6 7 Match Match Power Sensing 11 DCS/PCS OUT CMOS Power Controller 10 VOUT Match Match Power Sensing 9 GSM OUT 8 VCC2 ©2004 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com RMPA1850 Rev. A1 RMPA1850 Quad Band GSM/GPRS Power Amplifier Module GSM850/GSM900 BAND Specification Parameter Frequency Min. 824 880 Typ. Max. 849 915 Unit MHz MHz dBm dBm % dBm Condition GSM850 band GSM900 band GSM850 band GSM900 band @ Pout max Output Power 34 34.5 34.5 35 55 3 -10 -15 -30 -30 2.5:1 1.4 1.8 Power Added Efficiency Input Power Range 2nd Harmonics 3rd Harmonics Forward isolation Cross Isolation Input VSWR Vramp for Max. Pout Vramp for Min. Pout Power control range Ruggedness Stability Output Noise Power, 20 MHz offset 50 0 dBm dBm dBm dBm Vramp, TX_EN = 0.2V, Pin = 5 dBm, @2fo V V 0.3 50 no permanent damage -36 -82 dB Vramp = 0.1 to 1.8V Output VSWR = 10:1, Pout ≤ 34.5 dBm dBm dBm Load 8:1 RBW = 100 KHz DCS/PCS BAND Specification Parameter Frequency Min. 1710 1850 Typ. Max. 1785 1910 Unit MHz MHz dBm dBm % dBm Condition DCS band PCS band DCS band PCS band @ Pout max Output Power 32.5 32 33 32.5 50 3 -15 -10 -30 -20 2.5:1 1.4 1.8 Power Added Efficiency Input Power Range 2nd Harmonics 3rd Harmonics Forward isolation Cross Isolation Input VSWR Vramp for Max. Pout Vramp for Min. Pout Power control range Ruggedness Stability Noise Power, 20 MHz offset 45 0 dBm dBm dBm dBm Vramp, TX_EN = 0.2V, Pin = 5 dBm, @2fo V V 0.3 50 no permanent damage -36 -82 dB Vramp = 0.1 to 1.8V Output VSWR = 10:1,Pout ≤ 32.5dBm dBm dBm Load 8:1 RBW = 100 KHz, 20 MHz offset 1. VBATT = 3.5V, VREG = 2.8V, PIN = 3 dBm, TX-EN = high, T = 25°C, 12.5% duty cycle 2 RMPA1850 Rev. A1 www.fairchildsemi.com RMPA1850 Quad Band GSM/GPRS Power Amplifier Module Absolute Ratings Parameter Supply Voltage, VBATT Power Control Voltage Input RF Power Duty Cycle at Max. Power Storage Temperature Operating Temperature -40 -30 Minimum Maximum +6 +2.5 +12 50 +150 +85 Units V V dBm % °C °C Recommended Operating Conditions Specification Parameter VBAT Supply Voltage VBAT Supply Leakage Current VREG Voltage VREG Current 2.7V Min. 3.0V Max. 3.5V 12µA 2.8V 10mA 1µA Unit 4.8V Condition (Temp = +25°C, Vcc = 3.5V) TX_EN = Low 2.9V TX_EN = High TX_EN = Low TX_EN Logic Level to Enable TX_EN Logic Level to Disable Current into TX_EN Pin Current into Band Select Pin Band Select Logic Level to enable DCS Band Band Select Logic Level to enable GSM Band Vramp Pin Transconductance 1.9V 0.6V 0.1µA 0.1µA 1.9V 0.6V 83µA/V 5µA 5µA 3 RMPA1850 Rev. A1 www.fairchildsemi.com RMPA1850 Quad Band GSM/GPRS Power Amplifier Module Pout and PAE% vs. Frequency VBATT = 3.5V, VREG = 2.8V, PIN = 3 dBm, VRAMP = 1.6V, T = 25°C, 25% duty cycle 36 35 Pout/dBm 34 33 32 31 30 824 848 freq/ MHz 880 914 PAE% 60% 55% 50% 45% 40% 35% 30% 25% 20% 15% 10% 5% 0% 36 35 Pout/dBm 34 33 32 31 30 1710 1785 1850 Freq/MHz 1910 60% 55% 50% 45% 40% 35% 30% 25% 20% 15% 10% 5% 0% PAE% PAE% Pout/dBm Power Control: Pout vs. VRAMP VBATT = 3.5V, VREG = 2.8V, PIN = 3 dBm, T = 25°C, 25% duty cycle 40 35 30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Vramp / V 40 35 30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Pout / dBm 824MHz 848MHz 880MHz 915MHz Pout / dBm 1710MHz 1785MHz 1850MHz 1910MHz 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 Vramp / V 4 RMPA1850 Rev. A1 www.fairchildsemi.com PAE% Pout/dBm RMPA1850 Quad Band GSM/GPRS Power Amplifier Module Signal Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 Function DCS/PCS IN Band Select TX_EN VBAT VREG VRAMP GSM IN VCC2 GSM OUT VOUT DCS/PCS OUT VCC2 50Ω RF input of DCS/PCS band. Description Logic high for DCS/PCS and logic low for GSM850/EGSM900 band. Logic high to enable the PA module function. Power supply to the PA module. This should be connected to battery. The decoupling capacitor is required to filter the interference. Normally, 2.8 volts are required at this node for the operation of control circuits. Ramping signal from DAC to control the power level. 50Ω RF input of GSM850/EGSM900 band. Power supply for the driver stage of the GSM850/EGSM900 band. This is internally connected to VBAT node within the module. 50Ω RF output of GSM850/EGSM900 band. Power supply for the power stages of GSM850/EGSM900 and DCS/PCS band. This is internally connected to VBAT node within the module. 50Ω RF output of DCS/PCS band. Power supply for the driver stage of the GSM850/EGSM900 and DCS/PCS band. This is internally connected to VBAT node within the module. VCC2 DCS/PCS IN 1 12 11 DCS/PCS OUT BAND SELECT 2 3 TX EN VBAT 4 10 VOUT VREG 5 VRAMP 6 GSM IN 7 8 VCC2 9 GSM OUT 5 RMPA1850 Rev. A1 www.fairchildsemi.com RMPA1850 Quad Band GSM/GPRS Power Amplifier Module Evaluation Board Schematic VCC2 12 DCS/PCS IN BAND SELE CT TX EN VBAT 1µF 1µF 50 Ohm Microstrip 1 2 3 4 5 6 7 Match Match Power Sensing DCS/PCS OUT 11 50 Ohm Microstrip CMOS Power Controller 10 VOUT VREG VRAMP 10µF 1µF 0 Ohm 2K Ohm 330pF 1nF Match Match Power Sensing 9 GSM OUT 50 Ohm Microstrip GSM IN 50 Ohm Microstrip 150 Ohm 8 VCC2 Evaluation Board VBAT 47µF 1µF GND DCS/PCS IN 1µF 10µF DCS/PCS OUT 1µF 330pF 1nF 1µF 2KOhm 1µF 150Ohm GSM IN GSM OUT 0 Ohm 1µF 1µF BS TX EN VREG VRAMP 6 RMPA1850 Rev. A1 www.fairchildsemi.com RMPA1850 Quad Band GSM/GPRS Power Amplifier Module Package Outline (All dimensions in mm) RMPA1850 7 mm 10 mm PIN 1 0.1 0.6 TOP VIEW 0.5 0.8 0.7 0.1 0.1 0.8 0.8 2.4 0.8 1.6 PIN 1 0.7 0.8 0.7 0.7 0.7 3.0 10 0.7 0.7 0.7 1.5 0.1 BOTTOM VIEW 0.44 SIDE VIEW 7 RMPA1850 Rev. A1 www.fairchildsemi.com RMPA1850 Quad Band GSM/GPRS Power Amplifier Module Application Information CAUTION: THIS IS AN ESD SENSITIVE DEVICE Precautions to Avoid Permanent Device Damage: • Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC & ground contact areas. • Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. • Static Sensitivity: Follow ESD precautions to protect against ESD damage: • A properly grounded static-dissipative surface on which to place devices. • Static-dissipative floor or mat. • A properly grounded conductive wrist strap for each person to wear while handling devices. • General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, & ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid. • Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. Device Usage: Fairchild RF recommends the following procedures prior to assembly. • Dry-bake devices at 125°C for 24 hours minimum. Note: The shipping trays cannot withstand 125°C baking temperature • Assemble the dry-baked devices within 7 days of removal from the oven. • During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30°C • If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure must be repeated. Solder Materials & Temperature Profile: • Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended. – Reflow Profile • Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A typical heating rate is 1- 2°C/sec. • Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 120-150 seconds at 150°C. • Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 10 seconds. Maximum soldering temperatures should be in the range 215-220°C, with a maximum limit of 225°C. • Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crack-resistant solder joint. The illustration below indicates the recommended soldering profile. • Solder Joint Characteristics: Proper operation of this device depends on a reliable void-free attachment of the heatsink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. • Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should not be subjected to more than 225°C and reflow solder in the molten state for more than 5 seconds. No more than 2 rework operations should be performed. Recommended Solder Reflow Profile 240 220 200 183°C 180 160 140 DEG (°C) 120 100 80 60 40 20 0 0 60 120 TIME (SEC) 180 240 300 1°C/SEC SOAK AT 150°C FOR 60 SEC 45 SEC (MAX) ABOVE 183°C 1°C/SEC 10 SEC 8 RMPA1850 Rev. A1 www.fairchildsemi.com RMPA1850 Quad Band GSM/GPRS Power Amplifier Module TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC Across the board. Around the world.™ OPTOPLANAR™ PACMAN™ The Power Franchise POP™ Programmable Active Droop™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET UniFET™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I14 9 RMPA1850 Rev. A1 www.fairchildsemi.com
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