RMPA39100

RMPA39100 June 2004 RMPA39100 37–40 GHz 1 Watt Power Amplifier MMIC General Description The Fairchild Semiconductor’s RMPA39100 is a high efficiency power amplifier designed for use in point to point and point to multi-point radios, and various communications applications. The RMPA39100 is a 3-stage GaAs MMIC amplifier utilizing our advanced 0.15µm gate length Power PHEMT process and can be used in conjunction with other driver or power amplifiers to achieve the required total power output. Features • 18dB small signal gain (typ.) • 30dBm saturated power out (typ.) • Circuit contains individual source vias • Chip size 4.28mm x 3.19mm x 50µm Device Absolute Ratings Symbol Vd Vg Vdg ID PIN TC TSTG RJC Parameter Positive DC Voltage (+5V Typical) Negative DC Voltage Simultaneous (Vd–Vg) Positive DC Current RF Input Power (from 50Ω source) Operating Baseplate Temperature Storage Temperature Range Thermal Resistance (Channel to Backside) Ratings +6 -2 +8 1392 18 -30 to +85 -55 to +125 9 Units V V V mA dBm °C °C °C/W ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 Electrical Characteristics (At 25°C), 50Ω system, Vd = +5V, Quiescent current (Idq) = 1000mA Parameter Frequency Range Gate Supply Voltage (Vg)1 Gain Small Signal (Pin = 0dBm) Gain Variation vs. Frequency Power Output at P1dB Compression Power Output Saturated (Pin = +14.5dBm) Drain Current at Pin = 0dBm Drain Current at P1dB Compression Drain Current at Psat Power Added Efficiency (PAE) at P1dB OIP3 (17dbm/Tone) (10MHz Tone Sep.) Input Return Loss (Pin = 0dBm) Output Return Loss (Pin = 0dBm) Note: 1. Typical range of negative gate voltages is -0.5 to 0.0V to set typical Idq of 1000 mA. Min 37 16 Typ -0.2 18 ±1.5 29 30 1000 1160 1200 17 35 10 7 Max 40 28 Units GHz V dB dB dBm dBm mA mA mA % dBm dB dB ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 Application Information CAUTION: THIS IS AN ESD SENSITIVE DEVICE. Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with gold over nickel and should be capable of withstanding 325°C for 15 minutes. Die attachment for power devices should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC ground. These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges through the device. Recommended wire bonding uses 3mils wide and 0.5mil thick gold ribbon with lengths as short as practical allowing for appropriate stress relief. The RF input and output bonds should be typically 12 mils long corresponding to a typical 2 mil gap between the chip and the substrate material. DRAIN SUPPLY (VDA & VDB) MMIC CHIP RF IN RF OUT GROUND (Back of the Chip) GATE SUPPLY (VGA & VGB) Figure 1. Functional Block Diagram 0.1256" (3.190mm) 0.1178" (2.994mm) 0.0699" (1.777mm) 0.0628" (1.597mm) 0.0558" (1.417mm) 0.0078" (.2mm) 0.0 0.0 0.0078" (.2mm) 0.0356" (.9mm) 0.0745" (1.893mm) 0.1159" (2.944mm) 0.168" (4.279mm) 0.1595" (4.052mm) Figure 2. Chip Layout and Bond Pad Locations (Chip Size is 4.28mm x 3.19mm x 50µm. Back of chip is RF and DC Ground) ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 DRAIN SUPPLY (Vd = +5V) (Connect to both VDA & VDB) 10000pF L 100pF BOND WIRE Ls L MMIC CHIP RF IN RF OUT L GROUND (Back of Chip) 100pF BOND WIRE Ls L 10000pF GATE SUPPLY (Vg) (VGA and/or VGB) Figure 3. Recommended Application Schematic Circuit Diagram ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 Vg (NEGATIVE) 10000pF Vd (POSITIVE) 10000pF DIE-ATTACH 80Au/20Sn 2 MIL GAP 100pF 100pF 5 MIL THICK ALUMINA 50Ω 5 MIL THICK ALUMINA 50Ω RF INPUT RF OUTPUT L < 0.015" (4 Places) 100pF 100pF 10000pF 10000pF Vg (NEGATIVE) Vd (POSITIVE) Note: Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief. Vd should be biased from 1 supply on both sides as shown. Vg can be biased from either or both sides from 1 supply. Figure 4. Recommended Assembly and Bonding Diagram ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 Recommended Procedure for Biasing and Operation CAUTION: LOSS OF GATE VOLTAGE (Vg) WHILE DRAIN VOLTAGE (Vd) IS PRESENT MAY DAMAGE THE AMPLIFIER CHIP. The following sequence of steps must be followed to properly test the amplifier. Step 1: Turn off RF input power. Step 2: Connect the DC supply grounds to the ground of the chip carrier. Slowly apply negative gate bias supply voltage of -1.5V to Vg. Step 3: Slowly apply positive drain bias supply voltage of +5V to Vd. Step 4: Adjust gate bias voltage to set the quiescent current of Idq = 1000mA. Step 5: After the bias condition is established, the RF input signal may now be applied at the appropriate frequency band. Step 6: Follow turn-off sequence of: (i) Turn off RF input power, (ii) Turn down and off drain voltage (Vd), (iii) Turn down and off gate bias voltage (Vg). Note: An example auto bias sequencing circuit to apply negative gate voltage and positive drain voltage for the above procedure is shown below. D3 D1N6098 +6V D2 D1N6098 R1 3.0k + V+ 0 1 2 C1 0.1µF R3 1.0k * U2 AD820/AD V- LM2941T U1A 7400 3 2 CNT 5 4 IN OUT 3 GND +2.62V R4 1.2k – MMIC_+VDD C3 22µF R2 6.8k 0 0 C2 0.47µF R6 0 1k ADJ 1 R5 3k 0 0 *Adj. For –Vg MMIC_–VG C4 0.1µF R7 8.2k R8 1.0k 0 0 –5V *–5V Off: +3.33V –5V Off: +1.80V 0 C5 0.1µF Figure 5. Application Information Auto-Bias Circuit ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 Typical Characteristics RMPA39100 S-Parameters vs. Frequency vs. Temperature Bias Vd = 5V, Id = 1000mA Base Plate Temp 10, 25, 50, 75, and 85°C 25 20 15 10 S21, S11, S22 (dB) 5 0 -5 -10 S22 -15 -20 S11 -25 -30 30 32 34 36 38 FREQUENCY (GHz) 40 42 44 46 S21 10°C 85°C RMPA39100 Power, Gain, PAE vs. Frequency vs. Temperature Frequency = 39 GHz, Bias Vd = 5V, Id = 1000mA Base Plate Temp 10, 25, 50, 75, and 85°C 35 POUT 30 OUTPUT POWER (dBm), GAIN (dB), PAE (%) 25 10 °C 85 °C 10 °C GAIN 20 15 85 °C PAE 10 5 10 °C 85 °C 0 4 6 8 10 INPUT POWER (dBm) 12 14 16 ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 Typical Characteristics RMPA39100 Power, Ids vs. Temperature Frequency = 39 GHz, Bias Vd = 5V, Id = 1000mA Base Plate Temp 10, 25, 50, 75, and 85°C 1350 1300 1250 1200 Ids (mA) 1150 1100 1050 1000 950 900 4 6 8 10 PIN (GHz) 85 °C 10 °C 12 14 16 RMPA39100 Saturated Power and Gain vs. Frequency Pin = 14.5 dBm, Bias Vd = 5V, Id = 1000mA, T = 25°C 35 Pout 30 OUTPUT POWER (dBm) 25 20 GAIN 15 10 5 0 37 37.5 38 38.5 39 39.5 40 FREQUENCY (GHz) 15 10 5 0 30 25 20 SATURATED GAIN (dB) 35 ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C RMPA39100 Typical Characteristics RMPA39100 Power Out vs. Power In Bias Vd = 5V, Id = 1000mA, T = 25°C 33 31 29 Pout (dBm) 27 25 23 21 19 17 15 -2 0 2 4 6 8 10 12 14 37 G Hz 38 G Hz 39 G Hz 40 G Hz PIN (dBm) RMPA39100 OIP3 vs. Output Power/Tone Vd = 5V, Idq = 1000mA (10 MHz Tone Sep.) 38 37 OUTPUT IP3 (dBm) 36 35 34 33 32 10 12 14 16 18 20 22 24 26 28 37 GHz 38 GHz 39 GHz 40 GHz OUTPUT POWER/TONE (dBm) ©2004 Fairchild Semiconductor Corporation RMPA39100 Rev. C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC Across the board. Around the world.™ OPTOPLANAR™ PACMAN™ The Power Franchise POP™ Programmable Active Droop™ Power247™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I11