Advanced Power MOSFET
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 10 µA (Max.) @ VDS = -60V Lower RDS(ON) : 0.22 Ω (Typ.)
1
SFR/U2955
BVDSS = -60 V RDS(on) = 0.3 Ω ID = -7.6 A
D-PAK
2 1 3
I-PAK
2
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt
o Total Power Dissipation (TA=25 C) * o o
Value -60 -7.6 -5.4
1 O 2 O 1 O 1 O 3 O
Units V A A V mJ A mJ V/ns W W W/ C
o
30 + 20 _ 99 -7.6 3.2 -5.5 2.5 32 0.26 - 55 to +150
Total Power Dissipation (TC=25 C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8” from case for 5-seconds
o
TJ , TSTG TL
o
C
300
Thermal Resistance
Symbol RθJC RθJA RθJA Characteristic Junction-to-Case Junction-to-Ambient * Junction-to-Ambient Typ. ---Max. 3.91 50 110
o
Units C/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
SFR/U2955
Symbol BVDSS ∆BV/∆TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain(“Miller”) Charge Min. Typ. Max. Units -60 --2.0 ------------------0.04 ------3.6 465 140 40 11 21 29 20 15 2.9 6.0 ---4.0 -100 100 -10 -100 0.3 -600 215 60 30 50 65 50 19 --nC ns pF µA Ω Ω V V nA
P-CHANNEL POWER MOSFET
Electrical Characteristics (TC=25oC unless otherwise specified)
Test Condition VGS=0V,ID=-250µA See Fig 7 VDS=-5V,ID=-250µA VGS=-20V VGS=20V VDS=-60V VDS=-48V,TC=125 C VGS=-10V,ID=-3.8A VDS=-30V,ID=-3.8A
4 O
o
o V/ C ID=-250µA
4 O
VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-30V,ID=-9.4A, RG=18 Ω See Fig 13 VDS=-48V,VGS=-10V, ID=-9.4A See Fig 6 & Fig 12
45 OO 45 OO
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
1 O
4 O
Min. Typ. Max. Units --------80 0.22 -7.6 -30 -3.8 --A V ns µC
Test Condition Integral reverse pn-diode in the MOSFET TJ=25 C,IS=-7.6A,VGS=0V TJ=25 C,IF=-9.4A diF/dt=100A/µs
4 O
o o
Notes ; 1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature O 2 O L=2.0mH, I AS=-7.6A, V DD=-25V, R G=27Ω*, Starting T J =25ooC _ _ _ 3 O ISD < -9.4A, di/dt < 250A/ µs, VDD < BVDSS , Starting T J =25 C _ 4 O Pulse Test : Pulse Width = 250 µs, Duty Cycle < 2% 5 Essentially Independent of Operating Temperature O
P-CHANNEL POWER MOSFET
Fig 1. Output Characteristics
VGS
SFR/U2955
Fig 2. Transfer Characteristics
[A]
101
[A]
Top :
-ID , Drain Current
101
-ID , Drain Current
- 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom : - 4.5 V
150 oC 100 25 oC @ Notes : 1. V = 0 V GS 2. V = -30 V DS - 55 oC 10-1 3. 250 µs Pulse Test
100 @ Notes : 1. 250 µs Pulse Test 2. T = 25 oC C 10-1 10-1
0 10
101
2
4
6
8
10
-VDS , Drain-Source Voltage [V]
-VGS , Gate-Source Voltage [V]
RDS(on) , [ ] Ω Drain-Source On-Resistance
Fig 3. On-Resistance vs. Drain Current
0.4
[A]
Fig 4. Source-Drain Diode Forward Voltage
0.3
-IDR , Reverse Drain Current
101
VGS = -10 V 0.2
100 150 oC 25 C 10-1
o
0.1 V = -20 V GS 0.0 0 10 20 30 40 50 60 70
@ Note : T = 25 oC J
@ Notes : 1. V = 0 V GS 2. 250 µs Pulse Test
0.5
1.0
1.5
2.0
2.5
3.0
3.5
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Ciss= Cgs+ C ( Cds= shorted ) gd Coss= Cds+ C gd
Fig 6. Gate Charge vs. Gate-Source Voltage
[V]
800
[pF]
600
C iss C oss
Crss= Cgd
400 @ Notes : 1. V = 0 V GS 2. f = 1 MHz 200 C rss
-VGS , Gate-Source Voltage
10
VDS = -12 V VDS = -30 V VDS = -48 V
Capacitance
5
@ Notes : I =-9.4 A D 0 0 2 4 6 8 10 12 14 16
0 100
1 10
-VDS , Drain-Source Voltage [V]
QG , Total Gate Charge [nC]
SFR/U2955
-BV , (Normalized) DSS Drain-Source Breakdown Voltage
P-CHANNEL POWER MOSFET
Fig 8. On-Resistance vs. Temperature
Drain-Source On-Resistance
2.5
Fig 7. Breakdown Voltage vs. Temperature
1.2
RDS(on) , (Normalized)
2.0
1.1
1.5
1.0
1.0 @ Notes : 1. V = -10 V GS 2. I = -4.7 A D -50 -25 0 25 50 75 100 125 150 175
0.9
@ Notes : 1. V = 0 V GS 2. I = -250 µA D -50 -25 0 25 50 75 100
o
0.5
0.8 -75
125
150
175
0.0 -75
TJ , Junction Temperature [ C]
TJ , Junction Temperature [oC]
[A]
Fig 9. Max. Safe Operating Area
Operation in This Area is Limited by R DS(on)
Fig 10. Max. Drain Current vs. Case Temperature
[A] -ID , Drain Current
102 8
-ID , Drain Current
102
6
0.1 ms 101 10 ms DC 100 @ Notes : 1. T = 25 oC C 2. T = 150 oC J 3. Single Pulse 1 ms
4
2
10-1 100
101
0 25
50
75
100
125
150
-VDS , Drain-Source Voltage [V]
Tc , Case Temperature [oC]
Fig 11. Thermal Response
10 1
Thermal Response
D=0.5 10 0 0.2 0.1 0.05
@ Notes : 1. Zθ J C (t)=3.91 o C/W Max. 2. Duty Factor, D=t1 /t 2 3. TJ M -T C =P D M *Z θ J C (t)
P. DM t1. t2.
single pulse
(t) ,
0.02 10- 1 0.01
Z
θJC
10- 5
10- 4
10 - 3
10 - 2
10 - 1
100
10 1
t 1 , S quare Wave Pulse Duration
[sec]
P-CHANNEL POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
SFR/U2955
“ Current Regulator ”
50KΩ 12V 200nF 300nF
Same Type as DUT
VGS Qg
-10V
VDS VGS DUT
-3mA
Qgs
Qgd
R1
Current Sampling (IG) Resistor
R2
Current Sampling (ID) Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL Vout Vin RG DUT -10V Vout
90%
t on
t off tr td(off) tf
VDD
( 0.5 rated VDS )
td(on)
Vin
10%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL VDS
Vary tp to obtain required peak ID
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD
tp
ID VDD
Time VDS (t)
RG DUT -10V
tp
C
VDD
ID (t) IAS BVDSS
SFR/U2955
P-CHANNEL POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
+ VDS DUT -IS L Driver RG VGS
Compliment of DUT (N-Channel)
VGS
VDD
• dv/dt controlled by “RG” • IS controlled by Duty Factor “D”
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
10V
Body Diode Reverse Current
IS ( DUT )
IRM
di/dt IFM , Body Diode Forward Current
Vf VDS ( DUT )
Body Diode Forward Voltage Drop Body Diode Recovery dv/dt
VDD
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Preliminary
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This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.