SG6742HR

SG6742HL/HR — Highly Integrated Green-Mode PWM Controller April 2009 SG6742HL/HR Highly Integrated Green-Mode PWM Controller Features High-Voltage Startup Low Operating Current: 2.7mA Linearly Decreasing PWM Frequency to 22KHz Frequency Hopping to Reduce EMI Emission Fixed PWM Frequency: 100KHz Peak-Current-Mode Control Cycle-by-Cycle Current Limiting Leading-Edge Blanking (LEB) Synchronized Slope Compensation Internal Open-Loop Protection GATE Output Maximum Voltage Clamp: 18V VDD Under-Voltage Lockout (UVLO) VDD Over-Voltage Protection (OVP) Programmable Over-Temperature Protection (OTP) Internal Latch Circuit (OVP, OTP) Internal-Sense, Short-Circuit Protection Built-in 6ms Soft-Start Function Constant Power Limit (Full AC Input Range) Internal OTP Sensor with Hysteresis Description The highly integrated SG6742HL/HR PWM controller provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency at light-load conditions. To avoid acoustic-noise problems, the minimum PWM frequency is set above 22KHz. This green-mode function enables the power supply to meet international power conservation requirements. With the internal high-voltage startup circuitry, the power loss due to bleeding resistors is eliminated. To further reduce power consumption, SG6742HL/HR is manufactured using the BiCMOS process, which allows an operating current of 2.7mA. SG6742HL/HR integrates a frequency-hopping function internally that helps reduce EMI emission of a power supply with minimum line filters. Its built-in synchronized slope compensation achieves stable peak-current-mode control. The proprietary, internal line compensation ensures constant output power limit over a wide AC input voltage range, from 90VAC to 264VAC. SG6742HL/HR provides many protection functions. In addition to cycle-by-cycle current limiting, the internal open-loop protection circuit ensures safety should an open-loop or output short-circuit failure occur. PWM output is disabled until VDD drops below the UVLO lower limit, when the controller starts up again. As long as VDD exceeds ~25V, the internal OVP circuit is triggered. SG6742HL/HR is available in an 8-pin SOP package. Applications General-purpose switch-mode power supplies and flyback power converters, including: Power Adapters Open-Frame SMPS Ordering Information Part Number SG6742HLSY SG6742HRSY Operating Temperature Range -40 to +105°C -40 to +105°C OLP Function Latch Restart Package 8-Lead Small Outline Package (SOP) 8-Lead Small Outline Package (SOP) Eco Status Green Green Packing Method Tape & Reel Tape & Reel For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation SG6742HL/HR • Rev. 1.0.4 www.fairchildsemi.com SG6742HL/HR — Highly Integrated Green-Mode PWM Controller Application Diagram Figure 1. Typical Application Internal Block Diagram SG6742HL SG6742HR Figure 2. Functional Block Diagram © 2008 Fairchild Semiconductor Corporation SG6742HL/HR • Rev. 1.0.4 www.fairchildsemi.com 2 SG6742HL/HR — Highly Integrated Green-Mode PWM Controller Marking Information F - Fairchild Logo Z - Plant Code X - 1-Digit Year Code Y - 1-Digit Week Code TT - 2-Digit Die Run Code T - Package Type (S=SOP) P - Y: Green Package M - Manufacture Flow Code ZXYTT 6742HR TPM ZXYTT 6742HL TPM Figure 3. Top Mark Pin Configuration SOP-8 GND FB NC HV 1 2 3 4 8 7 6 5 GATE VDD SENSE RT Figure 4. Pin Configuration (Top View) Pin Definitions Pin # 1 2 3 4 5 6 7 8 Name GND FB NC HV RT SENSE VDD GATE Description Ground. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal on this pin and the current-sense signal on the SENSE pin. No connection. For startup, this pin is pulled high to the line input or bulk capacitor via resistors. For over-temperature protection, an external NTC thermistor is connected from this pin to the GND pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the RT pin drops below a fixed limit, PWM output is latched. Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the OVP trigger point. The totem-pole output driver. Soft driving waveform is implemented for improved EMI. © 2008 Fairchild Semiconductor Corporation SG6742HL/HR • Rev. 1.0.4 www.fairchildsemi.com 3 SG6742HL/HR — Highly Integrated Green-Mode PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VVDD VFB VSENSE VRT VHV PD ΘJA TJ TSTG TL DC Supply Voltage (1, 2) Parameter FB Pin Input Voltage SENSE Pin Input Voltage RT Pin Input Voltage HV Pin Input Voltage Power Dissipation (TA＜50°C) Thermal Resistance (Junction-to-Air) Operating Junction Temperature Storage Temperature Range Lead Temperature (Wave Soldering or IR, 10 Seconds) Human Body Model, JEDEC:JESD22-A114 Charged Device Model, JEDEC:JESD22-C101 All pins except HV pin All pins except HV pin Min. -0.3 -0.3 -0.3 Max. 30 7.0 7.0 7.0 500 400 141 Unit V V V V V mW °C/W °C °C °C -40 -55 +125 +150 +260 4.0 ESD kV 1.5 Notes: 1. All voltage values, except differential voltages, are given with respect to the network ground terminal. 2. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. © 2008 Fairchild Semiconductor Corporation SG6742HL/HR • Rev. 1.0.4 www.fairchildsemi.com 4 SG6742HL/HR — Highly Integrated Green-Mode PWM Controller Electrical Characteristics VDD=15V and TA=25°C unless otherwise noted. Symbol VDD Section VOP VDD-ON VDD-OFF IDD-ST IDD-OP IDD-OLP VTH-OLP VDD-OVP tD-VDDOVP Parameter Continuously Operating Voltage Start Threshold Voltage Minimum Operating Voltage Startup Current Operating Supply Current Internal Sink Current IDD-OLP off Voltage VDD Over-Voltage Protection VDD Over-Voltage Protection Debounce Time Conditions Min. Typ. Max. 22 Units V V V µA mA µA V V µs 14.5 8.5 VDD-ON – 0.16V VDD=15V, GATE Open VTH-OLP+0.1V 30 6.5 24 75 15.5 9.5 2.7 60 7.5 25 125 16.5 10.5 30 3.7 90 8.0 26 200 HV Section IHV IHV-LC Supply Current from HV Pin Leakage Current After Startup VAC=90V (VDC=120V), VDD=0V HV=500V, VDD=VDDOFF+1V 1.75 2.30 1 3.35 20 mA µA Oscillator Section fOSC tHOP fOSC-G fDV fDT Frequency in Normal Mode Hopping Period Green-Mode Frequency Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation VDD=11V to 22V TA=-40 to 105°C Center Frequency Hopping Range 90 ±4.2 4.9 18 100 ±4.7 5.6 22 110 ±5.2 6.3 25 5 5 KHz ms KHz % % Continued on the following page… PWM Frequency fOSC fOSC-G VFB-ZDC VFB-G VFB-N VFB Figure 5. VFB vs. PWM Frequency © 2008 Fairchild Semiconductor Corporation SG6742HL/HR • Rev. 1.0.4 www.fairchildsemi.com 5 SG6742HL/HR — Highly Integrated Green-Mode PWM Controller Electrical Characteristics (Continued) VDD=15V and TA=25°C unless otherwise noted. Symbol Feedback Input Section AV ZFB VFB-OPEN VFB-OLP tD-OLP VFB-N VFB-G VFB-ZDC ZSENSE VSTHFL VSTHVA tPD tLEB VS-SCP tD-SSCP tSS DCYMAX VGATE-L VGATE-H tr tf IGATESOURCE Parameter Input Voltage to Current-Sense Attenuation Input Impedance Output High Voltage FB Open-Loop Trigger Level Delay Time of FB Pin Open-loop Protection Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage Zero Duty-Cycle Input Voltage Input Impedance Current Limit Flatten Threshold Voltage Current Limit Valley Threshold Voltage Delay to Output Leading-Edge Blanking Time Conditions Min. 1/4.15 4 Typ. 1/4.00 5.2 Max. Units 1/3.85 7 V/V kΩ V 5.0 62 3.5 V ms V V V KΩ 1.03 0.33 200 180 0.20 200 7 70 1.5 V V ns ns V µs ms % V V ns ns mA mA 18 V FB Pin Open 4.6 50 3.1 4.8 56 3.3 VFB-N0.5 1.6 12 Duty cycle=45% VSTHFL–VSTHVA 0.97 0.27 100 0.10 100 5 60 VDD=15V, IO=50mA VDD=12V, IO=50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=15V, GATE=6V VDD=15V, GATE=1V VDD=22V 8 150 30 250 300 250 50 350 90 1.00 0.30 100 140 0.15 150 6 65 Current-Sense Section Threshold Voltage for SENSE Short-Circuit Protection Delay Time for SENSE Short-Circuit Protection Period During Soft-Startup Time Maximum Duty Cycle Gate Low Voltage Gate High Voltage Gate Rising Time Gate Falling Time Gate Source Current VSENSE