SI4835DY

S i4835DY January 2001 Si4835DY P-Channel Logic Level PowerTrench MOSFET General Description This P-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Features • -8.8 A, -30 V. RDS(ON) = 0.020 Ω @ VGS = -10 V RDS(ON) = 0.035 Ω @ VGS = -4.5 V Extended VGSS range (±25V) for battery applications. Low gate charge (19nC typical). Fast switching speed. High performance trench technology for extremely low RDS(ON). High power and current handling capability. • • • • • Applications • • • Battery protection Load switch Motor drives D D D D 5 6 7 4 3 2 1 SO-8 Symbol VDSS VGSS ID PD S S S G 8 Absolute Maximum Ratings Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA = 25°C unless otherwise noted Parameter Ratings -30 ±25 (Note 1a) Units V V A W -8.8 -50 2.5 1.2 1 -55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) T J, T stg Operating and Storage Junction Temperature Range °C Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 50 25 °C/W °C/W Package Outlines and Ordering Information Device Marking Si4835DY Device 4835 Reel Size 13’’ Tape Width 12mm Quantity 2500 units 200 1 F airchild Semiconductor International Si4835DY Rev. A S i4835DY Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSSF IGSSR TA = 25°C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse (Note 2) Test Conditions VGS = 0 V, ID = -250 µA ID = -250 µA,Referenced to 25°C VDS = -24 V, VGS = 0 V VGS = 25 V, VDS = 0 V VGS = -25 V, VDS = 0 V Min -30 Typ Max Units V Off Characteristics -24 -1 100 -100 mV/°C µA nA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance VDS = VGS, ID = -250 µA ID = -250 µA,Referenced to 25°C VGS = -10 V, ID = -8.8 A VGS = -10 V, ID = -8.8 A,TJ=125°C VGS = -4.5 V, ID = -6.7 A VGS = -10 V, VDS = -5 V VDS = -10 V, ID = -8.8 A -1 -2 5 0.015 0.023 0.026 -3 V mV/°C 0.020 0.032 0.035 Ω ID(on) gFS -25 20 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = -15 V, VGS = 0 V, f = 1.0 MHz 1680 545 220 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -15 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω 12 15 55 23 22 27 90 37 27 ns ns ns ns nC nC nC VDS = -10 V, ID = -8.8 A, VGS = -5 V, 19 6.8 7.2 Drain-Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -2.1 A (Note 2) -2.1 -0.52 -1.2 A V Notes: 1: RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. a) 50° C/W when mounted on a 1 in2 pad of 2 oz. copper. b) 105° C/W when mounted on a 0.04 in2 pad of 2 oz. copper. c) 125° C/W on a minimum mounting pad of 2 oz. copper. Scale 1 : 1 on letter size paper 2: Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% Si4835Dy Rev. A S i4835DY Typical Characteristics 50 2.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -10V -6.0V -5.0V -4.5V 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 -4.5V -5.0V -6.0V -7.0V -8.0V -10V VGS = -4.0V -ID, DRAIN CURRENT (A) 40 -7.0V 30 -4.0V 20 10 -3.5V 0 0 1 2 3 4 5 -VDS, DRAIN-SOURCE VOLTAGE (V) 0 10 20 30 40 50 -ID, DIRAIN CURRENT (A) Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Drain Current and Gate Voltage 0.06 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = -8.8A VGS = -10V 1.4 ID = -4.4A 0.05 0.04 0.03 TA = 125 C 0.02 0.01 0 TA = 25 C o o 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 o 125 150 3 4 5 6 7 8 9 10 TJ, JUNCTION TEMPERATURE ( C) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature 50 -IS, REVERSE DRAIN CURRENT (A) 100 Figure 4. On-Resistance Variation with Gate-to-Source Voltage VDS = -5V -ID, DRAIN CURRENT (A) 40 TA = -55oC 25oC 125oC VGS = 0V 10 1 0.1 -55oC 0.01 0.001 0.0001 TA = 125oC 25oC 30 20 10 0 1 2 3 4 5 6 -VGS, GATE TO SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature Si4835DY Rev. A S i4835DY Typical Characteristics 10 -VGS, GATE-SOURCE VOLTAGE (V) ID = -8.8A (continued) 2500 VDS = -5V -10V f = 1 MHz VGS = 0 V 2000 CAPACITANCE (pF) CISS 1500 8 -15V 6 4 1000 2 500 COSS CRSS 0 0 5 10 15 20 25 30 35 Qg, GATE CHARGE (nC) 0 0 5 10 15 20 25 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate-Charge Characteristics Figure 8. Capacitance Characteristics 100 RDS(ON) LIMIT -ID, DRAIN CURRENT (A) 10 100µs 1ms 10ms 100ms 1 DC VGS = -10V SINGLE PULSE o RθJA = 125 C/W TA = 25 C 0.01 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) o 50 SINGLE PULSE 40 POWER (W) RθJA = 125 C/W TA = 25 C 30 o o 1s 10s 20 0.1 10 0 0.001 0.01 0.1 1 10 100 1000 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation TR ANSI ENT T ER M H AL RESISTANC E 1 0.5 0.2 0.1 0 .05 0 .02 0 .01 0. 05 0 0. 02 0 0. 01 0 0.0 001 0. 01 0 0 .01 0.1 t 1, TI M E (s e c ) 1 10 100 300 D= 0 .5 0 .2 0 .1 005 . 0. 2 0 0 .01 S i n g le P ul s e r(t), NORM AL IZED EFFECTIVE R θJ A (t) = r(t) * R θJ A R θJ A= 125°C /W P(pk ) t1 t2 TJ - TA = P * RθJ ( ) At D u t y C y c l e , D = t 1 /t2 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design. Si4835DY Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST  DISCLAIMER FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench  QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER  SMART START™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. G