SI6955DQ

Si6955DQ January 2002 Si6955DQ Dual 30V P-Channel PowerTrench MOSFET General Description This P-Channel MOSFET is a rugged gate version of Fairchild's Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications requiring a wide range of gate drive voltage ratings (4.5V – 20V). Features • –2.5 A, –30 V, RDS(ON) = 85 mΩ @ VGS = –10 V. RDS(ON) = 190 mΩ @ VGS = –4.5V. • Extended VGSS range (±20V) for battery applications • Low gate charge • High performance trench technology for extremely low RDS(ON) • Low profile TSSOP-8 package Applications • • • • Load switch Battery protection DC/DC conversion Power management G2 S2 S2 D2 G1 S1 S1 D1 Pin 1 1 2 3 4 8 7 6 5 TSSOP-8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed TA=25oC unless otherwise noted Parameter Ratings –30 ±20 (Note 1) Units V V A W °C –2.5 –20 1.0 0.6 -55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) (Note 1b) 100 125 Tape width 12mm °C/W Package Marking and Ordering Information Device Marking 6955 Device Si6955DQ Reel Size 13’’ Quantity 2500 units 2002 Fairchild Semiconductor Corporation Si6955DQ Rev C(W) Si6955DQ Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSSF IGSSR VGS(th) ∆VGS(th) ∆TJ RDS(on) ID(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, Forward Gate–Body Leakage, Reverse (Note 2) Test Conditions VGS = 0 V, ID = –250 µA ID = –250 µA, Referenced to 25°C VDS = –24 V, VGS = –20 V, VGS = 20 V, VGS = 0 V VDS = 0 V VDS = 0 V Min –30 Typ Max Units V Off Characteristics –22 –1 –100 100 –1 –1.9 4 64 101 96 –15 6 298 83 39 ID = –1 A, RGEN = 6 Ω 6 13 11 6 VDS = –10V, VGS = –10 V ID = –2.5 A, 6 1 1.2 –0.83 (Note 2) mV/°C µA nA nA V mV/°C 85 190 128 mΩ A S pF pF pF 15 18 27 15 15 ns ns ns ns nC nC nC A V On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance On–State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = VGS, ID = –250 µA ID = –250 µA, Referenced to 25°C VGS = –10 V, ID = –2.5 A VGS = –4.5 V, ID = –1.8 A VGS = –10 V, ID = –2.5 A, TJ=125°C VGS = –10 V, VDS = –5 V VDS = –10V, ID = –2.5 A –3 Dynamic Characteristics VDS = –10 V, f = 1.0 MHz V GS = 0 V, Switching Characteristics Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = –15 V, VGS = –10 V, Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward Voltage VGS = 0 V, IS = –0.83 A –0.8 –1.2 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 100°C/W when 2 mounted on a 1in pad of 2 oz copper for single operation and 81°C/W for dual operation. b) 125°C/W when mounted on a minimum pad of 2 oz copper for single operation and 104°C/W for dual operation. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% Si6955DQ Rev C(W) Si6955DQ Typical Characteristics 15 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -10V -6.0V -5.0V -4.5V 2 1.8 1.6 -ID, DRAIN CURRENT (A) 12 VGS = -4.5V 9 -4.0V -5.0V 1.4 6 -6.0V 1.2 1 0.8 0 3 6 9 12 15 -ID, DRAIN CURRENT (A) -3.5V -7.0V -8.0V -10V 3 0 0 1 2 3 4 5 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.3 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = -3.6A VGS = -10V ID = -1.8A 0.25 1.4 1.2 0.2 TA = 125oC 0.15 1 0.8 0.1 TA = 25oC 0.6 -50 -25 0 25 50 75 100 o 0.05 125 150 2 4 6 8 10 TJ, JUNCTION TEMPERATURE ( C) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 TA = -55oC 25oC 125oC -IS, REVERSE DRAIN CURRENT (A) VDS = -5V -ID, DRAIN CURRENT (A) 8 VGS = 0V 1 TA = 125oC 0.1 6 25oC 0.01 4 -55oC 2 0.001 0 1.5 2.5 3.5 4.5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. Si6955DQ Rev C(W) Si6955DQ Typical Characteristics 10 -VGS, GATE-SOURCE VOLTAGE (V) 400 ID = -3.6A VDS = -5V -15V -10V 8 CISS CAPACITANCE (pF) 300 f = 1 MHz VGS = 0 V 6 200 COSS 100 CRSS 4 2 0 0 1.6 3.2 Qg, GATE CHARGE (nC) 4.8 6.4 0 0 6 12 18 24 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 10µs 100µs 1ms 10ms 100ms 1 VGS = -10V SINGLE PULSE RθJA = 125oC/W TA = 25oC 0.01 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) DC 1s 50 Figure 8. Capacitance Characteristics. -ID, DRAIN CURRENT (A) 10 RDS(ON) LIMIT 40 SINGLE PULSE RθJA = 125°C/W TA = 25°C 30 20 0.1 10 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RθJA(t) = r(t) * RθJA RθJA = 125oC/W P(pk) t1 t2 SINGLE PULSE 0.1 0.1 0.05 0.02 0.01 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. Si6955DQ Rev C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT ™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ DISCLAIMER FAST ® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench ® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER ® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET ® VCX™ STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4