SSP1N60A

Advanced Power MOSFET FEATURES Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 25 µA (Max.) @ VDS = 600V Low RDS(ON) : 9.390 Ω (Typ.) 1 2 3 SSP1N60A BVDSS = 600 V RDS(on) = 12 Ω ID = 1 A TO-220 1.Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD TJ , TSTG TL Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C ) Continuous Drain Current (TC=100 C ) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25 oC ) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8” from case for 5-seconds 1 O o o Value 600 1 0.6 3 + 30 _ 44 1 3.4 3.0 34 0.27 - 55 to +150 Units V A A V mJ A mJ V/ns W W/ oC O 1 O 1 O 3 O 2 o C 300 Thermal Resistance Symbol R R θJC θCS Characteristic Junction-to-Case Case-to-Sink Junction-to-Ambient Typ. -0.5 -- Max. 3.67 -62.5 Units o C /W R θJA Rev. B ©1999 Fairchild Semiconductor Corporation SSP1N60A Symbol BVDSS ∆BV/∆TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain( “Miller” ) Charge Min. Typ. Max. Units 600 -2.0 -----------------0.74 ------0.83 145 20 7 10 13 28 13 7.5 1.2 4 --4.0 100 -100 25 250 12 -190 24 9 30 35 65 35 11 --nC ns pF µA Ω Ω V V nA N-CHANNEL POWER MOSFET Electrical Characteristics (TC=25oC unless otherwise specified) Test Condition VGS=0V,ID=250 µA See Fig 7 VDS=5V,ID=250 µA VGS=30V VGS=-30V VDS=600V VDS=480V,TC=125 C VGS=10V,ID=0.5A VDS=50V,ID=0.5A 4 O 4 O o V/ oC ID=250 µA VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=300V,ID=1A, RG=24 Ω See Fig 13 VDS=480V,VGS=10V, ID=1A See Fig 6 & Fig 12 45 OO 45 OO Source-Drain Diode Ratings and Characteristics Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 1 O Min. Typ. Max. Units --------190 0.44 1 3 1.2 --A V ns µC Test Condition Integral reverse pn-diode in the MOSFET TJ=25oC ,IS=1A,VGS=0V TJ=25 C ,IF=1A diF/dt=100A/µ s 4 O o O 4 Notes ; 1 O Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature 2 O L=80mH, I AS=1A, VDD=50V, RG=27 Ω, Starting T J =25 oC o < 3 _ _ O ISD < 1A, di/dt _ 60A/ µs, VDD < BVDSS , Starting T J =25 C _ 4 O Pulse Test : Pulse Width = 250 µs, Duty Cycle < 2% 5 Essentially Independent of Operating Temperature O N-CHANNEL POWER MOSFET Fig 1. Output Characteristics [A] Top : 15V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V SSP1N60A Fig 2. Transfer Characteristics [A] 100 VGS 100 ID , Drain Current ID , Drain Current 150 oC 10-1 25 oC @ Notes : 1. V = 0 V GS - 55 oC 2. V = 50 V DS 3. 250 µs Pulse Test 6 8 10 10-1 10-2 10-1 100 @ Notes : 1. 250 µs Pulse Test 2. T = 25 oC C 101 10-2 2 4 VDS , Drain-Source Voltage [V] [A] VGS , Gate-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current RDS(on) , [ ] Ω Drain-Source On-Resistance 25 Fig 4. Source-Drain Diode Forward Voltage IDR , Reverse Drain Current 20 VGS = 10 V 10 0 15 10 VGS = 20 V 1 -1 0 5 @ N t : TJ = 2 oC oe 5 0 00 . 05 . 10 . 15 . 20 . 25 . 30 . 1 0 oC 5 2 oC 5 1 -2 0 02 . 04 . 06 . @Nts: oe 1 VGS = 0 V . 2 2 0 µs P l e T s .5 us et 08 . 10 . 12 . ID , Drain Current [A] VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage 20 5 Ciss= Cgs+ C ( Cds= s o t d ) hre gd Coss= Cds+ C gd Fig 6. Gate Charge vs. Gate-Source Voltage [V] VDS = 1 0 V 2 1 0 0 VDS = 3 0 V V =40V 8 DS 5 [pF] C iss 10 5 10 0 C oss 50 C rss @Nts: oe 1 V =0V . GS 2 f=1Mz . H VGS , Gate-Source Voltage 20 0 Crss= Cgd Capacitance @ N t s : ID = 1 0 A oe . 0 0 2 4 6 8 00 10 1 10 VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC] SSP1N60A BVDSS , (Normalized) Drain-Source Breakdown Voltage N-CHANNEL POWER MOSFET Fig 8. On-Resistance vs. Temperature RDS(on) , (Normalized) Drain-Source On-Resistance 3.0 Fig 7. Breakdown Voltage vs. Temperature 1.2 2.5 1.1 2.0 1.0 1.5 1.0 @ Notes : 1. V = 10 V GS 2. I = 0.5 A D 0.9 @ Notes : 1. V = 0 V GS 2. I = 250 µA D 0.5 0.8 -75 -50 -25 0 25 50 75 100 125 150 175 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC] Fig 9. Max. Safe Operating Area [A] 1 10 Fig 10. Max. Drain Current vs. Case Temperature 1.2 Operation in This Area is Limited by R DS(on) [A] 1.0 1 ms 10 ms 100 µs ID , Drain Current ID , Drain Current 0.8 0 10 DC 0.6 10-1 0.4 @ Notes : 1. T = 25 oC C 2. T = 150 oC J 3. Single Pulse 0.2 10-2 0 10 1 10 2 10 3 10 0.0 25 50 75 100 125 150 VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC] Fig 11. Thermal Response Thermal Response D=0.5 100 0.2 0.1 0.05 0.02 0.01 single pulse @ Notes : 1. Zθ J C (t)=3.67 3. TJ M -TC =PD M *Z o C/W Max. (t) 2. Duty Factor, D=t /t2 1 θJ C Z JC(t) , 10- 1 PDM t1 t2 θ 10- 5 10- 4 10- 3 10- 2 10- 1 100 101 t 1 , S quare Wave Pulse Duration [sec] N-CHANNEL POWER MOSFET Fig 12. Gate Charge Test Circuit & Waveform SSP1N60A “ Current Regulator ” 50KΩ 12V 200nF 300nF Same Type as DUT VGS Qg 10V VDS VGS DUT 3mA Qgs Qgd R1 Current Sampling (IG) Resistor R2 Current Sampling (ID) Resistor Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL Vout Vin RG DUT 10V Vin 10% Vout VDD ( 0.5 rated VDS ) 90% td(on) t on tr td(off) t off tf Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms LL VDS Vary tp to obtain required peak ID BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS C VDD VDD tp ID RG DUT 10V tp ID (t) VDS (t) Time SSP1N60A N-CHANNEL POWER MOSFET Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS -- IS L Driver RG VGS Same Type as DUT VGS VDD • dv/dt controlled by “RG” • IS controlled by Duty Factor “D” VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ DISCLAIMER ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™ UHC™ VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.