UC3525A

www.fairchildsemi.com UC3525A SMPS Controller Features • • • • • 5V ± 1% Reference Oscillator Sync terminal Internal Soft Start Deadtime Control Under-Voltage Lockout Description UC3525A is a monolithic integrated circuit that Included all of the control circuit necessary for a pulse width modulating regulator. There are a voltage reference, an error amplifier, a pulse width modulator, an oscillator, under-voltage lockout, soft start circuit, and output drivers in the chip. 16-DIP 1 Internal Block Diagram Rev. 5.0 ©2000 Fairchild Semiconductor International UC3525A Absolute Maximum Ratings Parameter Supply Voltage Collector Supply Voltage Output Current, Sink or Source Reference Output Current Oscillator Charging Current Power Dissipation (TA = 25°C) Operating Temperature Storage Temperature Lead Temperature (Soldering, 10 sec) Symbol VCC VC IO IREF ICHG(OSC) PD TOPR TSTG TLEAD Value 40 40 500 50 5 1000 0 ~ +70 -65 ~ +150 +300 Unit V V mA mA mA m/W °C °C °C Electrical Characteristics (VCC = 20V, TA = -30°C to + 85°C, unless otherwise specified) Parameter REFERENCE SECTION Reference Output Voltage Line Regulation Load Regulation Short Circuit Output Current Total Output Variation (Note 1) Temperature Stability (Note 1) Long Term Stability (Note 1) OSCILLATOR SECTION Initial Accuracy (Note 1, 2) Frequency Change With Voltage Maximum Frequency Minimum Frequency Clock Amplitude (Note 1, 2) Clock Width (Note 1, 2) Sync Threshold Sync Input Current ACCUR ∆f/∆VCC f(MAX) f(MIN) V(CLK) tW(CLK) VTH(SYNC) II(SYNC) Sync = 3.5V TJ = 25°C TJ = 25°C VCC = 8 to 35V (Note 1, 2) RT = 2KΩ, CT = 470pF RT = 200KΩ, CT = 0.1uF 400 3 0.3 1.2 ±3 ± 0.8 430 60 4 0.6 2 1.3 ±6 ±2 120 1 2.8 2.5 % % KHz Hz V µs V mA VREF ∆VREF ∆VREF ISC ∆VREF STT ST TJ = 25°C VCC = 8 to 35V IREF = 0 to 20mA VREF = 0, TJ = 25°C Line, Load and Temperature TJ = 125°C ,1 KHRS 5.0 4.95 5.1 9 20 80 20 20 5.2 20 50 100 5.25 50 50 V mV mV mA V mV mV Symbol Conditions Min. Typ. Max. Unit 2 UC3525A Electrical Characteristics (VCC = 20V, TA = 0 to +85°C, unless otherwise specified) Parameter ERROR AMPLIFIER SECTION (VCM = 5.1V) Input Offset Voltage Input Bias Current Input Offset Current Open Loop Voltage Gain Common Mode Rejection Ratio Power Supply Rejection Ratio PWM COMPARATOR SECTION Minimum Duty Cycle Maximum Duty Cycle Input Threshold Voltage (Note 2) Input Threshold Voltage (Note 2) SOFT-START SECTION Soft Start Current Soft Start Low Level Voltage Shutdown Threshold Voltage Shutdown Input Current OUTPUT SECTION Low Output Voltage I Low Output Voltage II High Output Voltage I High Output Voltage II Under Voltage Lockout Collector Leakage Current Rise Time (Note 1) Fall Time (Note 1) STANDBY CURRENT Supply Current ICC VCC = 35V 12 20 mA VOL I VOL II VCH I VCH II VUV ILKG tR tF ISINK = 20mA ISINK = 100mA ISOURCE = 20mA ISOURCE = 100mA V8 and V9 = High VCC = 35V CL = 1uF, TJ = 25°C CL = 1uF, TJ = 25°C 18 17 6 0.1 0.05 19 18 7 80 80 70 0.4 2 8 200 600 300 V V V V V µA ns ns ISOFT VSL VTH(SD) IN(SD) VSD = 0V, VSS = 0V VSD = 25V VSD = 2.5V 25 0.6 51 0.3 0.8 0.3 80 0.7 1 1 µA V V mA D(MIN) D(MAX) VTH1 VTH2 Zero Duty Cycle Max Duty Cycle 45 0.7 49 0.9 3.2 0 3.6 % % V V VIO IBIAS IIO GVO CMRR PSRR RL ≥10MΩ VCM = 1.5 to 5.2V VCC = 8 to 3.5V 60 60 50 1.5 1 0.1 80 90 60 10 10 1 mV µA µA dB dB dB Symbol Conditions Min. Typ. Max. Unit Notes : 1. These parameters. although guaranteed over the recommended operating conditions, are not 100% tested in production 2. Tested at fOSC=40 KHz (RT =3.6K, CT =0.01uF, RI = 0Ω) 3 UC3525A Test Circuit 4 UC3525A Mechanical Dimensions Package 16-DIP 0.81 ) 0.032 #16 6.40 ±0.20 0.252 ±0.008 #1 ( 19.80 MAX 0.780 19.40 ±0.20 0.764 ±0.008 #8 #9 7.62 0.300 3.25 ±0.20 0.128 ±0.008 0.38 MIN 0.014 5.08 MAX 0.200 3.30 ±0.30 0.130 ±0.012 0~15° 0.25 –0.05 0.010 –0.002 +0.004 +0.10 2.54 0.100 0.46 ±0.10 0.018 ±0.004 1.50 ±0.10 0.059 ±0.004 5 UC3525A Ordering Information Product Number UC3525AN Package 16-DIP Operating Temperature -30 ~ +85°C 6 UC3525A 7 UC3525A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 7/12/00 0.0m 001 Stock#DSxxxxxxxx  2000 Fairchild Semiconductor International 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.