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UC3846

UC3846

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    UC3846 - SMPS Controller - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
UC3846 数据手册
www.fairchildsemi.com UC3846 SMPS Controller Features • Automatic Feed Forward Compensation • Programmable Pulse by Pulse Current Limiting • Automatic Symmetry Correction in Push-Pull Configuration • Enhanced Load Response Characteristics • Parallel Operation Capability for Modulator Power Systems • Differential Current Sense Amplifier with Common Mode Range • Double Pulse Suppression • 200mA Totem-Pole Outputs • ±2% Band gap Reference • Under-Voltage Lockout • Soft-Start Capability • Shutdown Terminal • 500KHz Operation Description The UC3846 control IC provides all of the necessary features to implement fixed frequency, current mode control schemes while maintaining a minimum external parts count. The superior performance of this technique can be measured in improved line regulation, enhanced load response characteristics, and a simpler, easier-to-design control loop. Topological advantages include inherent pulse-by-pulse current limiting capability, automatic symmetry correction for push-pull converters, and the ability to parallel “power module,, while maintaining equal current sharing. Protection circuitry includes built-in-under-voltage lockout and programmable current limit in addition to soft-start capability. A shutdown function is also available which can initiate either a complete shutdown with automatic restart or latch the supply off. Other features include fully latched operation, double pulse suppression, deadtime adjust capability, and ±2% trimmed bandgap reference. The UC3846 features low outputs in the OFF state. 16-DIP 1 Internal Block Diagram 10 Rev. 5.0 ©2000 Fairchild Semiconductor International UC3846 Absolute Maximum Ratings Parameter Supply Voltage Collector Supply Voltage Output Current, Sink of Source (Peak) Reference Output Current Soft Start Sink Current Sync Output Current Error Amplifier Output Current Oscillator Changing Current Power Dissipation (TA = 25°C) Operating Temperature Storage Temperature Lead Temperature (Soldering, 10sec) Symbol VCC VC IO IREF ISINK(S.S) ISYNC IO(E.A) ICHG(OSC) PD TOPR TSTG TLEAD Value 40 40 500 30 50 5 5 5 1000 0 ~ +70 -65 ~ +150 +300 Unit V V mA mA mA mA mA mA mW °C °C °C Electrical Characteristics (VCC=15V, TA=0°C to +70°C, unless otherwise specified) Parameter REFERENCE SECTION Reference Output Voltage Line Regulation Load Regulation Temperature Stability(Note 6) Output Voltage Range (Note 6) Short Circuit Output Current Output Noise Voltage(Note 6) Long-Term Stability(Note 6) VREF ∆VREF ∆VREF STT VREF ISC VNO ST VREF = 0V f = 10Hz to 10KHz, TJ = 25°C TJ = 125°C, 1KHz TJ = 25°C, IREF = 1mA VCC = 8 to 40V IREF1 to 10mA Line,Load,Temp 5.00 4.95 -10 2 5.10 5 3 0.4 -45 100 5 5.20 20 15 1.0 5.25 8 V mV mV mV/°C V mA uV mV Symbol Conditions Min. Typ. Max. Unit 2 UC3846 Electrical Characteristics (VCC= 15V,TA=0°C to +70°C, unless otherwise specified) Parameter OSCILLATOR SECTION (Note 2) Initial Accuracy Frequency Change with Voltage Frequency Change with Temperature (Note 6) Sync Output High Level Sync Output Low Level Sync Input High Level Sync Input Low Level Sync Input Current ERROR AMPLIFIER SECTION Input Offset Voltage Input Bias Current Input Offset Current Common-Mode Range Open Loop Voltage Gain Unity Gain Bandwidth(Note 6) Common Mode Rejection Ratio Power Supply Rejection Ratio Output Sink Current Output Source Current High Output Voltage Low Output Voltage Amplifier Gain (Note 1, 3) Maximum Differential Input Signal (V4 - V3) (Note 1) Input Offset Voltage (Note 1) Common Mode Rejection Ratio Power Supply Rejection Ratio Input Bias Current (Note 1) Input Offset Current (Note 1) Delay to Outputs (Note 6) VIO IBIAS IIO VCM GVO BW CMRR PSRR ISINK ISOURCE VOH VOL GV VI(DIFF,MAX) VIO CMRR PSRR IBIAS IIO tD VCC = 8 to 40V VO = 1.2 to 3V, VCM = 2V TJ = 25°C VCM = 0 to 38V, VCC = 40V VCC = 8 to 40V VIO = -15mV to 5V, V7 = 2.5V RL = 15KΩ RL = 15KΩ V3 = 0V, Pin 1 open RL = 15KΩ, Pin 1 open V1 = 0.5V, Pin 1 open VCM = 1 to 12V VCC = 8 to 40V V1 = 0.5V, Pin 7 open V1 = 0.5V, Pin 7 open TJ = 25°C 0 80 0.7 75 80 2 -0.4 4.3 2.5 1.1 60 60 0.5 -0.6 40 105 1.0 100 105 6 -0.5 4.6 0.7 2.75 1.2 5 83 84 -2.5 0.08 200 5 -1 250 VCC2 1 3.0 25 -10 1 500 mV uA uA V dB MHz dB dB mA mA V V V V mV dB dB uA uA ns ACCUR ∆f/∆VCC ∆f/∆T VOH(SYNC) VOL(SYNC) VIH(SYNC) VIL(SYNC) II(SYNC) V8 = 0V V8 = 0V Sync Voltage = 3.9V, V8 = 0V TJ = 25°C VCC = 8 to 40V 39 3.9 3.9 43 1 1 4.35 2.3 1.3 47 2 2.5 2.5 1.5 KHz % % V V V V mA Symbol Conditions Min. Typ. Max. Unit CURRENT SENSE AMPLIFIER SECTION 3 UC3846 Electrical Characteristics (VCC=15V, TA=0°C to + 70°C, unless otherwise specified) Parameter CURRENT LIMIT ADJUST SECTION Current Limit Offset Voltage (Note 1) Input Bias Current SHUTDOWN TERMINAL SECTION Threshold Voltage Input Voltage Range Minimum Latching Current (Note 4) UNDER-VOLTAGE LOCKOUT SECTION Start Threshold Threshold Hysteresis OUTPUT SECTION Collector-Emitter Voltage Collector Leakage Current Low Output Voltage 1 Low Output Voltage 2 High Output Voltage 1 High Output Voltage 2 Rise Time (Note 6) Fall Time (Note 6) TOTAL STANDBY CURRENT Supply Current ICC 17 21 mA VCEO ILEAK VOL 1 VOL 2 VOH 1 VOH 2 tR tF VC = 40V ISINK = 20mA ISINK = 100mA ISOURCE = 20mA ISOURCE = 100mA CL = 1nF, TJ = 25°C CL = 1nF, TJ = 25°C 40 13 12 0.1 0.4 13.5 13.5 50 50 200 0.4 2.1 300 300 V uA V V V V us us VTH(ST) VHYS 7 0.45 7.7 0.75 8.4 1.05 V V VTH VI I(LATCH,MIN) 250 0 3.0 350 1.5 1.5 400 VCC 0.8 mV V mA mA VIO(C.L) IBIAS V3 = 0V V4 = 0V, Pin 7 open V5 = VREF, V6 = 0V 0.45 0.5 - 10 0.55 - 30 V uA Symbol Conditions Min. Typ. Max. Unit Maximum Non-Latching Current (Note 5) I(NONLATCH,MAX) Notes : 1. Parameter measured at trip point at latch with V5 = VREF, V6 = 0V 2. RT = 10KΩ, CT = 4.7nF 3. Amplifier gain definde as: ∆ V7 G = ---------- ;∆ V 4 = 0to1.0V ∆ V4 4. Current into Pin 1 guaranteed to latch circuit in shutdown state. 5. Current into Pin 1 guaranteed not to latch circuit in shutdown state. 6. These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production. 4 UC3846 Td OUTPUT DEADTIME(Td)     12 Output deadtime is determined by the external capacitor, CT, according to the formula: Td ( us ) = 145C T ( µ F )  ---------------------------------  3.6 -  12 – -------------------For large values of RT: Td (us) = l45CT (uF) Oscillator frequency is approximately  R T ( K Ω ) 2.2 by the formula: fT ( KHz ) = ----------------------------------------RT ( K Ω ) CT ( µ F ) Figure 1. UC3846 Oscillator Circuit Figure 2. Error Amplifier Output Configuration 5 UC3846 Figure 3. Parallel Operation Figure 4. Pulse By Pulse Current Limiting Figure 5. Current Sense Amp Connections A small PC filter may be required in some applications to reduce switch transients Differential input allows remote, noise free sensing. 6 UC3846 Mechanical Dimensions Package 16-DIP 0.81 ) 0.032 6.40 ±0.20 0.252 ±0.008 #1 #16 ( 19.80 MAX 0.780 19.40 ±0.20 0.764 ±0.008 #8 #9 7.62 0.300 3.25 ±0.20 0.128 ±0.008 0.38 0.014 MIN 5.08 MAX 0.200 3.30 ±0.30 0.130 ±0.012 0~15° 0.25 –0.05 0.010 –0.002 +0.004 +0.10 2.54 0.100 0.46 ±0.10 0.018 ±0.004 1.50 ±0.10 0.059 ±0.004 7 UC3846 Ordering Information Product Number UC3846N Package 16 DIP Operating Temperature 0 ~ + 70°C 8 UC3846 9 UC3846 LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 7/12/00 0.0m 001 Stock#DSxxxxxxxx  2000 Fairchild Semiconductor International 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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