FSP34063SAD

UNIVERSAL DC/DC CONVERTER FSP34063 FEATURES Operation from 3.0V to 40V Input Low Standby Current Current Limiting Output Switch Current to 1.6A Output Voltage Adjustable Frequency Operation to 100kHz Precision 2% Reference SOP8L and PDIP8L Packages GENERAL DESCRIPTION The FSP34063 Series is a monolithic control circuit containing the primary functions required for DC-to-DC converters. These devices consists of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This series is specifically designed for incorporating in Step-Down and Step-Up and Voltage-Inverting applications with a minimum number of external components. PIN CONFIGURATION (Top View) Switch Collector 1 Switch Emitter 2 Timing Capacitor 3 Gnd 4 8 Driver 7 IPK sensor 6 VCC 5 Comparator inverting input REPRESENTATIVE SCHEMATIC DIAGRAM Driver Collector 8 S R Ipk Sensor 7 Ipk CT Oscillator Vcc 6 Comparator + Sw itch 1 Collector Q Q2 Q1 100 2 Sw itch Emitter 3 Timing Capacitor Comparator Inverting Input - 1.25V Reference Regulator 5 4 Gnd 1/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 ABSOLUTE MAXIMUM RATINGS Symbol VCC VIR VC(switch) VE(switch) VCE(switch) VC(driver) IC(driver) ISW PD θJA PD θJA TJ TA Parameter Power Supply Voltage Comparator Input Voltage Range Switch Collector Voltage Switch Emitter Voltage(VPin1=40V) Switch Collector to Emitter Voltage Driver Collector Voltage Driver Collector Current(Note1) Switch Current SOP8L: TA=25℃ Thermal Resistance Power Dissipation and Thermal Characteristics PDIP8L: TA=25℃ Thermal Resistance Operating Junction Temperature Operating Ambient Temperature Range Rating 40 -0.3~+40 40 40 40 40 100 1.6 600 160 1.25 100 +150 0~+70 -40~+85 -65~+150 Unit V V V V V V mA A mW ℃/W W ℃/W ℃ ℃ ℃ Tstg Storage Temperature Range Notes: 1.Maximum package power dissipation limits must be observed. 2.ESD data available upon request. ELECTRICAL CHARACTERISTICS(VCC=5V, UNLESS OTHERWISE NOTED) Symbol Parameter Oscillator section fosc Frequency Ichg Charge Current Idischg Discharge Current Discharge to Charge Idischg/Ichg Current Ratio Current Limit Sense Vipk(sense) Voltage Output switch section Saturation Voltage, VCE(sat) Darlington Connection Saturation Voltage, VCE(sat) Darlington Connection hFE DC Current Gain Collector Off-State IC(off) Current Comparator section Threshold Voltage Vth Reg(line) Total device VCC=5.0V to 40V, CT=1.0nF, 3.5 mA Pin7=VCC, VPin5＞Vth, Pin2=Gnd, remaining pins open Note: 3.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 4.If the output switch is driven into hard saturation(non-Darlington configuration) at low switch currents(≤300mA) and high driver currents(≥30mA), it may take up to 2.0µs for it to come out of saturation. This condition will shorten the off time at frequencies≥30kHz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-Darlington configuration is ICC Supply Current 2/10 2007-1-25 Test Conditions VPin 5=0V, CT=1.0nF, TA=25℃ VCC=5.0V to 40V, TA=25℃ VCC=5.0V to 40V, TA=25℃ Pin7 to Vcc, TA=25℃ Ichg=Idischg, TA=25℃ ISW=1.0A, Pins 1,8 connected ISW=1.0A, ID=50mA, Forced β120 ISW=1.0A, VCE=5.0V, TA=25℃ VCE=40V TA=25℃ T=0℃~75℃ VCC=3.0V to 40V Min. 24 24 140 5.2 300 Typ. 33 30 200 6.5 400 1.0 0.45 Max. 42 42 260 7.5 450 1.3 0.7 100 1.275 1.29 6.0 Unit kHz µA µA mV V V µA V mV 50 75 0.01 1.225 1.21 1.25 1.4 Threshold Voltage Line Regulation UNIVERSAL DC/DC CONVERTER FSP34063 used, the following output drive condition is recommended: Forced βof output switch: I C output ≥ 10 I C driver − 7.0mA∗ *The 100Ω resistor in the emitter of the driver device requires about 7.0mA before the output switch conducts. APPLICATION CIRCUITS (1) Step-Up Converter 120µH 8 180 S R 7 Rsc 0.24 V in 12V 6 470µF Vcc Ipk Oscillator CT Q Q2 Q1 1 2 3 1.25V Reference Regulator 4 IN5189 CT 680 pF Comparator + - 5 R2 56k R1 10k 470µF Vout 28V/200mA Co 1.0µH Vout 100 Optional Filter Test Line Regulation Load Regulation Output Ripple Efficiency Conditions Vin=9V to 12V, IO=200mA Vin=12V, IO=50mA to 200mA Vin=12V, IO=200mA Vin=12V, IO=200mA Results 20mV=0.035% 15mV=0.035% 500mVPP 80% 3/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 (2) Step-Down Converter 8 S R 7 Rsc 0.11 Vin 25V 6 470µF 5 Vcc Ipk Oscillator Comparator + - 1 Q Q2 Q1 2 CT IN5819 3 CT 470 pF 4 1.0µH Vout 5.0V/500mA Vout 100 Optional Filter 1.25V Reference Regulator 100µH R2 36k R1 25k 470µF Co Test Line Regulation Load Regulation Output Ripple Efficiency Conditions Vin=12V to 24V, IO=500mA Vin=24V, IO=50mA to 500mA Vin=24V, IO=500mA Vin=24V, IO=500mA Results 20mV=0.2% 5mV=0.05% 160mVPP 82% 4/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 (3) Voltage Inverting Converter 8 S R 7 Rsc 0.26 Vin 4.5V to 6.0V 6 470µF Vcc Ipk Oscillator Comparator + - 1 Q Q2 Q1 2 CT 100µH 3 1.25V Reference Regulator 680 pF 4 Vout -12V/100mA Co 1.0µH Vout 100 Optional Filter IN5819 5 R1 3k R2 50k 470µF Test Line Regulation Load Regulation Output Ripple Efficiency Conditions Vin=4.5V to 6.0V, IO=100mA Vin=5.0V, IO=20mA to 100mA Vin=5.0V, IO=100mA Vin=5.0V, IO=100mA Results 20mV=0.08% 30mV=0.12% 500mVPP 60% 5/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 TYPICAL CHARACTERISTICS Vce(sat), Saturation Voltage(V) 1.4 1.2 1.0 0.8 0.6 Vce(sat) vs Ie Reference Voltage(V) 1.26 1.255 1.25 1.245 1.24 Reference Voltage vs Temperature 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 Ie, Emitter Current(A) Current Sense Voltage vs Temperature 0 10 20 30 40 50 60 70 80 90 100 Temperature(℃) Current Sense Voltage(mV) 440 420 400 380 360 340 320 Icc, Supply Current (mA) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Standby Supply Current vs Supply Voltage 0 10 20 30 40 50 60 70 80 90 100 Temperature(℃) 0 5 10 15 20 25 30 35 40 Vcc, Supply Voltage(V) Output Switch On-Off Time vs Oscillator Timing Capacitor 1000 1.8 1.75 1.7 1.65 1.6 ton-off, Output Switch On-Off Time(µs) Emitter Follower Configuration Output Saturation Voltage vs Emitter Current Pin1,7,8=Vcc Pin3,5=GND Vcc=2~10V TA=25℃ Pin7=Vcc Pin5=GND 100 ton 10 Vcc=5.0V TA=25℃ VCE(sat), (V) 1.55 1.5 1.45 1.4 100 300 toff 1 700 900 1100 1300 1500 Ie(mA) 0.1 10 0.01 0.1 1 CT,Oscilllator Timing Capacitor(nF) 6/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 ORDERING INFORMATION FSP34063XXX Package: S: SOP8L N: PDIP8L Packing: Blank: Tube or Bulk A: Tape & Reel Temperature Grade: Blank: 0~70℃ D:-40~85℃ MARKING INFORMATION (1) SOP8L (2) PDIP8L Logo Logo FSP34063 YYWWXX Part number FSP34063 YYWWXX Part number Internal code Internal code Date code: YY: Year (01=2001) WW: Nth week (01~52) Date code: YY: Year (01=2001) WW: Nth week (01~52) 7/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 PACKAGE INFORMATION (1) SOP8L E H L θ VIEW “A” 7°(4х) D 7°(4х) 0.015х45° A2 e A1 B A VIEW “A” Y Symbol A A1 A2 B C D E e H L Y θ Min. 1.40 0.10 1.30 0.33 0.19 4.80 3.70 Dimensions In Millimeters Nom. Max. 1.60 1.75 0.25 1.45 1.50 0.41 0.51 0.20 0.25 5.05 5.30 3.90 4.10 1.27 5.79 5.99 6.20 0.38 0.71 1.27 0.10 0ο 8ο C Dimensions In Inches Min. Nom. 0.055 0.063 0..004 0.051 0.057 0.013 0.016 0.0075 0.008 0.189 0.199 0.146 0.154 0.050 0.228 0.236 0.015 0.028 0ο Max. 0.069 0.010 0.059 0.020 0.010 0.209 0.161 0.244 0.050 0.004 8ο 8/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 (2) PDIP8L D E-PIN 0.018inch E1 E PIN #1INDENT 0.025 DEEP 0.006-0.008 Inch 15°(4х) 7°(4х) C L S e B B1 A1 B2 A Symbol A A1 A2 B B1 B2 C D E E1 e L eB S Min. 0.38 3.1 0.36 1.4 0.81 0.20 9.02 7.62 6.15 2.92 8.38 0.71 Dimensions In Millimeters Nom. Max. 5.33 3.30 0.46 1.52 0.99 0.25 9.27 7.94 6.35 2.54 3.3 8.89 0.84 3.5 0.56 1.65 1.14 0.36 9.53 8.26 6.55 3.81 9.40 0.97 A2 eB Min. Dimensions In Inches Nom. 0.130 0.018 0.060 0.039 0.010 0.365 0.313 0.250 0.100 0.130 0.350 0.033 Max. 0.210 0.138 0.022 0.065 0.045 0.014 0.375 0.325 0.258 0.150 0.370 0.038 0.015 0.122 0.014 0.055 0.032 0.008 0.335 0.300 0.242 0.115 0.330 0.028 9/10 2007-1-25 UNIVERSAL DC/DC CONVERTER FSP34063 DESIGN FORMULA TABLE Calculation ton/toff Step-Up Step-Down Voltage-Inverting VOUT + VF − Vin (min) Vin (min) − Vsat 1/f 1/f VOUT + VF Vin (min) − Vsat − VOUT 1/f VOUT + VF Vin − Vsat (ton+toff) toff ton + toff ton +1 toff ton + toff ton +1 toff ton + toff ton +1 toff ton CT IPK(switch) RSC L(min) (ton + toff ) − toff 4.0 ×10−5 ton 2 I out (max) (ton / toff + 1) 0.3 / I PK ( switch ) Vin (min) − Vsat I pk ( switch ) I out ton Vripple ( pp ) (ton + toff ) − toff 4.0 ×10−5 ton 2 I out (max) 0.3 / I PK ( switch ) Vin (min) − Vsat − Vout I pk ( switch ) I pk ( switch ) (toff + ton ) 8Vripple ( pp ) (ton + toff ) − toff 4.0 ×10−5 ton 2 I out (max) (ton / toff + 1) 0.3 / I PK ( switch ) t on (max) Vin (min) − Vsat I pk ( switch ) 9 I out ton Vripple ( pp ) t on (max) t on (max) Co 9 Vsat=Saturation voltage of the output switch. VF=Forward voltage drop of the output rectifier. The following power supply characteristics must be chosen: Vin-Norminal input voltage Vout-Desired output voltage, |vout|=1.25(1+ R2/R1) Iout-Desired output current fmin-Minimum desired output switching frequency at the selected values of Vin and Io Vripple(pp)-Desired peak-to-peak output ripple voltage, In practice, the calculated capacitor value will need to be increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the line and load regulation. 10/10 2007-1-25