Freescale Semiconductor Advance Information
Document Number: MPC17550 Rev. 2.0, 7/2006
Quad H-Bridge Micromotor Driver with DC/DC Boost Converter
The 17550 is a monolithic quad H-Bridge power IC ideal for portable electronic applications containing tiny bipolar stepper motors and/or brush DC-motors powered by two-to-four cell NiCd/NiMH batteries. The 17550 operates from 2.5 V to 5.5 V, with independent control of each H-Bridge via parallel 3.0 V or 5.0 V logic-compatible I/O. The device features an on-board DC / DC boost converter that allows motor operation all the way down to 1.6 V (the boost converter supplies the gate-drive voltage for each of the four independent H-bridge output stages). Each output bridge has its own gate-drive and logic circuitry with built-in shoot-through current protection. The 17550 has four operating modes: Forward, Reverse, Brake, and Tri-Stated (High Impedance). The 17550 has a low total RDS(ON) of 1.2 Ω max @ 25°C. In addition, it can be set into a very low currentdrain standby mode. The H-Bridge outputs can be independently PWM’ed at up to 200 kHz for speed/torque and current control. The 17550 can efficiently drive many types of micromotors owing to its low output resistance and high output slew rates. Features • Low Total RDS(ON) 0.7 Ω (Typ), 1.2 Ω (Max) @ 25°C • Output Current 700 mA (Continuous per Output) • Shoot-Through Current Protection Circuit • PWM Control Input Frequency up to 200 kHz • Built-In DC / DC Boost Converter • Low Power Consumption Standby Mode • Undervoltage Detection and Shutdown Circuit • Pb-Free Packaging Designated by Suffix Code EV
17550
H-BRIDGE MOTOR DRIVER
EV SUFFIX (Pb-FREE) 98ASA10591D 36-TERMINAL VMFP
ORDERING INFORMATION
Device MPC17550EV/EL Temperature Range (TA) -10°C to 60°C Package 36 VMFP
VM 17550 VM OE PSB
VDD VDD LX VG
MCU
INAF INAR INBF INBR INCF INCR INDF INDR
HBAF HBAR HBBF HBBR HBCF HBCR HBDF HBDR GND
Figure 1. 17550 Simplified Application Diagram
* This document contains certain information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
GND
LX
VG
VDD
VDD PSB
VDD
AGND
DC/DC Converter
VDD
VG
HBA
VMA HBAF
INAF INAR HBAR PGND
INBF INBR
HBB
VMB HBBF HBBR VDD
OE
Control Logic
Gate Driver and Level Shifter
PGND
HBC
VMC HBCF
INCF INCR
HBCR PGND
HBD
VMD INDF INDR HBDF HBDR PGND
Figure 2. 17550 Simplified Internal Block Diagram
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Analog Integrated Circuit Device Data Freescale Semiconductor
TERMINAL CONNECTIONS
TERMINAL CONNECTIONS
AGND NC PSB OE VMA HBAF PGND HBAR VMA VMB HBBR PGND HBBF VMB INAR INAF INBF INBR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
VG VDD LX GND VMC HBCF PGND HBCR VMC VMD HBDR PGND HBDF VMD INCR INCF INDF INDR
Figure 3. 17550 Terminal Connections Table 1. Terminal Function Description
Terminal 1 2 3 4 5, 9 6 8 10, 14 11 7, 12, 25, 30 13 15 16 17 18 19 20 21 22 23, 27 24 26 28, 32 Terminal Name AGND NC PSB OE VMA HBAF HBAR VMB HBBR PGND HBBF INAR INAF INBF INBR INDR INDF INCF INCR VMD HBDF HBDR VMC Formal Name Analog Ground No Connect Power Standby Output Enable Definition Analog and logic signal ground reference terminal. No connection to this terminal. Power standby mode control terminal. Logic output Enable control of H-Bridges (Low = True).
Motor Drive Power Supply A Power supply voltage connection for Motor “A” (top of HBA). HBA Forward Output HBA Reverse Output Forward output of H-Bridge A. Reverse output of H-Bridge A.
Motor Drive Power Supply B Power supply voltage connection for Motor “B” (top of HBB). HBB Reverse Output Power Ground HBB Forward Output Input Control HBA Reverse Reverse output of H-Bridge B. Power ground connection. Forward output of H-Bridge B. Control signal input for H-Bridge A reverse.
Input Control HBA Forward Control signal input for H-Bridge A forward. Input Control HBB Forward Control signal input for H-Bridge B forward. Input Control HBB Reverse Input Control HBD Reverse Input Control HBD Forward Control signal input for H-Bridge B reverse. Control signal input for H-Bridge D reverse. Control signal input for H-Bridge D forward.
Input Control HBC Forward Control signal input for H-Bridge C forward. Input Control HBC Reverse Control signal input for H-Bridge C reverse.
Motor Drive Power Supply D Power supply voltage connection for Motor “D” (top of HBD). HBD Forward Output HBD Reverse Output Forward output of H-Bridge D. Reverse output of H-Bridge D.
Motor Drive Power Supply C Power supply voltage connection for Motor “C” (top of HBC).
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TERMINAL CONNECTIONS
Table 1. Terminal Function Description (continued)
Terminal 29 31 33 34 35 36 Terminal Name HBCR HBCF GND LX VDD VG Formal Name HBC Reverse Output HCB Forward Output Ground Reverse Output of H-Bridge C. Forward Output of H-Bridge C. Control circuit ground terminal for DC/DC circuit ground. Definition
DC/ DC Converter Switching Open-drain output of the internal DC/ DC converter circuit. Transistor Output Logic Supply Gate-Driver Circuit Power Supply Control circuit power supply terminal. Input terminal for the gate-drive voltage.
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ELECTRICAL CONNECTIONS MAXIMUM RATINGS
ELECTRICAL CONNECTIONS
MAXIMUM RATINGS
Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding the ratings may cause a malfunction or permanent damage to the device.
Rating Motor Supply Voltage Gate-Driver Circuit Power Supply Voltage Logic Supply Voltage Signal Input Voltage
(1)
Symbol VM VG VDD VIN IO IOPK
Value -0.5 to 9.0 VDD - 0.5 to 14 -0.5 to 6.0 -0.5 to VDD + 0.5 0.7 2.0
Unit V V V V A
Driver Output Current Continuous Peak (3) ESD Voltage
(4) (2)
V VESD1 VESD2 TSTG TA TJ RθJA PD
(7)
Human Body Model Machine Model Storage Temperature Range Operating Ambient Temperature Operating Junction Temperature Thermal Resistance Power Dissipation
(5)
± 2000 ± 100 -65 to 150 -10 to 60 -10 to 150 TBD 1500 260 °C °C °C °C/W mW °C
(6)
Soldering Temperature
TSOLDER
Notes 1. VIN is the voltage level applied to any input terminal. 2. 3. 4. 5. 6. 7. IO is measured as the load current flowing through the H-bridge. TA = 25°C, pulse width < 10 ms at intervals > 0.2 seconds. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω), ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω). Mounted on 37 x 50 Cu area (1.6 mm FR-4 PCB). Maximum at TA = 25°C. Soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device.
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ELECTRICAL CONNECTIONS STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions TA = 25°C, VDD = 3.0 V, VM = 2.5 V, GND = 0 V, fIN = 176 kHz unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic POWER Motor Supply Voltage Logic Supply Voltage Standby Power Supply Current
(8)
Symbol
Min
Typ
Max
Unit
VM VDD I V I MSTBY VDDSTBY IV
DD
1.6 2.5 – – –
2.5 3.0 – – 0.3
5.5 5.5 1.0 1.0 1.0
V V µA
Motor Supply Standby Current Logic Supply Standby Current Logic Supply Current Gate Driver Circuit Power Supply Current (9) Standby (PSB = “L”) No Signal Operating Input Signal Operating (10) Driver Output ON Resistance (11) GATE DRIVE Gate Driver Circuit Power Supply Voltage (12) CONTROL LOGIC Logic Input Voltage (13) Logic Input (F, R, PSB, OE) High-Level Input Voltage Low-Level Input Voltage High-Level Input Current Low-Level Input Current
mA µA µA mA Ω
IDDC0 IDDCN IDDC RDS(ON)
– – – –
– 1.0 19 0.7
1.0 3.0 25 1.2
VG
10
11.5
13
V
VIN VIH VIL IIH IIL
0
–
VDD
V
VDD x 0.7 – – -1.0
– – – –
– VDD x 0.3 1.0 –
V V µA µA
Notes 8. Applies individually to each H-Bridge. 9. Average inductor current for DC/ DC converter (connected between VDD and LX [L = 1.0 mH, C = 2.2 µF]). 10. 11. 12. 13. Full drive (input signal to all input control terminals). The total H-bridge ON resistance when VG is 11.5 V. When voltage is supplied externally without built-in DC/ DC. VIN is the voltage level applied to any input.
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ELECTRICAL CONNECTIONS DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. DYNAMIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions TA = 25°C, VDD = 3.0 V, VM = 2.5 V, GND = 0 V, fIN = 176 kHz unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic INPUT Pulse Input Frequency (14) Internal Oscillator Frequency OUTPUT Gate Driver Circuit Power Supply Wake-Up Time Propagation Delay Time Turn-ON Time Turn-OFF Time Notes 14. fIN is the signal frequency applied to an input terminal (F, R). Symbol Min Typ Max Unit
f IN f OSC
– –
– 100
200 200
kHz kHz
t VGON t PLH t PHL
–
10
20
ms µs
– –
0.2 0.2
1.0 1.0
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ELECTRICAL CONNECTIONS TIMING DIAGRAMS
TIMING DIAGRAMS
VIH 2.1 V PSB VIL 10 V FO, RO VG 50% 50% F, R,
tPLH
tPHL
tVGON Figure 4. DC/DC Converter Output Waveform Table 5. Truth Table
PSB, OE PSB H H H H H L H = High. L = Low. Z = High impedance. X = Don’t care. * = A, B, C, or D. OE L L L L H X IN*F L L H H X X INA / INB / INC / IND IN*R L H L H X X HBA / HBB / HBC / HBC HB*F L L H Z Z Z HB*R L H L Z Z Z
Figure 5. H-Bridge Output Waveform
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FUNCTIONAL DESCRIPTION INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 17550 is a monolithic quad H-Bridge ideal for portable electronic applications containing multiple bipolar stepper motors and / or brush DC motors. The device features an onboard DC / DC converter to provide gate-drive voltages, as well as level-shifting circuitry. The control logic translates the input signals to the gate-driver circuitry while providing crossconduction suppression. The 17550 has four operating modes: Forward, Reverse, Brake, and Tri-Stated (High Impedance). The MOSFETs comprising the output bridge have a total source + sink RDS(ON) ≤ 1.2 Ω. The 17550 can simultaneously drive four brush DC motors or two bipolar stepper motors. The drivers are designed to be PWM’ed at frequencies up to 200 kHz.
FUNCTIONAL TERMINAL DESCRIPTION LOGIC SUPPLY (VDD)
The VDD terminal carries the logic supply voltage and current into the logic sections of the IC. VDD has an undervoltage threshold. If the supply voltage drops below the undervoltage threshold, the output power stage switches to a tri-state condition. When the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input control terminals.
POWER SUPPLY VOLTAGE CONNECTION FOR MOTORS A, B, C, D (VMA, VMB, VMC, VMD)
The VM terminals carry the main supply voltage and current into the power sections of the 17550. This supply then becomes controlled and/or modulated by the 17550 as it delivers the power to the loads attached between the H-Bridge output terminals. All VM terminals must be connected together on the printed circuit board.
CONTROL SIGNAL INPUT FOR H-BRIDGE, F=FORWARD, R= REVERSE (INAF, INAR, INBF, INBR, INCF, INCR, INDF, INDR)
These logic input control terminals control each H-Bridge output; e.g., IN*F logic HIGH = HB*F HIGH; likewise, IN*R logic HIGH = HB*R HIGH. However, if both “F” and “R” inputs are taken HIGH, the associated bridge’s outputs are both tristated (refer to Table 5, Truth Table, page 8).
DC/ DC CONVERTER SWITCHING TRANSISTOR OUTPUT (LX)
The LX terminal is the open-drain output of the internal DC / DC converter circuit. It is the junction for the external inductor and the anode of the external Schottky diode.
GATE-DRIVER CIRCUIT POWER SUPPLY (VG)
The VG terminal is the input terminal for the gate-drive voltage. It can be supplied from the built-in DC / DC converter or from an external source.
OUTPUT ENABLE (OE)
OE terminal is a LOW = TRUE enable input. When OE = HIGH, all H-Bridge outputs are tri-stated (high
GROUND TERMINALS (GND, AGND, PGND)
All ground terminals must be tied together on the PCB.
impedance) regardless of logic inputs states.
POWER STANDBY MODE CONTROL (PSB) OUTPUT OF H-BRIDGE, R=REVERSE, F=FORWARD (HBAF, HBAR, HBBF, HBBR, HBCF, HBCR, HBDF, HBDR)
These terminals provide connection to the outputs of each of the internal H-Bridges (see Figure 2, 17550 Simplified Internal Block Diagram, page 2). The PSB input controls the functioning of power output stages (the H-Bridges). When this input signal turns Low, the output stages and Internal DC/DC Converter which makes Gate Voltage are disabled and all the outputs are opened (High Impedance). When this input signal turns High, the output stages and Internal DC/DC Converter are enabled and the H-Bridges operate normally.
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TYPICAL APPLICATIONS INTRODUCTION
TYPICAL APPLICATIONS
INTRODUCTION
The 17550's built-in DC / DC converter must be connected to an external inductor, rectifier, and filter capacitor. This step-up converter generates the gate-drive voltage, VG, required by the internal gate driver circuits. Although there is some latitude in selecting the values for the external component, care must be taken that VG does not exceed 14 V. Additionally, too low an inductance will cause large instantaneous switching currents, which may damage the device. Important Do not use an inductance lower than 330 µH. To attain high-efficiency operation, the rectifier should be a Schottky diode, and the filter capacitor should be of the low Equivalent Series Resistance (ESR) type. Attention should be paid to proper switch mode power supply PCB layout practice. Some experimentation may be required to determine optimal external component values. The recommended starting values are L = 1.0 mH, C = 2.2 µF. The DC / DC converter includes its own internal oscillator and does not require an external clock input.
TYPICAL APPLICATION
Two typical application schematics are shown in Figure 6. and Figure 7.
VM = 2.5 V
47 µF
VDD = 3.0 V
10 µF
17550
VM VDD LX OE PSB VG
2.2 µF L = 1.0 mH
INAF INAR
HBAF HBAR
N S
MCU
INBF INBR
HBBF HBBR
INCF INCR
HBCF HBCR
N S
HBDF INDF INDR HBDR GND
Figure 6. Typical 17550 Application - Controlling Stepper Motors
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Analog Integrated Circuit Device Data Freescale Semiconductor
TYPICAL APPLICATIONS INTRODUCTION
VM = 2.5 V
47 µF
VDD = 3.0 V
17550
VM VDD LX OE PSB VG VG 11.5V
INAF INAR
HBAF HBAR
N S
MCU
INBF INBR
HBBF HBBR
INCF INCR
HBCF HBCR
N S
HBDF INDF INDR HBDR GND
Figure 7. Typical 17550 Application - No Internal DC-DC Used
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TYPICAL APPLICATIONS INTRODUCTION
CEMF SNUBBING TECHNIQUES
Care must be taken to protect the IC from potentially damaging CEMF spikes induced when commuting currents in inductive loads. Typical practice is to provide snubbing of voltage transients by placing a capacitor or zener at the motor supply voltage terminal (VM) (see Figure 8).
5.0 V 5.0 V 175XX VDD VM C1L C1H C2L C2H CRES OUT GND OUT 5.0 V 5.0 V 175XX VDD VM C1L C1H C2L C2H CRES OUT GND OUT
Figure 8. CEMF Snubbing Techniques
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PACKAGING PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
Important: For the most current revision of the package, visit www.freescale.com and perform a keyword search on the 98A number listed below.
1.90 1.70
B
1.20±0.10
36
5
19
1.35±0.10
NPJ IA
(JPN)/CAVITY #(A1) BOTTOM SIDE
5.40 5.20
3 4
1.20±0.10
1
18
4X R0.40±0.10
1.30±0.10 12.70 12.50
2X
VIEW Y 3 4 A
VIEW K
12˚±1˚ R0.15±0.10 12˚±1˚
36X
0.10 C
1.90 1.70
0.25
GUAGE PLANE
SEATING PLANE
14˚±1˚
2X
R0.15±0.10
0.27 36X 0.37
0.13 M CAB
C
0.20 0.00
14˚±1˚ 0˚- 8˚ 0.60±0.20 0.69±0.20
4 0.37 0.27
0.13 M
R R BASE METAL
VIEW K
VIEW ROTATED 90˚ CW
CAB
NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.5 MM PER END. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.5 MM PER SIDE. 4. DIMENSIONS ARE DETERMINED AT THE OUTMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERNCE ONLY.
0.325
34X
0.27 (0.20) 0.15
0.65 VIEW Y
PLATING
(0.30)
SECTION R-R
CASE 1522-01 ISSUE O
EV (Pb-FREE) SUFFIX 36-LEAD VMFP PLASTIC PACKAGE CASE 1522-01 ISSUE O
DATE 10/01/03
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Analog Integrated Circuit Device Data Freescale Semiconductor
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REVISION HISTORY
REVISION HISTORY
REVISION 2.0
DATE 7/2006
DESCRIPTION OF CHANGES
• Converted to Freescale format and updated to the prevailing form and style • Added typical Application for non DC/DC use • Added RoHS compliance
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MPC17550 Rev. 2.0 7/2006