33394

Freescale Semiconductor,Order this document from Analog Marketing Inc. Rev. 2.5, 11/2002 Switch Mode Power Supply with Multiple Linear Regulators and High Speed CAN Transceiver The 33394 is a multi–output power supply integrated circuit with high speed CAN transceiver. The IC incorporates a switching pre–regulator operating over a wide input voltage range from +4.0V to +26.5V (with transients up to 45V). The switching regulator has an internal 3.0A current limit and runs in both buck mode or boost mode to always supply a pre–regulated output followed by Low Drop Out (LDO) regulators: VDDH / 5.0V @ 400mA; VDD3_3 / 3.3V @ 120mA; VDDL / 2.6V (User scalable between 3.3V – 1.25V) @ 400mA typically, using an external NPN pass transistor. The Keep Alive regulator VKAM (scalable) @ 50mA; FLASH memory programming voltage VPP / 5.0V or 3.3V @ 150mA; three sensor supply outputs VREF(1,2,3) / 5.0V (tracking VDDH) @ 100mA each; and a switched battery output (VSEN) to supply 125mA clamped to 17V. Additional features include Active Reset circuitry watching VDDH, VDD3_3, VDDL and VKAM, user selectable Hardware Reset Timer (HRT), Power Sequencing circuitry guarantees the core supply voltages never exceed their limits or polarities during system power up and power down. A high speed CAN transceiver physical layer interfaces between the microcontroller CMOS outputs and differential bus lines. The CAN driver is short circuit protected and tolerant of loss of battery or ground conditions. 33394 is designed specifically to meet the needs of modules, which use the MPC565 microcontroller, though it will also support others from the MPC5XX family of Motorola microcontrollers. Features: • Wide operating input voltage range: +4.0V to +26.5V (+45V transient). 33394 MULTI–OUTPUT POWER SUPPLY SEMICONDUCTOR TECHNICAL DATA Freescale Semiconductor, Inc... 44–Lead HSOP DH SUFFIX CASE 1291 44–Lead QFN FC SUFFIX CASE 1310 (BOTTOM VIEW) • • • • • • Provides all regulated voltages for MPC5XX MCUs and other ECU’s logic and analog functions. Accurate power up/down sequencing. Provides necessary MCU support monitoring and fail–safe support. Provides three 5.0 V buffer supplies for internal & external (short–circuit protected) sensors. Includes step–down/step–up switching regulator to provide supply voltages during different battery conditions. Interfaces Directly to Standard 5.0V I/O for CMOS Microprocessors by means of Serial Peripheral Interface. PIN CONNECTIONS INV VCOMP VPRE VPRE_S VDDH VREF2 VREF3 DO SCLK DI CS VBAT VBAT KA_VBAT VIGN VKAM /SLEEP VKAM_FB HRT VSEN CANH REGON CANL WAKEUP GND VREF1 CANTXD VPP_EN CANRXD VPP /PORESET VDD3_3 /HRESET VDD3_3FB /PRERESET VDDL_X VDDL_FB VDDL_B VDDL_FB /PRERESET /HRESET /PORESET CANRXD CANTXD 1 SW1 SW1 SW1 BOOT SW2G GND INV VCOMP VPRE VPRE_S VDDH VREF2 VREF3 DO SCLK DI CS /SLEEP HRT CANH CANL GND 54–Lead SOICW–EP DWB SUFFIX CASE 1377 PIN CONNECTIONS GND CANL CANH HRT /SLEEP N/C CS DI SCLK DO N/C VREF3 VREF2 VDDH VPRE_S VPRE VCOMP INV GND SW2G BOOT N/C SW1 SW1 SW1 SW1 SW1 1 CANTXD CANRXD /PORESET /HRESET /PRERESET N/C VDDL_FB VDDL_B VDDL_X VDD3_3FB VDD3_3 VPP VPP_EN VREF1 WAKEUP REGON VSEN VKAM_FB VKAM VIGN N/C KA_VBAT VBAT VBAT VBAT VBAT VBAT GND SW2G BOOT SW1 SW1 SW1 VBAT VBAT KA_VBAT VIGN VKAM 1 SOICW QFN HSOP This document contains information on a new product. Specifications and information herein are subject to change without notice. For More Information On This Product, © Motorola, Inc. 2002 Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com VKAM_FB VSEN REGON WAKEUP VREF1 VPP_EN VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B TOP VIEW 1 Freescale Semiconductor, Inc. 33394 To Q3 Dp1 + – KA_VBAT 3 ON Control OFF 10 nF 2.6 V VKAM VKAM Keep–Alive Adj. Volt. 60 mA I–Lim 4.7 k VIGN 4 Lf1 6.8 H Figure 1. 33394DH – Simplified Block Diagram and Typical Application VBAT SW1 42–44 Oscillator Feed Forward Ramp Generator Cb 100 nF Buck Control Logic Boost + – 40 k + – – + Vbg High–Side Drive Low–Side Drive BOOT 41 SW2G 40 39 GND Q1 m L1 47 H m D2 VPRE 5.6 V + Dp2 Cf1 10 F m + 1, 2 Cf2 100 F m C1 100 F m + D1 MTD20N03HDL + 10 nF 22 k 5 22 F Freescale Semiconductor, Inc... m VKAM_FB 20 k 6 INV 38 Cc3 3.3 nF Rc2 100 k Cc2 Rc3 430R 11.7 k 100 pF Cc1 VSEN 7 REGON 8 WAKEUP 9 5.0 V VREF1 VSEN VBAT Volt. 125 mA T–Lim, I–Lim CANRXD Sleep VREF1 5.0 V 100 mA LDO T–Lim, I–Lim CAN Wakeup Logic Vbg VPP 5.0 V/3.3 V 150 mA LDO T–Lim, I–Lim Band Gap Reference VREF2 5.0 V 100 mA LDO T–Lim, I–Lim VDDH 5.0 V 400 mA LDO T–Lim, I–Lim Enable VCOMP 1.0 nF 37 36 35 VPRE VPRE_S VDDH 34 47 F 5.0 V + 10 nF 10 1.0 F VPP_EN m m + 10 nF 5.0 V/3.3 V VPP 11 VREF2 33 1.0 F 5.0 V + 10 nF 12 47 F VDD3_3 13 VDD3_FB m m + 10 nF 3.3 V 10 nF 47 F m + 14 VQ3 VDD3_3 3.3 V 120 mA LDO, Pass T–Lim, I–Lim Standby Control VREF3 5.0 V 100 mA LDO T–Lim, I–Lim VREF3 32 1.0 F 5.0 V VPRE m + 10 nF Q2 MJD31C VDDL 2.6 V Q3 MJD31C VDDL_B VDDL Drive Adj. Volt. VDDL_X 40 mA 16 VDDL_FB Dual Pass T–Lim 17 15 18 Reset Detection VDDH, VDD3_3, VDDL 16 Bit SPI Control Fault Rep. 31 30 29 28 DO SCLK DI CS VDDH 5.0 V + 10 nF 47 F 100R m 110R /PRERESET Sleep 27 High–Speed CAN Transceiver HRT POR Timer 26 /SLEEP 47 k /HRESET 19 /PORESET 20 10 k 10 k 10 k 1.0 F 21 CANRXD 22 23 24 25 CANL m Notes: Notes: Notes: Notes: CANH CANTXD 120 R GND 1. In this configuration the device can operate with a minimum input voltage VBAT of 4.0 V (voltage at 33394 VBAT pins). 2.VDDL and VKAM are adjustable to support current microprocessor technology (1.25 V to 3.3 V) by means of an external resistor divider. 3. When the 33394 CAN transceiver is not used, CANL and CANH pins can be shorted together. 4. Dp1 = reverse battery protection diode. Dp2 = load dump protection diode. Dp1, Dp2 can be ommitted in those applications which do not require such protection. VKAM 2.6 V 2 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 PIN FUNCTION DESCRIPTION (44–HSOP Package) PIN NO. 1 2 3 4 5 6 7 8 9 10 11 NAME VBAT VBAT KA_VBAT VIGN VKAM VKAM_FB VSEN REGON WAKEUP VREF1 VPP_EN VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B VDDL_FB /PRERESET /HRESET /PORESET CANRXD CANTXD GND CANL CANH HRT /SLEEP CS DI SCLK DO VREF3 VREF2 VDDH VPRE_S VPRE VCOMP INV GND SW2G BOOT SW1 SW1 SW1 DESCRIPTION Battery supply to IC (external reverse battery protection needed in some applications) Battery supply to IC (external reverse battery protection needed in some applications) Keep alive supply (with internal protection diode) Turn–On control through ignition switch (with internal protection diode) VDDL tracking Keep Alive Memory (Standby) supply VKAM output feedback Switched battery output Regulator “Hold On” input CAN wake up event output VDDH tracking linear regulator 1 VPP enable 5.0 V/ 3.3 V FLASH memory programming supply, tracking VDDH/VDD3_3 3.3 V regulated supply output, base drive for optional external pass transistor VDD3_3 output feedback VDDL optional external pass transistor base drive, operating in Boost Mode only VDDL external pass transistor base drive VDDL output feedback Open drain /PRERESET output, occurs 0.7 us prior to /HRESET (Hardware Reset) Open drain / HRESET (Hardware Reset) output Open drain / PORESET (Power On Reset) supervising VKAM supply to the microprocessor. CAN receive data (DOUT) CAN transmit data (DIN) Ground CAN differential bus drive low line CAN differential bus drive high line Hardware Reset Timer pin (programmed with external capacitor and resistor) Sleep Mode & Power Down control SPI chip select SPI serial data in SPI clock input SPI serial data out VDDH tracking linear regulator 3 VDDH tracking linear regulator 2 5.0 V regulated supply output Switching pre–regulator output sense Switching pre–regulator output Switching pre–regulator compensation (error amplifier output) Switching pre–regulator error amplifier inverting input Ground External power switch (MOSFET) gate drive — Boost regulator Bootstrap capacitor Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Freescale Semiconductor, Inc... 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 NOTE: The exposed pad of the 44 HSOP package is electrically and thermally connected with the IC ground. Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 3 Freescale Semiconductor, Inc. 33394 PIN FUNCTION DESCRIPTION (44–QFN Package) PIN NO. 1 2 3 4 5 6 7 8 9 10 11 NAME GND SW2G BOOT SW1 SW1 SW1 VBAT VBAT KA_VBAT VIGN VKAM VKAM_FB VSEN REGON WAKEUP VREF1 VPP_EN VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B VDDL_FB /PRERESET /HRESET /PORESET CANRXD CANTXD GND CANL CANH HRT /SLEEP CS DI SCLK DO VREF3 VREF2 VDDH VPRE_S VPRE VCOMP INV Ground External power switch (MOSFET) gate drive — Boost Reg. Bootstrap capacitor Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Battery supply to IC (external reverse battery protection needed in some applications) Battery supply to IC (external reverse battery protection needed in some applications) Keep alive battery supply (with internal protection diode) Turn on control through ignition switch (with internal protection diode) VDDL tracking Keep Alive Memory (Standby) supply VKAM output feedback Switched battery output Regulator “Hold On” input CAN wake up event output VDDH tracking linear regulator 1 VPP enable 5.0 V/ 3.3 V FLASH memory programming supply, tracking VDDH/VDD3_3 3.3 V regulated supply output, base drive for optional external pass transistor VDD3_3 output feedback VDDL optional external pass transistor base drive, operating in Boost Mode only VDDL external pass transistor base drive VDDL output feedback Open drain /PRERESET output, occurs 0.7 us prior to /HRESET (Hardware Reset) Open drain / HRESET (Hardware Reset) output Open drain / PORESET (Power On Reset) supervising VKAM supply to the microprocessor. CAN receive data (DOUT) CAN transmit data (DIN) Ground CAN differential bus drive low line CAN differential bus drive high line Hardware Reset Timer pin (programmed with external capacitor and resistor) Sleep Mode & Power Down control SPI chip select SPI serial data in SPI clock input SPI serial data out VDDH tracking linear regulator 3 VDDH tracking linear regulator 2 5.0 V regulated supply output Switching pre–regulator output sense Switching pre–regulator output Switching pre–regulator compensation (error amplifier output) Switching pre–regulator error amplifier inverting input DESCRIPTION Freescale Semiconductor, Inc... 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 NOTE: The exposed pad of the 44 QFN package is electrically and thermally connected with the IC ground. 4 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 PIN FUNCTION DESCRIPTION (54 SOICW–EP Package) PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NAME GND CANL CANH HRT /SLEEP N/C CS DI SCLK DO N/C VREF3 VREF2 VDDH VPRE_S VPRE VCOMP INV GND SW2G BOOT SW1 SW1 SW1 SW1 SW1 VBAT VBAT VBAT VBAT VBAT KA_VBAT N/C VIGN VKAM VKAM_FB VSEN REGON WAKEUP VREF1 VPP_EN VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B VDDL_FB N/C /PRERESET /HRESET /PORESET CANRXD CANTXD Ground CAN differential bus drive low line CAN differential bus drive high line Hardware Reset Timer pin (programmed with external capacitor and resistor) Sleep Mode & Power Down control No Connect SPI chip select SPI serial data in SPI clock input SPI serial data out No Connect VDDH tracking linear regulator 3 VDDH tracking linear regulator 2 5.0 V regulated supply output Switching pre–regulator output sense Switching pre–regulator output Switching pre–regulator compensation (error amplifier output) Switching pre–regulator error amplifier inverting input Ground External power switch (MOSFET) gate drive — Boost regulator Bootstrap capacitor Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Source of the internal power switch (n–channel MOSFET) Battery supply to IC (external reverse battery protection needed in some applications) Battery supply to IC (external reverse battery protection needed in some applications) Battery supply to IC (external reverse battery protection needed in some applications) Battery supply to IC (external reverse battery protection needed in some applications) Battery supply to IC (external reverse battery protection needed in some applications) Keep alive supply (with internal protection diode) No Connect Turn–On control through ignition switch (with internal protection diode) VDDL tracking Keep Alive Memory (Standby) supply VKAM output feedback Switched battery output Regulator “Hold On” input CAN wake up event output VDDH tracking linear regulator 1 VPP enable 5.0 V/ 3.3 V FLASH memory programming supply, tracking VDDH/VDD3_3 3.3 V regulated supply output, base drive for optional external pass transistor VDD3_3 output feedback VDDL optional external pass transistor base drive, operating in Boost Mode only VDDL external pass transistor base drive VDDL output feedback No Connect Open drain /PRERESET output, occurs 0.7 us prior to /HRESET (Hardware Reset) Open drain / HRESET (Hardware Reset) output Open drain / PORESET (Power On Reset) supervising VKAM supply to the microprocessor. CAN receive data (DOUT) CAN transmit data (DIN) DESCRIPTION Freescale Semiconductor, Inc... 15 16 17 18 19 20 21 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 NOTE: The exposed pad of the 54 SOICW–EP package is electrically and thermally connected with the IC ground. Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 5 Freescale Semiconductor, Inc. 33394 1. MAXIMUM RATINGS (Maximum Ratings indicate sustained limits beyond which damage to the device may occur. Voltage parameters are absolute voltages referenced to ground.) Parameter Supply Voltage (VBAT), Load Dump Supply Voltage (KA_VBAT, VIGN), Load Dump Supply Voltages (VDDH, VPP, VDD3_3, VDDL, VKAM) Supply Voltages (VREF1, VREF2, VREF3, VSEN) CANL, CANH (0VppCo The inductor peak current can be calculated as follows: IpkL Where: Io is the average output current. VppCo + (Vo * Vfwd) L toff Freescale Semiconductor, Inc... Buck Mode One switching cycle of the step–down converter operation has two distinct parts: the power switch on state and the off state. When the power switch is on, one inductor terminal is connected to the input voltage Vin, and the other inductor terminal is the output voltage Vo. During this part of the switching period the rectifier (catch diode) is back biased, and the current ramps up through the inductor to the output: iL(on) Where: ton is the on–time of the power switch. Vin is the input voltage. Vo is the output voltage. iL(on) is the inductor current during the on–time. L is the inductance of the inductor L. During the on time, current ramping through the inductor stores energy in the inductor core. During the off time of the power switch, the input voltage source Vin is disconnected from the circuit. The energy stored in the core forces current to continue to flow in the same direction, the rectifier is forward biased and the + (Vin * Vo) L ton D + 8CoIL + + Io ) 1 DIL 2 26 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 IQ Q ID Vin D IL L + CO – VO RLOAD DIL + IL IO IQ L ILO + + ILOAD Vout – VD Vfwd –ID RLOAD Vin POWER SWITCH ON CO Freescale Semiconductor, Inc... ILO + VD(fwd) CO Vout + ILOAD RLOAD VCo ton T toff t POWER SWITCH OFF – Figure 13. Basic Buck Converter Operation and its Waveforms Boost Mode The operation of the boost converter also consists of two parts, when the power switch is on and off. When the power switch turns on, the input voltage source is placed directly across the inductor, and the current ramps up linearly through the inductor as described by: iL(on) Where: ton is the on–time of the power switch. Vin is the input voltage. iL(on) is the inductor current during the on–time. L is the inductance of the inductor L. The current ramping across the inductor stores energy within the core material. In order to maintain steady–state operation, the amount of energy stored during each switching cycle, times the frequency of operation must be higher (to cover the losses) than the power demands of the load: Psto Where: Where: iL(off) in + (Vo * VL ) toff toff is the off–time of the power switch. Vo is the output voltage. During the steady state operation iL(on) = iL(off) = ∆IL, and d + Vin L ton * + Vo VoVin d is the duty cycle, and d = ton/T. T is switching period, T = 1/f. f is the frequency of operation. The ripple voltage of the boost converter can be described as: VppCo Where: VppCo is the ripple caused by output current. The portion of the output ripple voltage caused by the ESR of the output capacitor is: VppESR I + Coo ( Vo + 1 LI pk f u Pout 2 2 * Vin) f Vo When the power switch turns off again, the inductor voltage flies back above the input voltage and is clamped by the forward biased rectifier at the output voltage. The current ramps down through the inductor to the output until the new on time begins or, in case of discontinuous mode of operation, until the energy stored in the inductor core drops to zero. + (Io Vo Vin ) 1 DIL) 2 RESR Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 27 Freescale Semiconductor, Inc. 33394 Where Io is the average output current. The inductor peak current is given by the following equation: IL L Q Vin IQ ID D + CO – VO RLOAD IpkL + Io Vo Vin ) 1 DIL 2 DIL + IL ID IO + + ILOAD IQ RLOAD Freescale Semiconductor, Inc... ION Vin L Vout CO – POWER SWITCH ON VQ IL IOFF VIN POWER SWITCH OFF Vout + CO + ILOAD RLOAD VCo ton T toff t – Figure 14. Basic Boost Converter Operation and its Waveforms 5.2.1. Switching Regulator Component Selection The selection of the external inductor L2 and capacitor C2 values (see Figure 15) is a compromise between the two modes of operation of the switching regulator, the pre regulated voltage VPRE and the dropout voltage of the linear regulators. Ideal equations describing the peak—peak inductor current ripple, peak—peak output voltage ripple and peak inductor current are shown below. Since the switching regulator will work mostly in the buck mode, the inductor and the switcher input and output capacitor were selected for optimum buck controller performance, but also taking into account the restriction placed by adopting the boost converter as well. IQ Q1 VRDS(on) RDS(on) D1 Vin VRL RL Vfwd1 IL L Vfwd2 D2 ESR Q2 + CO – 5.6 V and the linear regulators require a minimum of 0.4 V dropout voltage. This leaves a ±0.2 V window for the peak—to–peak output voltage ripple. Assuming the following conditions: Vin(typ) = 13.5 V Io = 1.2 VPRE = 5.6 V (+6 V in the boost mode) f = 200 kHz Vfwd1 = Vfwd2 = 0.5 V Maximum allowed output voltage ripple in the buck mode Vpp(max) = 0.2 V/2 = 0.1 V (to allow for process and temperature variations). + RLOAD VO 5.2.1.1. Selecting the Inductor In order to select the proper inductance value, the inductor ripple current ∆IL has to be determined. The usual ratio of ∆IL to output current Io is: ∆IL = 0.3 Io As described in the previous section, and taking into account the 33394 switcher topology (see Figure 15), the inductor ripple current can be estimated as: Figure 15. 33394 Switcher Topology The following example shows a procedure for determining the component values. The VPRE output is set to regulate to DIL + (Vin * Vo * Vfwd2) L Vo Vfwd2 Vin f ) 28 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 After substitution, the calculated inductance value is L = 45 µH, which gives 47 µH standard component value. The peak–to peak ripple current value is: ∆IL = 0.345 A. The peak inductor current is given by: ILpk = 0.5∆IL + Io = 0.5x0.345 + 1.2 = 1.37[A] The inductor saturation current is given by the upper value of the 33394 internal switch current limit Ilim(max) = 3.0 A. Considering also the inductor serial resistance, these requirements are met, for example by the PO250.473T inductor from Pulse Engineering, Inc. VppESR = ∆IL x RESR = 0.345 x 0.08 = 28 [mV] One device that meets both, the low ESR, and the temperature stability requirements is, for example, the TPSV107K020R0085 tantalum capacitor from AVX Corp. Boost Converter Power Capability The boost converter with selected components has to be able to deliver the required power. Due to the nature of this non–compensated PFM control technique, the Boost converter output ripple voltage is higher than if it utilized a typical PWM control method. Therefore the switcher output voltage level is set higher than in the Buck mode (in the Boost mode VPRE = +6 V), in order to maintain a sufficient dropout voltage for the 5–volt linear regulators (VDDH, VREFs) and to avoid unwanted Resets to the microcontroller. The most stringent conditions for the 33394 boost converter occur with the lowest input voltage: Vin(min) = 3.5 V Io = 0.8 A Vpre = +6 V f = 200 kHz Vfwd1 = Vfwd2 = 0.5 V d = 0.75, duty cycle is fixed at 75% in boost mode 5.2.1.2. Selecting the Catch Diode D1 The rectifier D1 current capability has to be greater than calculated average current value. The maximum reverse voltage stress placed upon this rectifier D1 is given by maximum input voltage (maximum transient battery voltage). These requirements are met, for example by the HSM350 (3 A, 50 V) schottky diode from Microsemi, Inc. Freescale Semiconductor, Inc... 5.2.1.3. Selecting the Output Capacitor The output capacitor Co should be a low ESR part, therefore the 100 µF tantalum capacitor with 80 mΩ ESR was chosen. From the formula for calculating the ripple voltage: VRES RD IL L IQ Vfwd2 D2 ESR Q2 Vin + CO – VO + IL ILIM I01 I02 RLOAD L1 > L2 DIL1 < DIL2 IO1 > IO2 T IL1 IL2 t Figure 16. 33394 Switcher Topology – Boost Mode The input voltage drop associated with the resistance of the internal switch Q1 and inductor series resistance can be estimated as: VD Where: VD is the voltage dissipated on the major parasitic resistances, RDSon of the internal power switch and inductor series resistance RL. For the worst case conditions: RD = RDSon(max) + RL = 0.25 + 0.1 = 0.35[Ω] Ipk(min) is the minimum internal power switch current limit value. Then the equation for calculating ∆IL can be modified as follows: Then the maximum average input current can be calculated as: IinAve [ Ipk(min) RD + 2.5 A 0.35 W + 0.875 V + Ipk(min) * 1 DIL + 2.5 * 0.125 + 2.43[A] 2 2 h u Pout Finally, the boost converter power capability has to be higher than the required output power or: Pin(max) Where Pin(max) is the boost converter maximum input power: h is the boost converter efficiency, in our case h is estimated to be h = 85%, and includes switching losses of the external power switch Q2 (MOSFET) inductor and capacitors AC losses, and output rectifier D2 (schottky) switching losses. Pout is the boost converter output power, which includes power loss of the output rectifier D2: Pout + 3.5 * 0.875 47 10 * 6 DIL + Vin * VD L + 125[mA] ) Vfwd2) * (Vin * VD)] d + (Vo ) Vfwd2) f [(6 ) 0.5) * (3.5 * 0.875)] 0.75 (6 ) 0.5) 0.2 10 [(Vo 6 + (Vo ) Vfwd2) Io + (6 ) 0.5) 0.8 + 5.2[W] Pin + (Vin * VD) IinAve h + + (3.5 * 0.875) 2.43 0.85 + 5.42[W] As can be seen, the boost converter input power capability meets the required criteria. Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 29 Freescale Semiconductor, Inc. 33394 5.2.1.4. Selecting the Power MOSFET Q2 The boost converter maximum output voltage plus the voltage drop across the output schottky rectifier D2 gives the MOSFET’s maximum drain–source voltage stress: BVdsQ2>Vo+Vfwd2 = 6 V+0.5 V, as can be seen, the breakdown voltage parameter is not critical. The more important in our case is the Q2 current handling capability. The external power MOSFET has to withstand higher currents than the upper current limit of the 33394: IDQ2>3A In order to keep the power dissipation of the 33394 boost converter to its minimum, a very low RDSon power MOSFET has to be selected. Moreover, due to the fact that the 33394 external MOSFET gate driver is supplied from VPRE, in order to assure proper switching of Q2 a logic level device has to be selected. Last but not least, the Q2 package has to suitable for the harsh automotive environment with low thermal resistance. These requirements are met, for example by the MTD20N03HDL power MOSFET from ON Semiconductor. 5.2.2. Input Filter Selection Since the switcher will work in the Boost mode only during cold crank condition, the 33394 EMC (electromagnetic compatibility) performance is not of concern during this mode of operation. Therefore, only the Buck mode of operation is important for selecting the appropriate input filter. For the Buck converter topology (see Figure 13) the low impedance 3rd order filter (C3, L2, C4 and C26 in the Application Schematic Diagram Figure 20) offers a good solution. It can be seen from the Buck converter current waveforms that comparatively high current pulses are drawn from the converter’s input source. The filter inductance must be kept minimal and the capacitor, which is placed right next to the power switch, must be sized large enough to provide sufficient energy reservoir for proper switcher operation. The ESR of this input capacitor combination C4, C26 has to be sufficiently low to reduce the switching ripple of the switcher input node VBAT. There are three main reasons to keep the voltage ripple of the VBAT pin at its minimum. First, it is the EMC (electromagnetic compatibility) performance of the switcher in the normal operating mode (buck mode). Second, it allows a smooth transition between the boost and buck mode of operation. Third, it helps to avoid entering an undervoltage condition too early. A practical way to achieve sufficiently low ESR of the switcher input capacitor, even at low temperature extremes, is to use several high value ceramic capacitors in parallel with a large electrolytic capacitor. These capacitors should be physically placed as close to the VBAT pins as possible. Freescale Semiconductor, Inc... 5.2.1.5. Selecting the Boost Converter Output Rectifier D2 Criteria similar to that of selecting the power MOSFET was used to select the boost converter output rectifier. Its reverse breakdown voltage is not a critical parameter: VrD2>Vo=6 V The D2 rectifier has to withstand higher peak current than is the 33394 internal switch upper current limit Ilim(max). The most important parameter is its forward voltage drop, which has to be minimal. This parameter is also crucial for the proper 33394 switcher functionality, and especially for proper transition between the buck and boost modes. Finally, its switching speed, forward and reverse recovery parameters play a significant role when selecting the output rectifier D2. These requirements are met, for example by the HSM350 schottky rectifier from Microsemi, Inc. 5.2.3. Buck Converter Feedback Compensation A typical control loop of the buck regulator is shown in Figure 17. The loop consists of a power processing block — the modulator in series with an error–detecting block — the Error (Feedback) Amplifier. In principle, a portion of the output voltage (VPRE of the 33394 switcher) is compared to a reference voltage (Vbg) in the Error Amplifier and the difference is amplified and inverted and used as a control input for the modulator to keep the controlled variable (output voltage VPRE) constant. Vin Gain Block (Modulator) Vin + Ramp Vout – + PWM Signal + MODULATOR Vout To Load S G – H Feedback Block Vout/Vin = G/(1 + GH) Zf – + Reference Voltage ERROR FEEDBACK AMPLIFIER Zin Figure 17. The Buck Converter Control Loop 30 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 R2 C3 C1 GAIN (dB) – E/A + R Ref VCOMP U1 40 20 0 –20 MODULATOR fZ1 A1 fZ2 Ifxo A2 ERROR AMPLIFIER C2 80 CLOSED LOOP (overall) 60 R3 VPRE_S R1 fp(LC) fp1 fp2 Figure 18. Error Amplifier Two–Pole–Two–Zero Compensation Network The process of determining the right compensation components starts with analysis of the open loop (modulator) transfer function, which has to be determined and plotted into the Bode plot (see Figure 19). The modulator DC gain can be determined as follows: –40 –60 1 90 MODULATOR 0 PHASE (deg) 10 100 1000 f (Hz) fZ(ESR) 10 k 100 k 1M Freescale Semiconductor, Inc... ADC Vin + DVe Where Ve is the maximum change of the Error Amplifier voltage to change the duty cycle from 0 to 100 percent (Ve = 2.6 V at Vbat =14 V). As can be seen from Figure 19, the buck converter modulator transfer function has a double complex pole caused by the output L–C filter. Its corner frequency can be calculated as: fp(LC) o This double pole exhibits a —40dB per decade rolloff and a —180 degree phase shift. Another point of interest in the modulator’s transfer function is the zero caused by the ESR of the output capacitor Co and the capacitance of the output capacitor itself: fz(ESR) 1 + 2pRESRCo –90 ERROR AMPLIFIER –180 + 2p 1LC –270 –360 1 10 100 CLOSED LOOP (overall) 1000 f (Hz) 10 k 100 k 1M Figure 19. Bode Plot of the Buck Regulator The frequency of the compensating poles and zeros can be calculated from the following expressions: The ESR zero causes +20dB per decade gain increase, and +90 degree phase shift. Once the open loop transfer function is determined, the appropriate compensation can be applied in order to obtain the required closed loop cross over frequency and phase margin (~60 degree) — refer to Figure 18 and Figure 19. Figure 19 shows the 33394 Switching Regulator modulator gain–phase plot, E/A gain–phase plot, closed loop gain–phase plot, and the E/A compensation circuit. The frequency fxo is the required cross–over frequency of the buck regulator. In order to achieve the best performance (the highest bandwidth) and stability of the voltage–mode controlled buck PWM regulator the two–pole–two–zero type of compensation was selected — see Figure 19 for the compensated Error Amplifier Bode plot, and Figure 18 for the compensation network. The two compensating zeros and their positive phase shift (2 x +90 degree) associated with this type of compensation can counteract the negative phase shift caused by the double pole of the modulator’s output filter. + 2pR12C2 1 fz2 + [ 2pR11C3 2p(R1 ) R3)C3 1 fp1 + 2pR3C3 C ) C2 fp2 + 1 [1 fz1 2pR2C1C2 2pR2C1 and the required absolute gain is: R1R3 R3 Refer to Application Schematic Diagram (Figure 20) and Table 2 for the 33394 switcher component values. A2 + R2 R1 + R2(R1 ) R3) [ R2 A1 Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 31 Freescale Semiconductor, Inc. 33394 Table 2. Part number (Figure 18) R1 R2 R3 C1 C2 C3 Application diagram part number (Figure 1) 33394 internal resistor R2 R1 C6 C7 C5 Component value 39.6kΩ 100kΩ 430Ω 100pF 1.0nF 3.3nF Where R is the HRT timer pull–up resistor, C is the HRT timer capacitor VB is the pull–up voltage, Vth is the HRT timer threshold voltage (Vth = 2.5V nominal value), VSAT is the saturation voltage of the internal pull–down transistor. If the HRT timer pull–up resistor is connected to VDDH (see Figure 1) and the resistor value is ≥ 47 k , therefore the VSAT can be neglected, the formula for calculating the time delay can be simplified to: W 5.3. Selecting Pull–Up Resistors All the Resets (/PORESET, /PRERESET and /HRESET) are open drain outputs, which can sink a maximum of 1 mA drain current. This determines the pull–up resistor minimum value. VKAM should be used as the pull–up source for the /PORESET output. /PORESET is pulled low only during initial battery connect or when VKAM is below 2.5 volts (for VDDL = 2.6 V). To select the /PRERESET and /HRESET pull–up resistor connections, consider current draw during sleep modes. For example, the pull up resistor on /PRERESET and /HRESET should receive its source from VDDL, if the sleep mode or low power mode of the module is initiated primarily by the state of the VIGN pin. Refer to Figure 20 for recommended pull–up resistor values. Another way to connect the /PRERESET and /HRESET pull–up resistors is to connect them to the VKAM output together with the /PORESET pull–up resistor (see Figure 1). This is the preferable solution when the sleep or low power mode is initiated primarily by the microprocessor. In that case, when the 33394 is shut down by pulling the /SLEEP pin down, all three Resets (/PORESET, /PRERESET and /HRESET) stay high. Since they are pulled–up to the supply voltage (VKAM) they draw no current from the VKAM and the module quiescent current is minimized. tD + 0.7 RC 5.5. Selecting the VKAM Resistor Divider The VKAM linear regulator output voltage is divided by an external resistor divider and compared with the bandgap reference voltage (Vbg) in the input of the VKAM error amplifier. The resistor divider can be designed according to the following formula: VKAM VKAMref = 1.267 V Where VKAMref is the bandgap reference voltage. Since the VKAM feedback pin (VKAM_FB) input current is only a few nA, the resistor value can be selected sufficiently high in order to minimize the quiescent current of the module. See Figure 20 for the VKAM resistor divider recommended values. Freescale Semiconductor, Inc... + VKAMref 1 ) Rupper Rlower 5.6. Selecting the VDDL Resistor Divider The VDDL regulator resistor divider is designed according to the same formula as described in the paragraph above (see Figure 20). VDDL 5.4. Selecting Hardware Reset Timer Components The HRT input sets the delay time from VDDH, VDD3_3 and VDDL stable to the release of /PRERESET and /HRESET. When sizing the delay time the module design engineer must consider capacitor leakage, printed board leakage and HRT pin leakage. Resistor selection should be low enough to make the leakage currents negligible. The Hardware Reset (/HRESET) delay can be calculated as follows: Delay time: tD + VDDLref 1 ) Rupper Rlower Where VDDLref = 1.267 V Nonetheless, the actual resistor values should be chosen several decades lower than in the previous example. This is due to the fact that the VDDL linear regulator needs to be pre–loaded by a minimum of 10 mA current in order to guarantee stable operation. See Figure 20 for the VDDL resistor divider recommended values. + * RC ln[ (VB VSAT) Vth ] (VB VSAT) * * * 32 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 JP1 1 2 +Battery VDDH C3 1.0uF/50V SW1 DIP–2 C29 1.0uF/50V VIGN C28 VKAM 10nF + C23 10nF C24 22uF R4 22k 1.0uF/50V C26 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 U1 VBAT VBAT VBAT VBAT VBAT KA_VBAT N/C VIGN VKAM VKAM_FB VSEN REGON WAKEUP VREF1 VPP_EN VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B VDDL_FB N/C /PRERESET /HRESET /PORESET CANRXD CANTXD SW1 SW1 SW1 SW1 SW1 N/C BOOT SW2G GND INV VCOMP VPRE VPRE_S VDDH VREF2 VREF3 N/C DO SCLK DI CS N/C /SLEEP HRT CANH CANL GND 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C1 100nF BOOT C6 100pF R22 100k VPRE C30 10nF VPRE_S C10 47uF 37 36 35 34 /SLEEP VDDH + C11 10nF C7 1.0nF C4 100uF/35V D2 * MURS320T3 Q3 1 L2 6.8uH 2 + + C2 D3 SS25 R13 18R R14 4.7k Q1 MMSF3300R2 C5 100uF/16V 3.3nF R1 430R Vbat 1 L1 47uH D1 20BQ030 2 VPP_EN IGN R3 4.7k R6 20k VSEN REGON WAKEUP VPP_EN MC33394DWB VREF1 C8 10nF C9 1.0uF R19 2.0R VDDL_X VDDL_B VDDL_FB VREF2 C14 1.0uF R20 2.0R CANH C15 10nF Freescale Semiconductor, Inc... VPP + C12 10nF +3.3V C21 10nF 37 36 35 34 R9 4.7k R10 4.7k R11 4.7k R12 4.7k DO SCLK DI VKAM CS + C22 10uF C13 10uF CANRXD CANTXD CANL VREF3 R15 47k C18 1.0uF C16 1.0uF R21 2.0R C17 10nF /PRERESET /PORESET /HRESET R8 120R VDDH C25 * R16 10k R17 10k R18 10k C27 * Q3 VPRE Q2 MJD31C VDDL = 2.6V VDDL R5 110R VDDL_FB C20 47uF R7 100R VDDL_B Q3 MJD31C VDDL_X +Battery GND +Battery GND +Battery GND +Battery GND VKAM /SLEEP VPP WAKEUP VSEN IGN +3.3V REGON /PORESET /PRERESET CANH /HRESET CANL CANRXD VREF2 CANTXD VREF1 CS VREF3 DI VPP_EN SCLK VDDH DO VDDL GND + C15 10nF *Notes: 1. D2 is a protection diode against reverse battery fault condition. In those applications, which do not require this type of protection, diode D2 can be ommitted. Notes: 2. Capacitors C25, C27 are optional and may be used for CAN tranceiver evaluation. Table 3. 33394 Evaluation Board Performance Parameter Value (TA = 25_C, Vin = 14V) V Load [mV] [mA] 5.028 5.026 5.023 5.022 5.021 3.307 2.667 2.638 400 150 100 100 100 120 400 60 Line Regulation (Vin = 5.2V to 26.5V) Load Regulation (Vin = 14 V) 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CON/34 J1 Figure 20. 33394 Application Circuit Schematic Diagram DV [mV] 10 10 8 8 6 5 5 2 Load [mA] 400 150 100 100 100 120 400 60 DV [mV] 18 5 8 10 11 7 10 14 Load [mA] 0 to 400 0 to 150 0 to 100 0 to 100 0 to 100 0 to 120 0 to 400 0 to 60 VDDH VPP VREF1 VREF2 VREF3 VDD3_3 VDDL VKAM Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 33 Freescale Semiconductor, Inc. 33394 Table 4. 33394DWB Evaluation Board Bill of Material Item 1 2 3 4 5 6 7 8 9 10 11 12 Qty. 1 1 3 1 1 1 1 10 4 2 1 1 1 2 1 1 1 1 1 1 1 1 2 1 1 6 1 1 1 1 1 1 1 3 3 1 1 1 C1 C2 C3,C26,C29 C4 C5 C6 C7 C8,C11,C12,C15,C17,C19,C21,C23,C28,C30 C9,C14,C16,C18 C20,C10 C13 C22 C24 C25,C27 D1 D2 D3 JP1 J1 L1 L2 Q1 Q2,Q3 R1 R2 R3,R9,R10,R11,R12,R14 R4 R5 R6 R7 R8 R13 R15 R16,R17,R18 R19,R20,R21 SW1 TP1 U1 Part Designator Value/ Rating 100nF/16V, Ceramic X7R 100µF/20V 1.0µF/50V 100µF/35V 3.3nF, Ceramic X7R 100pF, Ceramic X7R 1.0nF, Ceramic X7R 10nF, Ceramic X7R 1.0µF, Ceramic X7R 47µF/10V, Tantalum 10µF/16V, Tantalum 10µF/6.3V, Tantalum 22µF/6.3V, Tantalum 470pF, Ceramic X7R 30V/2A Schottky 200V/3A Diode 50V/2A Schottky 2–pin, 0.2 (5.1mm) 34–pin, 0.1 x 0.1 47µH 6.8µH 30V/11.5A, Mosfet 100V/3A, BJT 430R, Resistor 0805 100k, Resistor 0805 4.7k, Resistor 0805 22k, Resistor 0805, 1% 110R, Resistor 0805, 1% 20k, Resistor 0805, 1% 100R, Resistor 0805, 1% 120R, Resistor 0805 18R, Resistor 0805 47k, Resistor 0805 10k, Resistor 0805 2.0R, Resistor 0805 2–Position DIP Switch Test Point, 0.038 Integrated Circuit Part Number/ Manufacturer Any manufacturer TPSV107K020R0085, AVX Corp. C1812C105K5RACTR, Kemet UUB1V101MNR1GS, Nichicon Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer TPSC476K010R0350, AVX Corp. TPSB106K016R0800, AVX Corp. TPSA106K006R1500, AVX Corp. TPSA226K006R0900, AVX Corp. Any manufacturer 20BQ030, International Rectifier MURS320T3, ON Semiconductor SS25, General Semiconductor Terminal Block PCB Header Connector P0250.473T, Pulse Engineering P0751.682T, Pulse Engineering MMSF3300R2, ON Semiconductor MJD31C, ON Semiconductor Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer BD02, C&K Components 240–333, Farnell 33394DWB/ Motorola Freescale Semiconductor, Inc... 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 34 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 JP1 1 2 +BATTERY VDDH * D2 Q4 1 L2 6.8 H 1.0 F/ 50 V SW1 DIP–2 VPP_EN m MURS320T3 1.0 F/50 V C3 C29 R14 m 100 F/ C4 1.0 F/ C26 50 V 35 V C1 100 nF 11 10 9 8 7 6 5 4 3 2 1 m 2 m + VBAT m 1 L1 D1 20BQ030 2 C5 3.3 nF Q1 MTD20N03HDL R1 430R VPRE_S 47 H D3 SS25 R13 18R m C2 100 F/ 20 V m + OPTIONAL OUTPUT FILTER L3 1 2 C30 33 F/16 V m + 4.7k R3 4.7 k C28 10 nF VIGN 2.6V VKAM C23 10 nF + VKAM VIGN KA_VBAT VBAT VBAT SW1 SW1 SW1 BOOT SW2G GND C24 100 F m R4 22 k 12 13 14 15 16 17 18 19 20 21 22 U1 C6 100 pF C7 1.0 nF VPRE VDDH C10 47 F 5.0V @ 400 mA R6 20 k 5.0V @ 100mA VREF1 C8 10 nF C9 1.0 F + Freescale Semiconductor, Inc... m 5.0V @ 150mA VPP C12 10 nF VDDL_FB /PRERESET /HRESET /PORESET CANRXD CANTXD GND CANL CANH HRT /SLEEP VKAM_FB VSEN REGON WAKEUP VREF1 VPP_EN PC33394FC VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B INV VCOMP VPRE VPRE_S VDDH VREF2 VREF3 DO SCLK DI CS 44 43 42 41 40 39 38 37 36 35 34 R2 100 k m + C11 10 nF + VREF2 C14 1.0 F 5.0V @ 100 mA C13 33 F VPRE m m + 23 24 25 26 27 28 29 30 31 32 33 C15 10 nF R15 VDDH 120R Q2 MJD31C +3.3V C21 10 nF R19 10R + VKAM R9 R10 R11 R12 R16 10 k 4.7 k 4.7 k 4.7 k 4.7 k R17 10 k DO R18 10 k C25 * C27 * 47 k C18 1.0 F m VREF3 C16 1.0 F 5.0V @ 100 mA C22 47 mF 37 36 35 34 SCLK DI CS 2.6V @ 400 mA VDDL C19 10 nF m + C17 10 nF Q4 VPRE Q3 MJD31C VDDL_B Q4 MJD31C VDDL_X +BATTERY GND +BATTERY GND +BATTERY GND +BATTERY GND VKAM /SLEEP VPP WAKEUP VSEN IGN +3.3V REGON /PDRESET /PRERESET CANH /HRESET CANL CANRXD VREF2 CANTXD VREF1 CS VREF3 DI VPP_EN SCLK VDDH DO VDDL GND VDDL + C20 100 F m R5 110R VDDL_FB R7 100R J1 *Notes: 1. D2 is a protection diode against reverse battery fault condition. In those applications, which do not require this type of protection, diode D2 can be ommitted. Notes: 2. Capacitors C25, C27 are optional and may be used for CAN tranceiver evaluation. Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CON/34 Figure 21. 33394 Application Circuit with Increased 3.3V Output Current Capability For More Information On This Product, 35 Freescale Semiconductor, Inc. 33394 Table 5. 33394FC Evaluation Board Bill of Material Item 1 2 3 4 5 6 7 8 9 10 11 12 Qty. 1 1 3 1 1 1 1 9 1 3 2 1 1 1 2 1 1 1 1 1 1 1 1 1 1 3 1 1 6 1 1 1 1 1 1 1 3 1 1 1 1 C1 C2 C3,C26,C29 C4 C5 C6 C7 C8,C11,C12,C15,C17,C19,C21,C23,C28 C18 C9,C14,C16 C10,C22 C13 C20 C24 C27,C25 C30 D1 D2 D3 JP1 J1 L1 L2 L3 Q1 Q2,Q3,Q4 R1 R2 R3,R9,R10,R11,R12,R14 R4 R5 R6 R7 R8 R13 R15 R16,R17,R18 R19 SW1 TP1 U1 Part Designator Value/ Rating 100nF/16V, Ceramic X7R 100µF/20V 1.0µF/50V 100µF/35V 1.5nF, Ceramic X7R 100pF, Ceramic X7R 1.0nF, Ceramic X7R 10nF, Ceramic X7R 1.0µF, Ceramic X7R 1.0µF/35V Tantalum 47µF/10V Tantalum 33µF/10V Tantalum 100µF/6.3V Tantalum 22µF/6.3V, Tantalum 470pF, Ceramic X7R 33µF/16V 30V/ 2A Schottky 200V/3A Diode SS25 2–pin, 0.2 (5.1mm) 34–pin, 0.1 x 0.1 47µH 6.8µH Ferrite Bead 30V/20A Mosfet 100V/3A BJT 680R, Resistor 0805 100k, Resistor 0805 4.7k, Resistor 0805 22k, Resistor 0805, 1% 110R, Resistor 0805, 1% 20k, Resistor 0805, 1% 100R, Resistor 0805, 1% 120R, Resistor 0805 18R, Resistor 0805 47k, Resistor 0805 10k, Resistor 0805 10R, Resistor 0805 2–Position DIP Switch Test Point Integrated Circuit Part Number/ Manufacturer Any manufacturer TPSV107K020R0085, AVX Corp. C1812C105K5RACTR, Kemet UUB1V101MNR1GS, Nichicon Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer TPSA105K035R3000, AVX Corp. TPSC476K010R0350, AVX Corp. TPSB336K010R0500, AVX Corp. TPSC107K006R0150, AVX Corp. TPSA226K006R0900, AVX Corp. Any manufacturer TPSC336K016R0300, AVX Corp. 20BQ030, International Rectifier MURS320T3, ON Semiconductor SS25, General Semiconductor Terminal Block PCB Header Connector P0250.473T, Pulse Engineering P0751.682T, Pulse Engineering HF30ACC575032/ TDK MTD20N03HDL, ON Semiconductor MJD31C, ON Semiconductor Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer Any manufacturer BD02, C&K Components 240–333, Farnell MC33394DWB/ Motorola Freescale Semiconductor, Inc... 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 36 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 Input voltage +7V to +26.5V ON OFF S1 R5 4.7k C1 100µF + 1 2 3 C5 10nF 4 5 6 R2 22k 7 8 9 VREF1 = 5V @ 100mA + C8 10nF C9 1.0µF VPP = 5V @ 150mA + C16 10nF C17 47µF VDDH 11 12 3.3V @ 120mA + C11 47µF 14 15 Q1 MJD44H11 VDDL = 2.6V @ 600mA + C12 10nF C13 100µF R4 22R /PRERESET R3 20R /HRESET 16 17 18 19 13 10 VBAT VBAT KA_VBAT VIGN VKAM VKAM_FB VSEN REGON WAKEUP SW1 SW1 SW1 BOOT SW2G GND INV VCOMP VPRE 44 43 42 41 330nF 40 39 38 37 36 35 34 33 VREF2 = 5V @ 100mA + 32 VREF3 = 5V @ 100mA C18 1.0µF + 31 C20 C21 10nF 1.0µF 30 29 28 27 26 25 /PORESET CANRXD CANTXD CANH CANL GND 24 23 60R Rt 47k VDDH Ct 1.0 µF VDDH = 5V @ 400mA + C14 100µF C19 10nF C15 10nF Cb 100nF BAV99 D1 MBRS340T C2 100µF L1 47µF VPRE = 5.6V + VKAM = 2.6V @ 60mA + C6 10nF C7 47µF Cf3 3.3nF Rf2 100k Cf1 100pF Rf3 430R R1 20k Cf2 1nF PC33394 VREF1 VPP_EN VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B VDDL_FB /PRERESET /HRESET VPRE_S VDDH VREF2 VREF3 DO SCLK DI CS /SLEEP HRT Freescale Semiconductor, Inc... C10 10nF VPRE /PORESET 20 R6 10k VKAM R7 10k R8 10k 21 22 Figure 22. 33394 Buck–Only Application Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 37 Freescale Semiconductor, Inc. 33394 +12V @ 100mA + D3 C23 47µF Input voltage +10V to +26.5V ON OFF S1 R5 4.7k C1 100µF + 1 2 3 C5 10nF 4 5 6 R2 22k 7 8 9 VREF1 = 5V @ 100mA VBAT VBAT KA_VBAT VIGN VKAM VKAM_FB VSEN REGON WAKEUP SW1 SW1 SW1 BOOT SW2G GND INV VCOMP VPRE 44 43 T1 42 41 40 39 38 37 36 35 34 33 VREF2 = 5V @ 100mA + 32 VREF3 = 5V @ 100mA C18 1.0µF + 31 C20 C21 10nF 1.0µF 30 29 28 27 26 25 24 23 60R Rt 47k VDDH Ct 1.0 µF VDDH = 5V @ 400mA + C14 100µF C19 10nF C15 10nF Cf3 3.3nF Rf2 100k Cf1 100pF Cb 100nF D1 MBRS340T Rf3 430R C2 100µF + D3 + C22 47µF –12V @ 100mA VPRE = 5.6V VKAM = 2.6V @ 60mA + C6 10nF C7 47µF R1 20k Cf2 1nF Freescale Semiconductor, Inc... 10 VDDH 11 12 3.3V @ 120mA + C11 47µF 14 15 Q1 MJD31C 16 17 13 PC33394 + C8 10nF C9 1.0µF VPP = 5V @ 150mA + C16 10nF C17 47µF VREF1 VPP_EN VPP VDD3_3 VDD3_3FB VDDL_X VDDL_B VDDL_FB /PRERESET /HRESET /PORESET CANRXD CANTXD VPRE_S VDDH VREF2 VREF3 DO SCLK DI CS /SLEEP HRT CANH CANL GND C10 10nF VPRE VDDL = 2.6V @ 400mA + C12 10nF C13 100µF R4 22R /PRERESET R3 20R /HRESET 18 19 /PORESET 20 R6 10k VKAM R7 10k R8 10k 21 22 Figure 23. 33394 Flyback Converter Provides Symmetrical Voltages 38 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 PACKAGE DIMENSIONS DH SUFFIX 44–LEAD HSOP PLASTIC PACKAGE CASE 1291–01 ISSUE O PIN ONE ID h X 45 _ E3 E2 4X E5 1 44 D 0.325 Freescale Semiconductor, Inc... 22 23 B EXPOSED HEATSINK AREA E1 22X E bbb Y A A2 M A CB H DATUM PLANE E4 BOTTOM VIEW NOTES: 1. CONTROLLING DIMENSION: MILLIMETER. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.150 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE –H–. 5. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. DATUMS –A– AND –B– TO BE DETERMINED AT DATUM PLANE –H–. 7. DIMENSION D DOES NOT INCLUDE TIEBAR PROTRUSIONS. ALLOWABLE TIEBAR PROTRUSIONS ARE 0.150 PER SIDE. MILLIMETERS MIN MAX 3.000 3.400 0.025 0.125 2.900 3.100 15.800 16.000 11.700 12.600 0.900 1.100 ––– 1.000 13.950 14.450 10.900 11.100 2.500 2.700 6.400 7.300 2.700 2.900 ––– 1.000 0.840 1.100 0.350 BSC 0.220 0.350 0.220 0.320 0.230 0.320 0.230 0.280 0.650 BSC ––– 0.800 q 0_ 8_ aaa 0.200 bbb 0.100 DIM A A1 A2 D D1 D2 D3 E E1 E2 E3 E4 E5 L L1 b b1 c c1 e h D2 42X e D3 c C SEATING PLANE GAUGE PLANE SECTION W–W L1 W L (1.600) DETAIL Y W A1 bbb C q Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, ÇÇÇÇ ÉÉÉ ÇÇÇÇ ÉÉÉ ÇÇÇÇ b1 c1 b aaa M CA D1 4X 39 Freescale Semiconductor, Inc. 33394 PACKAGE DIMENSIONS FC SUFFIX 44–LEAD QFN PLASTIC PACKAGE CASE 1310–01 ISSUE D PIN 1 INDEX AREA 0.1 C 2X A 0.1 C 2X 9 M G 1.0 1.00 0.8 0.75 0.1 C 0.05 C (0.325) (0.65) DETAIL G 5 9 0.05 0.00 C SEATING PLANE Freescale Semiconductor, Inc... VIEW ROTATED 90 ° CLOCKWISE M B 0.1 C A B 6.85 6.55 34 44 DETAIL M PIN 1 IDENTIFIER EXPOSED DIE ATTACH PAD 1 33 6.85 6.55 0.1 C A B 0.65 23 11 40X NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. THE COMPLETE JEDEC DESIGNATOR FOR THIS PACKAGE IS: HF–PQFP–N. 4. CORNER CHAMFER MAY NOT BE PRESENT. DIMENSIONS OF OPTIONAL FEATURES ARE FOR REFERENCE ONLY. 5. COPLANARITY APPLIES TO LEADS, CORNER LEADS AND DIE ATTACH PAD. 6. FOR ANVIL SINGULATED QFN PACKAGES, MAXIMUM DRAFT ANGLE IS 12°. 44X 0.75 0.50 22 12 N 44X 0.37 0.23 0.1 0.05 M M VIEW M–M CAB C (45 ° ) (3.53) 0.60 0.24 0.60 0.24 DETAIL N CORNER CONFIGURATION OPTION 44X 0.065 0.015 (0.25) DETAIL N PREFERRED CORNER CONFIGURATION 4 DETAIL T 4 3.4 3.3 0.475 0.425 2X 0.39 0.31 BACKSIDE PIN 1 INDEX (90 ) ° R 0.25 0.15 DETAIL M PREFERRED BACKSIDE PIN 1 INDEX 2X 0.1 0.0 DETAIL M BACKSIDE PIN 1 INDEX OPTION DETAIL T PREFERRED BACKSIDE PIN 1 INDEX 40 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 PACKAGE DIMENSIONS DWB SUFFIX 54–LEAD SOICW–EP PLASTIC PACKAGE CASE 1377–01 ISSUE B 10.3 5 7.6 7.4 C 9 B 2.65 2.35 52X 1 54 NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. DATUMS B AND C TO BE DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 4. THIS DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURRS. MOLD FLASH, PROTRUSION OR GATE BURRS SHALL NOT EXCEED 0.15 MM PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 5. THIS DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH AND PROTRUSIONS SHALL NOT EXCEED 0.25 MM PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 6. THIS DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED 0.46 MM. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND ADJACENT LEAD SHALL NOT LESS THAN 0.07 MM. 7. EXACT SHAPE OF EACH CORNER IS OPTIONAL. 8. THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.1 MM AND 0.3 MM FROM THE LEAD TIP. 9. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM. THIS DIMENSION IS DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTER–LEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 0.65 PIN 1 INDEX Freescale Semiconductor, Inc... 4 9 B B 18.0 17.8 C L 27 28 5.15 2X 27 TIPS A 54X SEATING PLANE 0.3 ABC 0.10 A A R0.08 MIN C A 8° 0° 0.9 0.5 SECTION B–B 0.1 0.0 C 0.25 GAUGE PLANE 0 ° MIN (1.43) 6.6 5.9 0.30 A B C (0.29) 0.30 0.25 BASE METAL 4.8 4.3 0.30 A B C 6 SECTION A–A ROTATED 90_ CLOCKWISE VIEW C–C Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, ÉÉÉÉ ÇÇÇÇ ÉÉÉÉ ÇÇÇÇ ÉÉÉÉ ÇÇÇÇ 0.38 0.22 M (0.25) PLATING 0.13 A BC 8 41 Freescale Semiconductor, Inc. 33394 NOTES Freescale Semiconductor, Inc... 42 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com Freescale Semiconductor, Inc. 33394 NOTES Freescale Semiconductor, Inc... Go to: www.fr MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA eescale.com For More Information On This Product, 43 Freescale Semiconductor, Inc. 33394 Freescale Semiconductor, Inc... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. MOTOROLA and the logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. E Motorola, Inc. 2001. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3–20–1, Minami–Azabu. Minato–ku, Tokyo 106–8573 Japan. 81–3–3440–3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 852–26668334 Technical Information Center: 1–800–521–6274 HOME PAGE: http://www.motorola.com/semiconductors/ 44 For More Information On This Product, Go to: www.freescalANALOG INTEGRATED CIRCUIT DEVICE DATA MOTOROLA e.com ◊ MC33394/D