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35XS3500

35XS3500

  • 厂商:

    FREESCALE(飞思卡尔)

  • 封装:

  • 描述:

    35XS3500 - Smart Rear Corner Light Switch (Penta 35 mΩ) - Freescale Semiconductor, Inc

  • 数据手册
  • 价格&库存
35XS3500 数据手册
Freescale Semiconductor Advance Information Document Number: MC35XS3500 Rev. 4.0, 5/2011 Smart Rear Corner Light Switch (Penta 35 mΩ) The 35XS3500 is designed for low-voltage automotive and industrial lighting applications. Its five low RDS(ON) MOSFETs (five 35 mΩ) can control the high sides of five separate resistive loads (bulbs and LEDs). Programming, control, and diagnostics are accomplished using a 16-bit SPI interface (3.3 V or 5.0 V). Each output has its own PWM control via the SPI. The 35XS3500 has highly sophisticated failure mode handling to provide high availability of the outputs. Its multiphase control and output edge shaping improves electromagnetic compatibility (EMC) behavior. The 35XS3500 is packaged in a power-enhanced 12 x 12 nonleaded Power QFN package with exposed tabs. Features • Penta 35 mΩ high side switches • 16-bit SPI communication interface with daisy chain capability • Current sense output with SPI-programmable multiplex switch and Board Temperature Feedback • Digital diagnosis feature • PWM module with multiphase feature including prescaler • LEDs control including accurate current sensing and low dutycycle capability • Fully protected switches • Over-current shutdown detection • Power net and reverse polarity protection • Low-power mode • Fail mode functions including auto restart feature • External smart power switch control including current recopy • Lead-free packaging designated by suffix code PNA 12V 5.0V 35XS3500 HIGH SIDE SWITCH Bottom View PNA SUFFIX 98ART10511D 24-PIN PQFN PB FREE ORDERING INFORMATION Device MC35XS3500PNA Temperature Range (TA) -40 to 125 °C Package 24 PQFN 12V 35XS3500 VCC Watchdog LIMP FLASHER STOP IGN RST CLOCK CS VBAT CP OUT1 OUT2 OUT3 OUT4 MCU OUT5 S0 FETIN SI SCLK FETOUT CSNS GND Smart Switch Figure 1. 35XS3500 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2010-2011. All rights reserved. INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM VCC VBAT CP RUP VCC failure detection Internal Regulator OV/UV/POR detections Charge Pump CS SO SI SCLK RDWN CLOCK LIMP STOP FLASHER IGN RST Logic LED Control Over-current Detection Open Load Detection Over-temperature Detection OUT1 Gate Drive drain/gate clamp OUT1 RDWN OUT2 OUT2 Over-temperature Prewarning OUT3 OUT3 OUT4 OUT4 OUT5 OUT5 CSNS Selectable Output Current Recopy (Analog MUX) Current Recopy Synchronization VCC Driver for External MOSFET FETIN Temperature Feedback FETOUT GND Figure 2. 35XS3500 Simplified Internal Block Diagram 35XS350 2 Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS PIN CONNECTIONS FLASHER FETOUT CLOCK 13 12 11 10 CP GND 16 17 9 8 7 6 5 4 3 2 24 14 GND 23 FETIN 1 CSNS GND 22 OUT1 Definition STOP SCLK LIMP VCC RST OUT5 18 15 VBAT 19 OUT4 20 OUT3 21 OUT2 Figure 3. 35XS3500 Pin Connections (Transparent Package Top View) Table 1. 35XS3500 Pin Definitions Functional descriptions these pins can be found in the Functional Description section beginning on page 18. Pin 1 2 3 Pin Name Pin Function Input Input Input Formal Name External FET Input Ignition Input (Active High) Reset FETIN IGN RST This pin is the current sense recopy of the external MOSFET. This input wakes the device. It also controls outputs 1 and 2 in case of Fail mode activation. This pin has a passive internal pull-down. This input wakes the device. It is also used to initialize the device configuration and fault registers through the SPI. This pin has a passive internal pull-down. This input wakes the device. This pin has a passive internal pull-down. This pin state depends on RST logic level. As long as RST input pin is set to logic [0], this pin is pulled up in order to report wake event. Otherwise, the PWM frequency and timing are generated from this digital clock input by the PWM module. This pin has a passive internal pull-down. The Fail mode can be activated by this digital input. This pin has an active internal pull-down current source. This input wakes the device. This pin has a passive internal pull-down. When this signal is high, SPI signals are ignored. Asserting this pin low starts a SPI transaction. The transaction is signaled as completed when this signal returns high. This pin has a passive internal pull-up resistance. This input pin is connected to the master microcontroller providing the required bit shift clock for SPI communication. This pin has a passive internal pull-down resistance. 35XS3500 4 5 FLASHER CLOCK Input Input Flasher Input (Active High) Clock Input 6 7 8 LIMP STOP CS Input Input Input Limp Home Input (Active High) Stop Light Input (Active High) Chip Select (Active Low) SPI Clock Input 9 SCLK Input Analog Integrated Circuit Device Data Freescale Semiconductor IGN SO SI CS 3 PIN CONNECTIONS Table 1. 35XS3500 Pin Definitions (continued) Functional descriptions these pins can be found in the Functional Description section beginning on page 18. Pin 10 11 12 13 Pin Name SI VCC Pin Function Input Input Output Output Formal Name Master-Out Slave-In Logic Supply Master-In Slave-Out External FET Gate Definition This data input is sampled on the positive edge of the SCLK. This pin has a passive internal pull-down resistance. SPI Logic power supply. SPI data sent to the MCU by this pin. This data output changes on the negative edge of SCLK, and when CS is high. This pin is high-impedance. This pin controls an external SMART MOSFET by logic level. This output called OUT6. If OUT6 is not used in the application, this output pin is set to logic high when the current sense output becomes valid when CSNS sync SPI bit is set to logic [1]. 14, 17, 23 15 16 18 19 20 21 22 24 GND VBAT CP OUT5 OUT4 OUT3 OUT2 OUT1 CSNS Ground Input Output Output Output Output Output Output Output Ground Battery Input Charge Pump Output 5 Output 4 Output 3 Output 2 Output 1 This pin is the ground for the logic and analog circuitry of the device.(1) Power supply pin. This pin is the connection for an external tank capacitor (for internal use only). Protected 35 mΩ high side power output to the load. SO FETOUT Current Sense Output This pin is used to output a current proportional to OUT1:OUT5, FET in current, and it is used externally to generate a ground-referenced voltage for the microcontroller to monitor output current. Moreover, this pin can report a voltage proportional to the temperature on the GND flag. OUT1:OUT5, FET in current sensing and Temperature feedback choice is SPI programmable. Notes 1. The pins 14, 17, and 23 must be shorted on the board. 35XS350 4 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Rating ELECTRICAL RATINGS Over-voltage Test Range Maximum Operation Voltage Load Dump (400 ms) @ 25 °C Reverse Polarity Voltage Range 2.0 Min @ 25 °C VCC Supply Voltage Output Voltage Positive Negative (ground disconnected) Digital Input Current in Clamping Mode (SI, SCLK, CS, IGN, FLASHER, STOP, LIMP) FETIN Input Current IIN IFETIN VCC VOUT VBAT - 18 -0.3 to 5.5 40 -16 ±1.0 +10 -1.0 SO and FETOUT Output Voltage Outputs clamp energy using single pulse method (L = 2.0 mH; R = 0 Ω; VBAT = 14 V @ 150 °C initial) ESD Voltage(2) Human Body Model (HBM) OUT[1:5], VPWR, and GND Charge Device Model (CDM) Corner Pins (1,13,19,21) All Other Pins (2-12, 14-18, 20, 22-24) THERMAL RATINGS Operating Temperature Ambient Junction Peak Pin Reflow Temperature During Solder Mounting(3) Storage Temperature THERMAL RESISTANCE Thermal Resistance, Junction to Case(4) RθJC 1.0 TA TJ TSOLDER TSTG - 40 to 125 - 40 to 150 260 - 55 to 150 °C °C °C VSO E VESD ± 2000 ± 8000 ± 750 ± 500 - 0.3 to VCC + 0.3 30 V mJ V mA mA V V VBAT 28 40 V V Symbol Value Unit °C/W Notes 2. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 Ω) and the Charge Device Model. 3. Pin soldering temperature limit is for 40 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. If the qualification fails, TSOLDER will be changed for 240 °C. 4. Typical value is guaranteed per design. 35XS3500 Analog Integrated Circuit Device Data Freescale Semiconductor 5 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics Characteristics noted under conditions 3.0 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic POWER INPUT (VBAT, VCC) Battery Supply Voltage Range Full Performance and Short Circuit Extended Voltage Range(5) Battery Supply Under-voltage (UV flag is set ON) Battery Voltage Clamp (OV flag is set ON) Battery Voltage Clamp Battery Supply Power on Reset If VBAT < 5.5 V, VBAT = 0 VBAT Supply Current @ 25 °C and VBAT =12 V and VCC = 5.0 V Sleep State Current, Outputs Open Sleep State Current, Outputs Grounded Normal Mode, IGN = 5.0 V, RST = 5.0 V, Outputs Open Digital Voltage Range, Full Performance Digital Supply Under-voltage (VCC Failure) Sleep Current Consumption on VCC @ 25 °C and VBAT = 12 V Output OFF Supply Current Consumption on VCC and VBAT = 12 V No SPI 3.0 MHz SPI Communication LOGIC INPUT/ OUTPUT (IGN, CS, CSNS, SI, SCLK, CLOCK, SO, FLASHER, RST, LIMP, STOP) Input High Logic Level(6) Input Low Logic Level(6) Ignition Threshold Level (IGN, FLASHER, STOP and RST) Input Clamp Voltage (IGN, FLASHER, LIMP, STOP, CS, SCLK, SI, RST) I = 1.0 mA Input Forward Voltage (IGN, FLASHER, LIMP, STOP, CS, SCLK, SI, RST) I = 1.0 mA Input Passive Pull-up Resistance on CS pin(7) Input Passive Pull-down Resistance on SI, SCLK, FLASHER, IGN, FOG, CLOCK, LIMP and RST pins(7) SO High-state Output Voltage IOH = 1.0 mA Notes 5. 6. 7. 8. In extended mode, the functionality is guaranteed but not the electrical parameters. Valid for RST, SI, SCLK, CLOCK, FLASHER, STOP, and LIMP pins. Valid for the following input voltage range: VCC = -0.3 to +0.3 V. Please refer to Loss of VBAT section for more details. VSOH 0.8 0.95 – VCC RUP RDWN VCL_NEG - 2.0 100 100 – 200 200 -0.3 400 500 VIH VIL VIGNTH VCL_POS 7.5 – 13 2.0 – 1.0 – – – 0.8 2.2 V V V V V kΩ kΩ ICC – – – – 2.6 5.0 IBATSLEEP1 IBATSLEEP2 IBAT VCC VCCUV ICCSLEEP – 0.2 5.0 – – – 3.0 2.2 0.5 0.5 10 – 2.5 5.0 5.0 20 5.5 2.8 μA μA mA V V μA mA (8) Symbol VBAT Min Typ Max Unit V 7.0 6.0 VBATUV VBATCLAMP_OV VBATCLAMP VBATPOR1 VBATPOR2 5.0 27.5 40 2.0 2.0 – – 5.5 30 – – – 20 28 6.0 32.5 48 3.0 4.0 V V V V If VBAT < 5.5 V, VBAT = VCC 35XS350 6 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 3.0 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic CLOCK Output Voltage reporting wake-up event (ICLOCK=1.0 mA) SO Low-state Output Voltage IOL = -1.6 mA SO Tri-state Leakage Current CS > 0.7 VCC Symbol VCLOCKH VSOL Min 0.8 – Typ 0.95 0.2 0.0 Max – 0.4 1.0 Unit VCC V μA μA LOGIC INPUT/ OUTPUT (IGN, CS, CSNS, SI, SCLK, CLOCK, SO, FLASHER, RST, LIMP, STOP) (CONTINUED) ISOLEAK - 1.0 ICSNSLEAK - 5.0 - 10 - 1.0 VCSNS 5.0 0 0 0 6.0 1.0 1.0 1.0 7.0 CSNS Tri-state Leakage Current VCC = 5.5 V, CSNS = 5.5 V VCC = 5.0 V, CSNS = 5.5 V VCC = 5.0 V, CSNS = 4.5 V Current Sense Output Clamp Voltage ICSNS < 10.0 mA OUTPUT (OUT 1:5) Output Leakage Current in OFF state Sleep mode, Outputs Grounded Normal mode, Outputs Grounded Output Negative Clamp Voltage IOUT = -500 mA, Outputs OFF Current Sense Output Precision(9) Full-Scale Range (FSR) for LED Control bit = 0 0.75 FSR 0.50 FSR 0.25 FSR 0.10 FSR Full-Scale Range (FSR) for LED Control bit = 1 0.187 FSR = 0.75 FSRLED 0.125 FSR = 0.50 FSRLED 0.062 FSR = 0.25 FSRLED 0.025 FSR = 0.10 FSRLED Current Sense Output Precision Over-temperature Range [-40;125 °C], VBAT Range [10 V-16 V] and FSR Range [25%-100%], calculated with one calibration point (Taken at 25 °C, VBAT = 13.5 V and 50% FSR)(11) Current Sense Output Precision with one calibration point (50% FSRLED, VBAT = 13.5 at 25 °C(11) Temperature Drift of Current Sense Output(10) VBAT = 13.5 V, IOUT = 2.8 A reference taken at TA = 25 °C Minimum Output Current Reported in CSNS for OUT[1-5](12) 10 V ≤ VBAT ≤ 16 V Minimum Output Current Reported in CSNS for OUT[1-5] in LED Mode(12) 10 V ≤ VBAT ≤ 16 V V IOUTLEAK – – VOUT δICS / ICS -14 -15 -17 -22 -13 -13 -20 -30 -6.0 14 15 17 22 13 13 20 30 6.0 - 22 0 20 – 2.0 25 -16 μA V % % -6.0 ΔICS / ΔT I35MIN(CSNS) 65 I35MIN(CSNS) LED 40 – – ± 280 6.0 ± 400 % ppm/ °C mA – – – mA – Notes 9. 10 V < VBAT < 16 V. (δICS / ICS = (measured ICS- targeted ICS)/ targeted ICS with targeted ICS = 5.0 mA 10. 11. 12. Based on statistical data. Not production tested. ΔICS / ΔT = [(measured at ICS at T1 - measured at ICS at T2) measured at ICS at room]/ (T1 - T2) Based on statistical analysis covering 99.74% of parts. Output current value computed after leakage current removal (open load condition) 35XS3500 Analog Integrated Circuit Device Data Freescale Semiconductor 7 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 3.0 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic OUTPUT (OUT 1:5) (CONTINUED) Over-temperature Shutdown Thermal Prewarning(13) Output Voltage Threshold TAIL LIGHT (OUT1) Output Drain-to-Source ON Resistance (IOUT = 2.8 A, TA = 25 °C) VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 2.8 A, VBAT = 13.5 V, TA = 150 °C)(13) Reverse Output ON Resistance (IOUT = -2.8 A, VBAT = -12 V, TA = 25 °C)(14) TAIL LIGHT (OUT1) Output Drain-to-Source ON Resistance (IOUT = 1.5 A, TA = 25 °C) for LED Control = 1 VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 1.5 A, VBAT = 13.5 V, TA = 150 °C) for LED Control = 1 High Over-current Shutdown Threshold 1 VBAT = 16 V, TA = -40 °C VBAT = 16 V, TA = 25 °C VBAT = 16 V, TA = 125 °C High Over-current Shutdown Threshold 2 Low Over-current Shutdown Threshold Open Load Current Threshold in ON State(15) Open Load Current Threshold in ON State with LED(16) VOL = VBAT - 0.5 V Current Sense Full-scale Range(17) Current Sense Full-scale Range(13) depending on LED Control = 1 range(13) ICS FSR ICS FSR_LED RSC1(OUT1) IOCHI2 IOCLO IOL IOLLED 4.0 – – 350 10 6.0 1.6 20 – – A A mΩ IOCHI1 RDS(ON)150_LED – 28.0 30.2 29.4 28.3 12.3 5.7 0.05 – 35.0 36.0 35.0 33.8 15.4 7.2 0.2 119 43.5 41.8 40.6 39.3 18.5 8.9 0.5 A A A mA A mΩ RDS(ON)25_LED – – – – 70 110 mΩ RDS(ON) – RSD(ON) – – – 59.5 70 mΩ RDS(ON) – – – – 35 55 mΩ mΩ TOTS TOTSWARN VOUT_TH 155 110 0.475 175 125 0.5 195 140 0.525 °C °C VBAT Symbol Min Typ Max Unit Severe short-circuit impedance Notes 13. Parameter guaranteed by design; however it is not production tested. 14. Source-to-Drain ON Resistance (Reverse Drain-to-Source ON Resistance) with negative polarity VBAT. 15. 16. 17. OLLED1, bit D0 in SI data is set to [0] OLLED1, bit D0 in SI data is set to [1] For a typical value of ICS FSR, ICSNS = 5.0 mA. If the range is exceeded, no current clamp and the precision is not guaranteed. 35XS350 8 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 3.0 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic LICENSE LIGHT (OUT2) Output Drain-to-Source ON Resistance (IOUT = 2.8 A, TA = 25 °C) VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = -2.8 A, VBAT = -13.5 V, TA = 25 °C)(22) Reverse Output ON Resistance (IOUT = 2.8 A, VBAT = 12 V, TA = 150 °C)(18) Output Drain-to-Source ON Resistance (IOUT =1.5 A, TA = 25 °C) for LED Control = 1 VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 1.5 A, VBAT = 13.5 V, TA = 150 °C) for LED Control = 1 High Over-current Shutdown Threshold 1 VBAT = 16 V, TA = -40 °C VBAT = 16 V, TA = 25 °C VBAT = 16 V, TA = 125 °C High Over-current Shutdown Threshold 2 Low Over-current Shutdown Threshold Open Load Current Threshold in ON State(19) Open Load Current Threshold in ON State with LED VOL = VBAT - 0.5 V Current Sense Full-Scale Range(21) Current Sense Full-Scale Range (22) (20) Symbol RDS(ON) Min Typ Max Unit mΩ – – RDS(ON) – RSD(ON) RDS(ON)25_LED – – RDS(ON)150_LED – IOCHI1 28.0 30.2 29.4 28.3 IOCHI2 IOCLO IOL IOLLED 4.0 ICS FSR depending on LED Control = 1 ICS FSR_LED – – 12.3 5.7 0.05 – – – 35 55 mΩ – – 59.5 70 mΩ mΩ – – 70 110 mΩ – 35.0 36.0 35.0 33.8 15.4 7.2 0.2 10 6.0 1.6 119 43.5 41.8 40.6 39.3 18.5 8.9 0.5 20 – – A A A A A mA A Notes 18. Source-to-Drain ON Resistance (Reverse Drain-to-Source ON Resistance) with negative polarity VBAT. 19. 20. 21. 22. OLLED2, bit D0 in SI data is set to [0] OLLED2, bit D0 in SI data is set to [1] For typical value of ICS FSR, ICSNS = 5.0 mA. If the range is exceeded, no current clamp and the precision is not guaranteed. Parameter guaranteed by design; however, it is not production tested. 35XS3500 Analog Integrated Circuit Device Data Freescale Semiconductor 9 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 3.0 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic LICENSE LIGHT (OUT2) (CONTINUED) Severe short-circuit impedance range(23) TAIL LIGHT (OUT3) Output Drain-to-Source ON Resistance (IOUT = 2.8 A, TA = 25 °C) VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 2.8 A, VBAT = 13.5 V, TA = 150 °C) TA = 25 °C) (23) Symbol RSC1(OUT2) RDS(ON)25 Min 350 Typ Max Unit mΩ mΩ – – – – 35 55 mΩ – – – 59.5 70 mΩ mΩ – – – – 70 110 mΩ – – 35.0 36.0 35.0 33.8 15.4 7.2 0.2 10 6.0 1.6 119 43.5 41.8 40.6 39.3 18.5 8.9 0.5 20 – – A A mΩ A A A mA 4.0 A 28.0 30.2 29.4 28.3 RDS(ON)150 RSD(ON)25 RDS(ON)25_LED – Reverse Source-to-Drain ON Resistance (IOUT = -2.8 A, VBAT = -12 V, (24) Output Drain-to-Source ON Resistance (IOUT = 1.5 A, TA = 25 °C) for LED Control = 1 VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 1.5 A, VBAT = 13.5 V, TA = 150 °C) for LED Control = 1 High Over Current Shutdown Threshold 1 VBAT = 16 V, TA = -40 °C VBAT = 16 V, TA = 25 °C VBAT = 16 V, TA = 125 °C High Over-current Shutdown Threshold 2 Low Over-current Shutdown Threshold Open Load Current Threshold in ON VOL = VBAT - 0.5 V Current Sense Full-scale Range(27) Current Sense Full-scale Range(22) depending on LED Control = 1 Severe short-circuit impedance range(23) State(25) RDS(ON)150_LED IOCHI1 IOCHI2 IOCLO IOL IOLLED ICS FSR ICS FSR_LED RSC1(OUT3) 12.3 5.7 0.05 Open Load Current Threshold in ON State with LED(26) – – 350 Notes 23. Parameter guaranteed by design; however, it is not production tested. 24. Source-to-Drain ON Resistance (Reverse Drain-to-Source ON Resistance) with negative polarity VBAT. 25. 26. 27. OLLED3, bit D2 in SI data is set to [0] OLLED3, bit D2 in SI data is set to [1] For a typical value of ICS FSR, ICSNS = 5.0 mA. If the range is exceeded, no current clamp and the precision is not guaranteed. 35XS350 10 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 3.0 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic STOP LIGHT (OUT4) Output Drain-to-Source ON Resistance (IOUT = 2.8 A, TA = 25 °C) VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 2.8 A, VBAT = 13.5 V, TA = 150 °C)(28) Output Drain-to-Source ON Resistance (IOUT = 1.5 A, TA = 25 °C) for LED Control = 1 VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT =1.5 A, VBAT = 13.5 V, TA = 150 °C) for LED Control = 1 Reverse Source-to-Drain ON Resistance (IOUT = -2.8 A, VBAT = -12 V, T A = 25 °C)(29) IOCHI1 28.0 30.2 29.4 28.3 IOCHI2 IOCLO IOL LED(31) IOLLED 4.0 ICS FSR depending on LED Control = 1 (28) Symbol RDS(ON)25 Min Typ Max Unit mΩ – – RDS(ON)150 – RDS(ON)25_LED – – RDS(ON)150_LED – RDS(ON)25 – – – 35 55 mΩ – 59.5 mΩ – – 70 110 mΩ – – 35.0 36.0 35.0 33.8 15.4 7.2 0.2 10 6.0 1.6 119 70 43.5 41.8 40.6 39.3 18.5 8.9 0.5 20 – – A A mΩ A A A mA mΩ A High Over-current Shutdown Threshold 1 VBAT = 16 V, TA = -40 °C VBAT = 16 V, TA = 25 °C VBAT = 16 V, TA = 125 °C High Over-current Shutdown Threshold 2 Low Over-current Shutdown Threshold Open Load Current Threshold in ON State(30) Open Load Current Threshold in ON State with VOL = VBAT - 0.5 V Current Sense Full-scale Range(32) Current Sense Full-scale Range(22) 12.3 5.7 0.05 – – 350 ICS FSR_LED RSC1(OUT4) RDS(ON)25 Severe short-circuit impedance range FLASHER (OUT5) Output Drain-to-Source ON Resistance (IOUT = 2.8 A, TA = 25 °C) VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 2.8 A, VBAT = 13.5 V, TA = 150 °C)(28) Reverse Source-to-Drain ON Resistance (IOUT = -2.8 A, VBAT = -12 V, TA = 25 °C) (29) mΩ – – – – 35 55 mΩ – – – 59.5 70 mΩ RDS(ON)150 RSD(ON)25 – Notes 28. Parameter guaranteed by design; however, it is not production tested. 29. Source-to-Drain ON Resistance (Reverse Drain-to-Source ON Resistance) with negative polarity VBAT. 30. 31. 32. OLLED3, bit D2 in SI data is set to [0] OLLED3, bit D2 in SI data is set to [1] For a typical value of ICS FSR, ICSNS = 5.0 mA. If the range is exceeded, no current clamp and the precision is not guaranteed. 35XS3500 Analog Integrated Circuit Device Data Freescale Semiconductor 11 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 3.0 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic FLASHER (OUT5) (CONTINUED) Output Drain-to-Source ON Resistance (IOUT =1.5 A, TA = 25 °C) for LED Control = 1 VBAT = 13.5 V VBAT = 7.0 V Output Drain-to-Source ON Resistance (IOUT = 1.5 A, VBAT = 13.5 V, TA = 150 °C) for LED Control = 1 High Over Current Shutdown Threshold 1 VBAT = 16 V, TA = -40 °C VBAT = 16 V, TA = 25 °C VBAT = 16 V, TA = 125 °C High Over-current Shutdown Threshold 2 Low Over-current Shutdown Threshold Open Load Current Threshold in ON VOL = VBAT - 0.5 V Current Sense Full-scale Range(36) Current Sense Full-scale Range(22) depending on LED Control = 1 Severe short-circuit impedance range SPARE (FETOUT , FETIN) FETOUT Output High Level @ I = 1.0 mA FETOUT Output Low Level @ I = 1.0 mA FETIN Input Full Scale Range Current FETIN Input Clamp Voltage Drop Voltage between FETIN and CSNS for MUX[2:0] = 110 IFET IN = 5 mA, 5.5 V > CSNS > 0.0 V FETIN Leakage Current when external current switch sense is enabled VCC > VFET IN > 0 V, 5.5 V > VCC 4.5 V, CSNS open VCC > VFET IN > 0 V, 4.5 V > VCC > 0, CSNS open TEMPERATURE OF GND FLAG Analog Temperature Feedback at TA = 25 °C with 5.0 kΩ > RCSNS > 500 Ω Analog Temperature Feedback Derating with 5.0 kΩ > RCSNS > 500 Ω(33) Analog Temperature Feedback Precision(33) Analog Temperature Feedback Precision with calibration point at 25 °C Notes 33. 34. 35. 36. (33) (33) Symbol RDS(ON)25_LED Min Typ Max Unit mΩ – – RDS(ON)150_LED – IOCHI1 28.0 30.2 29.4 28.3 IOCHI2 IOCLO IOL IOLLED 4.0 ICS FSR ICS FSR_LED RSC1(OUT5) VH MAX VH MIN IFET IN VCLIN VDRIN 0.0 IFETINLEAK - 1.0 - 1.0 – – 350 12.3 5.7 0.05 – – 70 110 mΩ – 35.0 36.0 35.0 33.8 15.4 7.2 0.2 10 6.0 1.6 119 43.5 41.8 40.6 39.3 18.5 8.9 0.5 20 – – A A mΩ A A A mA A State(34) Open Load Current Threshold in ON State with LED(35) 0.8 – – 5.3 – 0.2 5.0 – – – – – 0.4 – 7.0 0.4 VCC V mA V V μA 5.0 1.0 VT_FEED VDT_FEED VDT_ACC VDT_ACC_CAL 920 10.9 -15 -5.0 1025 11.3 – – 1140 11.7 15 5.0 mV mV/ °C °C °C Parameter guaranteed by design; however, it is not production tested. OLLED3, bit D2 in SI data is set to [0] OLLED3, bit D2 in SI data is set to [1] For a typical value of ICS FSR, ICSNS = 5.0 mA. If the range is exceeded, no current clamp and the precision is not guaranteed. 35XS350 12 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 4.5 V ≤ VCC ≤ 5.5 V, 7.0 V ≤ VBAT ≤ 20 V, -40 °C ≤ TA ≤ 125 °C, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic POWER OUTPUTS TIMING (OUT1:5) Current Sense Valid Time on resistive load only(39) SR bit = 0 SR bit = 1 Current Sense Synchronization Time on FETOUT SR bit = 0 SR bit = 1 Current Sense Settling Time on resistive load only(39) Driver Output Positive Slew Rate (30% to 70% @ VBAT = 14 V) SR bit = 0, IOUT = 2.8 A SR bit = 1, IOUT = 0.7 A Driver Output Negative Slew Rate (70% to 30% @ VBAT = 14 V) SR bit = 0, IOUT = 2.8 A SR bit = 1, IOUT = 0.7 A Driver Output Matching Slew Rate (SRR/SRF)(70% to 30% @ VBAT = 14 V @ 25 °C) Driver Output Turn-ON Delay (SPI ON Command [No PWM, CS Positive Edge] to Output = 50% VBAT @ VBAT = 14 V) SR bit = 0, IOUT = 2.8 A SR bit = 1, IOUT = 0.7 A Driver Output Turn-OFF Delay (SPI OFF command [CS Positive Edge] to Output = 50% VBAT @ VBAT = 14 V) SR bit = 0, IOUT = 2.8 A SR bit = 1, IOUT = 0.7 A Driver Output Matching Time (t DLY(ON) - t DLY(OFF)) @ Output = 50% VBAT with VBAT = 14 V, f PWM = 240 Hz, δPWM = 50%, @ 25 °C PWM MODULE Nominal PWM Frequency Range(39) Clock Input Frequency Range Output PWM Duty Cycle maximum range for 11 V
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