80310

Freescale Semiconductor Advance Information Document Number: TC80310 Rev 2.0, 5/2011 Alternator Regulator with LIN The 80310 is an integrated circuit intended to regulate the output voltage of an automotive alternator. The IC supplies a current via a high side MOSFET to the excitation coil of the alternator and provides an internal freewheeling diode. It keeps the battery at its nominal charge and delivers current to electrical devices within the vehicle. The 80310 also provides a load response control mechanism (LRC), and has an interface for the industry standard LIN protocol (Revision 1.3) to allow an ECU to control the regulated voltage and the LRC rate among other parameters. The ECU also can read back information about the status of the regulator and the alternator via LIN. It can be programmed for most functions using OTP (Non-volatile Memory) and fit a large number of alternators and applications. Features • • • • • • • • • High side field driver Internal freewheeling diode Up to 8.0 A rotor current (excitation coil) Load response control (LRC) Thermal protection Thermal compensation LIN interface Set point voltage selectable from 10.6 to 16 V Rotor control and die temperature monitoring via LIN TOP VIEW ORDERING INFORMATION Device Temperature Range (TJ) Package 80310 AUTOMOTIVE ALTERNATOR REGULATOR Devices part numbers are dependant on programming from factory. TO3 - Contact sales for information on limited engineering sample quantities. Production version is die sales only. 1.5 μF/2.2 μF Stator PH1 B+A LIN PH2 SGND EXC GND Rotor Coil Master ECU Diagnose Control Battery + - TC80310 Alternator Figure 1. 80310 Simplified Application Diagram (LIN Mode) 1.5 μF/2.2 μF Stator PH1 B+A LIN PH2 SGND EXC GND Rotor Coil TC80310 Battery + - Alternator Figure 2. 80310 Simplified Application Diagram (Standalone, Self-start Mode) * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2009-2011. All rights reserved. DEVICE VARIATIONS DEVICE VARIATIONS Table 1. Version Determined Electrical Parameters Version Selfstart Self-start Phase Default Threshold sensitivity Regulation (V) Voltage (RPM) (V) 3000/ 4000 0.45/0.9/ 1.35/1.8 13.5 to 15 (100 mV steps) Fstart (RPM) Fstop (RPM) LRC LRC Crest BUS Rate(s) disable Regulation inactivity(s) (RPM) 0/3/6.4/ 12.3 2400/ 3000/ 4000/ Never Active / Not Active 1.31 / 3 Default LIN Readout Thermal Thermal Fault Compensation Threshold threshold (°C) (°C) 135/145/150/ 160 Special LIN Feature Active/ Not Active Alternat Slave or pole- Address pair 6/8 A/B Active/ Not Active 800/1050/ 1300/ 1550/ 1800/ 2050/ 2300/2500 500/ 650/ 850/ 1000 T°/Current 135/145/ 150/160 Versions TO3 Active 3000 0.45 14.3 800 500 3 3000 Not active 3 Current 145 145 Active 6 A Devices part numbers are dependant on programming from factory. TC80310x Various configurations are available and are programmable by OTP at the Freescale factory. Please contact your Freescale sales representative for further WS details, based on your system requirements, and solutions available. 80310 2 Analog Integrated Circuit Device Data Freescale Semiconductor INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM B+A Trim ADC SUPPLY Trim MUX Buffer T° Bpa_sense_ buffer Temperate Current Vlogic 5V Vanalog 5V Vanalog_ switch 5 Vpump 5V BUS ÷ 10 Low Pas Filter 1.2KHz 10 Bits End Conversion 10 Bits Start Conversion Bandgap Trim 4.0MHz CLK Digital Core CLK Phase ON/OFF Drive and Protection S/C Current Measurement B +A Charge Pump T° Measurement PH1 Phase Processor High Phase Sensitivity EXC PH2 POR Internal BUS OTP PGN SGN Figure 3. 80310 Simplified Internal Block Diagram 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 3 PIN CONNECTIONS PIN CONNECTIONS PH2 1 BUS 3 4 SGND 2 PH1 B+A 5 6 EXC PGND 7 Figure 4. TC80310 Die Connections Bottom View Transparent Top View Figure 5. JTO3 Pin Connections (Sample Configuration Only) Non-production Table 2. 80310 Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 9. Pad Number Pin Number TC80310 TO3 1 2 3 4 5 6 7 1 2 3 4 5 6 7 Pin Name PH2 (φ2) PH1 (φ1) BUS SGND B+A EXC PGND Pin Function Input Input Input/Output N/A Power Output N/A Formal Name Phase 2 Phase 1 LIN Bus Signal Ground Supply Voltage Excitation Power Ground Definition Signal from alternator phase 2 Signal from alternator phase 1 LIN connected to master Ground pin This pin is connected to the battery of the vehicle This pin is connected to the rotor coil of the alternator Ground termination 80310 4 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 3. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. TA = 25 °C, unless otherwise stated. Ratings ELECTRICAL RATINGS B+A Supply Pin DC Voltage Load Dump Transient Voltage (ISO7637-2) Maximum Reverse B+A Voltage(1) (5 seconds) Maximum Excitation Current at TJ = 150 oC(2) Maximum Excitation Current at TJ = 25 C Recirculation Diode Peak Current Recirculation Diode Reverse Voltage PHASE Input Voltage Range BUS Pin Input Range ESD Voltage(3) VESD1 VESD2 VESD3 VESD4 Level ±6000 ±200 ±8000 ±15000 150 V VPHASE o Symbol Value Unit VB+CONT VB+TRANS V-B+A 27 40 V V V -2.4 IEXC IEXC 5.0 8.0 8.0 40 ±40 -2.0 to +40 A A A V V V V Human Body Model - All Pins (MIL std 883C)(4) Machine Model - All Pins Accessible Pins (EN61.000-4-2) When Mounted on the Alternator (BUS & B+A) by Contact Discharge Air Discharges When Mounted on the Alternator(5) Standard Transient Pulses ISO7637-1 & -3 THERMAL RATINGS Storage Temperature Operating Junction Temperature(6) TSTOR TJ TJ-TSD TTSD-HYST -45 to +150 -40 to +150 185 10 °C °C °C °C Thermal Shutdown Temperature Thermal Shutdown Hysteresis Notes 1. Not tested. Depends on package and bonding. 2. Characterized at 150°C but not production tested 3. Testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω), Charge Device Model, Robotic (CZAP = 4.0 pF), or the EN61000-4-2 specification (CZAP = 150 pF, RZAP = 330 Ω). 4. 5. 6. Except Phase1 and Phase2 (+/-5000 V) Product Powered. ESD done on pulley, B+ and metal alternator case (CZAP = 330 pF, RZAP = 2.0 kΩ) Guaranteed by Design. 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 5 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics Electrical parameters are tested at die level from 30 to 140 °C. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Parametric guaranteed from TJ = -40 to 150 °C, unless otherwise noted. Operation is guaranteed by design up to TJ-TSD. Characteristic Operating Voltage, VB+A Bus Operating Voltage (LIN) Quiescent Current at VB+A=12.5 V (Phases at 0 V) (including phase currents at 25 °C) Quiescent Current at VB+A=12.5 V (Phases at 12.5 V) (including phase currents at 25 °C) Operating Current no EXC Load at 25 °C and VB+A = 13 V Range of Regulation Voltage (50% DC) VREG Setting Accuracy Voltage at 50% for VREG = 13.8 V and TJ = 25 oC VREG Setting Accuracy Voltage at 50% for VREG = 10.7 V and VREG = 16 V and TJ = 25 oC Load Dump Detection Threshold Voltage ΔVREG with Load Voltage(7) Symbol VB+A VBUS ISB2.B+A-0 ISB2.B+A-1 IOP VREG ΔVREG1 ΔVREG2 VLD ΔVREG-L ΔVREG-S oC(9) Min 8.0 8.0 Typ Max 27 18 110 250 16 16.0 +100 +150 Unit V V μA μA mA V mV mV V mV mV mΩ V V V V V A mA – – – 10.60 -100 -150 – – – – 12 – – – 21 – -150 -100 – 0 100 100 1.0 1.5 ΔVREG with Speed Voltage(8) RDS-ON FIELD TMOS at IEXC = 5.0 A and TJ = 140 Over-voltage Detection(10) Recirculation Diode Voltage at 5.0 A (Excitation Current) Phase Input High Threshold Voltage (PHASE OK) Phase Input High Hysteresis Voltage (PHASE OK) Over-voltage (Fault) Threshold Voltage EXC Short-circuit Protection Threshold LIN Peak Short-circuit Current Notes 7. 8. 9. 10. 11. (11) RDS.ON.EXC VEXC.SEN VF VP-H VPH-HYST VOV IEXC-SC ILIN-SC – 0.3 – – – 0.6 1.2 8.0 1.0 16.5 10 62 – – – 16.2 – – – – – – 150 Changing load from 5% to 90% of alternator capability. At low load (5%) and varying alternator speed from 2000 RPM to 18000 RPM. By design, not tested. The thermal capability of the packaging is critical to the full use of the output drive. If there is a high voltage and the EXC pin is above this voltage a fault is detected. Pulsed at low duty cycle. 80310 6 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics Electrical parameters are tested at die level from 30 to 140 °C. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. Parametric guaranteed from TJ = -40 to 150 °C, unless otherwise noted. Operation is guaranteed by design up to TJ-TSD. Characteristic Bus Voltage Low Level Receive (LIN)(12) Bus Voltage Low Level Send (LIN)(12) Bus Voltage High Level Receive (LIN)(12) Symbol VBUS-LOW-REC VBUS-LOW-SEND VBUS-HIGH-REC VBUS-HIGH-SEND VVCCLB Min Typ Max 0.3 * VB+A 1.4 0.7*VB+A Unit V V V V V – – – 6.4 Bus Voltage High Level Send (LIN)(12) Emergency Regulation Voltage(13) – – – – 8.5 – 9.5 – Notes 12. Referred to regulator/alternator ground. 13. Operates asynchronous to the regulation cycle in case of a very rapid drop in B+A, usually caused by adding a heavy load without a battery in the system. 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 7 ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 5. Dynamic Electrical Characteristics Electrical parameters are tested at die level from 30 to 140 °C. Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted. TJ from -40 to 150 °C, unless otherwise noted. Operation is guaranteed by design up to TJ-TSD. Characteristic Regulation Frequency Phase Noise Rejection Filter Fault Qualification Delay/Filter (14) Symbol FREG tLPH tFAULT tRISE tFALL DCMIN DCSTARTUP ΔLRC Min 106 Typ 122 12.5 400 Max 137 Unit Hz μs ms μs μs % % % – – 5.0 3.5 – – 40 40 Bus Signal Risetime (LIN) From 20% to 80% of VBUS with VB+A = 18 V Bus Signal Falltime (LIN) From 20% to 80% of VBUS with VB+A = 18 V Minimum Duty Cycle Start-up Duty Cycle Delta LRC Duty Cycle – – 4.1 13.5 3.125 – – – – – – Notes 14. A fault has to be present for the entire time before it is considered valid. 80310 8 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION INTRODUCTION FUNCTIONAL DESCRIPTION INTRODUCTION The 80310 is an integrated circuit intended to regulate the output voltage of an automotive alternator. The IC supplies a current via a high side MOSFET to the excitation coil of the alternator and provides an internal freewheeling diode. It keeps the battery at its nominal charge and delivers current to electrical devices within the vehicle. The 80310 also provides a load response control mechanism (LRC), and has an interface for the industry standard LIN protocol (v1.3) to allow an ECU (master) to control the regulated voltage and the LRC rate among other parameters. The ECU also can read back information about the status of the regulator and the alternator via LIN. The programmable parameters by the ECU: • Regulated voltage • LRC ramp time, LRC cut off • Excitation current limitation The information sent back to the ECU: • Die temperature • Excitation current • EXC duty cycle (DF) • Manufacturer and class • Faults: •Electrical, mechanical, temperature •LIN time out •LIN communication error: watchdog, check sum, Id parity, sync break The IC can be programmed as an OTP device (One Time Programmable) to fit a large number of alternators and applications. These programmable parameters are described in the functional device operation (Table 6). This circuit is specially designed to operate in harsh automotive environment. FUNCTIONAL PIN DESCRIPTION PHASE (PH1 AND PH2) These pins connect to stator windings. These signals are used for the rotor speed measurement, stator voltage measurement as well as the self start detection. LIN BUS (BUS) This LIN pin represents the single-wire bus transmitter and receiver. It is suited for automotive bus systems and is based on the LIN bus specification v1.3. GROUND PINS (PGND, SGND) 93+ !93+ $1' 93+ 93+/ &RQGLWLRQ LV WUXH The 80310 has two different types of ground pins. The PGND pin is the power ground pin for the device. The SGND is the signal ground pin. Important: The PGND, the SGND pins must be connected together to a ground external to the device. 9 3+ SUPPLY VOLTAGE (B+A) The 80310 is supplied by this B+A pin. This voltage is also used as the feedback voltage by the control circuit. 9 3+/ EXCITATION (EXC) This pin is connected to the excitation coil (rotor) of the alternator. The IC supplies a current via a high side MOSFET to the excitation winding to create a magnetic filed in the rotor. This generates sinusoidal currents in the stator which are rectified by a diode bridge. Figure 6. Internal Signals in Normal Mode In this situation the regulator stays in Normal mode. (P1 and P2 represent internal signals coming from the phase processor block, which are routed to the logic block). 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 9 FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION TC80310 - Functional Block Diagram Integrated Supply Divider/Filter POR Bandgap Power Stage Charge Pump Logic & Control Phase Low & High Die Temperature Clock A/D Converter OTP Drive and Protection Current Measurement Digital LIN Supply Voltage Logic& Control Power Figure 7. Functional Internal Block Diagram SUPPLY VOLTAGE: FILTER/DIVIDER, BANDGAP, AND POR An input filter and divider provides a clean image of the battery to the digital regulation loop circuit. The divider ratio can be adjusted by OTP. The supply block provides the voltages for the internal blocks of the 80310: • Main logic • Analog permanently powered or not • LIN transceiver • Charge pump The purpose of the POR block is to generate a clean power-on signal to the main logic. The Bandgap block provides the voltage and current references for the other blocks. LOGIC AND CONTROL: DIGITAL The digital block gathers all the digital functions of the device. The main functionality is described in the device operation paragraph. CLOCK This block is the clock reference for the digital block. The oscillator generates a 5.0 V square wave at the frequency of 4.0 MHz in Normal mode operation. OTP This block allows an easy configuration and adjustment of the circuit. A set of NVM bits can be programmed during the factory test phase. They are described in Table 6. POWER STAGE: CHARGE PUMP, DRIVE AND PROTECTION, CURRENT MEASUREMENT The power stage of the circuit consists of the gate driver with a charge pump and protection to control a low side driver switching the excitation current. A short-circuit is instantaneously detected and the excitation current is turned off until the next regulation cycle. A freewheeling diode is inserted between the EXC and GND pins, across the excitation coil for the energy recirculation. The current measurement block provides a proportional value of the excitation current flowing in the high side switch. PHASE LOW & HIGH The phase detector monitors the Phase inputs and sends filtered low and high levels to the main logic when either one has reached the detection level (1.0 V at startup and 8.0 V afterwards). ADC The analog to digital converter is used in the voltage regulation loop, in the current feedback and in temperature measurement. 80310 10 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION LIN This block allows the LIN bus transmission and reception. digital number to be transmitted via the LIN bus to the controller. T° MEASUREMENT This block generates a voltage proportional to the die temperature. This voltage is converted by the ADC into a POWER ON RESET (POR): When a Power On Reset occurs, product internal registers are reset and the product goes into standby mode. 5.00 4.80 4.60 4.40 4.20 4.00 -40.00 -10.00 20.00 50.00 80.00 110.00 140.00 Temp(deg C) 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 11 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES The following figure describes the battery operating voltage. DC BATTERY VOLTAGE MAX RATING 40 V 27 V (1.0 MIN.) LOAD DUMP DETECTION, EXCITATION OFF 21 V 16.5 V 16 V 13.8 V 10.6 V 8.5 V 5.0 V -2.4 V (5.0 SEC.) MAX RATING REGULATION RANGE (PWM REGULATION) EXCITATION WITH MINIMUM PWM DUTY-CYCLE OVER-VOLTAGE FAULT DETECTION (16.5 V) EXCITATION AVAILABLE WITH 100% OF DUTY-CYCLE (TARGETED VALUE IN LOGIC RAM) PREVIOUS LOGIC CONFIGURATION IS MAINTAINED. (LAST TARGETED VALUE STORED IN LOGIC RAM). 100% DUTY-CYCLE. NO LRC. LOGIC RESET (DEFAULT TARGET OF REGULATION) Figure 8. Battery Operating Voltage Range 80310 12 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS LOGIC COMMANDS AND REGISTERS This IC is One Time Programmable (OTP), during the final test phase, in the factory. The OTP Programmable Options table (Table 6) describes the programmable functions that Table 6. OTP Programmable Options Function Default Regulation Voltage Phase Start Regulating RPM(15), fSTART OTP Bits 4 3 Comments. 13.5 to 15 V, 100 mV steps 800 - 2500 RPM, 8 possible values (800, 1050, 1300, 1550, 1800, 2050, 2300, 2500) Phase Stop Regulating RPM(15), fSTOP LRC Disable RPM Default(15),fLRC LRC Rate Alternator Pole-pairs Slave Address Phase Sensitivity (Startup) Self-start (Auto-amorcage) Self-start Threshold Bus Inactivity or Data Corruption Timeout Default LIN Readout Temp or EXC Current Thermal Fault Threshold Thermal Compensation Threshold Low Voltage Threshold Alternator Supplier and Class Crest Regulation Parity Bit Special LIN Features, nvm-lin-special, LIN com with global ID (2B+3C) Security “lock bits“ 2 2 2 2 1 2 1 2 1 1 2 2 1 3+5 1 1 1 500, 650, 850,1000 RPM 2400, 3000, 4000 RPM & never 0, 3.0, 6.4 & 12.3 seconds 6, 7, 8 & 9 Two address options, A or B 0.45 V, 0.9 V, 1.35 V, 1.8 V(16) Yes or No. 3000, 4000 RPM 1.31 or 3 seconds Select Temperature or Current 135 °C, 145 °C, 150 °C, 160 °C 135 °C, 145 °C, 150 °C, 160 °C 75% of the target regulation voltage or none Alternator Information. Enabled or disabled Data Protection Enabled or Disabled are selectable by the customer. These Non-volatile Memory (NVM) bits are not alterable after the OTP operation at the factory. 1 EOL Notes 15. These are adjustable independently, the IC internally compensates for the pole-pairs if the correct OTP setting is made. Frequency measurements are made over multiple cycles (8) for greater accuracy. 16. Typical values at room temp (30 °C) 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 13 FUNCTIONAL DEVICE OPERATION STATE MACHINE STATE MACHINE The following diagram describes the state machine of the TC80310: POR LIN Timeout with no Phase LIN MID3C if nvm_lin_special Standby E dge on Phase No edge on Phase but Edge on LIN W ake-up on Phase W ake-up on LIN - LIN = 10.6V with no Phase LIN = 10.6V whatever the Phase if nvm_106V_ref_off See cont. in Self-Start State Machine LIN Command with Vreg 10.6V: MID 29 if nvm_ALT1 M ID2A if nvm_ALT2 M ID2B if nvm_lin_special PRE-EXC Phase < Stop Phase > Start No High Phase1 in the previous cycle and Phase Regulation is ON Phase < Stop REGULATION w LRC Phase P hase RRegulation EGULATION (High Phase1 appears) or (100%DC during 8 cycles => Phase Regulation set OFF) Phase < LRC Phase > LRC a nd first Vreg reached with LRC No High Phase1 in the previous cycle and Phase Regulation is ON R EGULATION w/o LRC (High Phase 1 appears) or (100%DC during 8 cycles => Phase Regulation set OFF) Phase Phase Regulation REGULATION Figure 9. LIN Wake-up State Machine STANDBY: The 80310 is in standby mode, if there is a LIN timeout and in absence of alternator rotation (no phase), or in case of power and reset (POR), or with a LIN MID3C command if nvm_lin_special is set • There is no excitation. • The duty cycle (DC) is equal to zero. The device needs a small amount of quiescent current to feed some functions such as oscillator. LIN timeout means: • No activity on the LIN bus during a specified time • or on a LIN watchdog timeout during a specified time After a LIN timeout, if no valid instruction is decoded, then the device goes back into Stand-by mode. PRE-EXC: The pre-excitation state is reached as soon as a valid instruction for the regulated value (VREG), different from 10.6 V, is decoded. If B+A is lower than the expected (VREG), then the duty cycle is equal to DCSTART UP, or else DCMIN. The purpose of pre-excitation is to increase the magnetization of the alternator, to guarantee a minimum phase voltage for the rotor speed measurement when the engine starts. The pre-excitation stays active until the detection of phase starts regulating RPM (fSTART). WAKE-UP: This state is reached when a transition is detected on the communication interface. • The logic is out of reset. • All the blocks are on. • There is no regulation. DC = 0% 80310 REGULATION WITH LRC: In this mode, the 80310 regulates the alternator output to the set reference level. The excitation is controlled by LRC if this LRC mode is active until the detection of phase stop This 14 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION STATE MACHINE LRC mode is active until the detection of phase stop regulating RPM (fSTOP). In this case, the device goes back to the pre-excitation mode. If the phase frequency reaches the LRC disable RPM default (fLRC), the device goes into regulation without LRC. with LRC mode. If the phase frequency goes below the phase stop regulating RPM, the device goes to pre-excitation mode. RE-REGULATION: The excitation is forced to 100%. This mode is active if there is no high phase on non active phase (PHx < VPH) in the previous cycle, until the high phase comes back. At the end of the 8th cycle, if there is still no high phase, the regulation mode is set off and the device goes back to the regulation mode with or without LRC. B+A is lower than VREG. In any case, DC cannot be lower than DCMIN. REGULATION WITHOUT LRC: This mode is active when the phase frequency is above the LRC disable RPM default (fLRC), the first VREG was reached with LRC. The excitation is controlled only by the internal comparator of B+A and VREG. The DC can not be lower than DCMIN. If the phase frequency goes below the LRC disable RPM default (fLRC), then the 80310 comes back to the regulation . S tand b y E d ge on Pha se . Re start tim er 10 0m s - POR L IN Tim eo ut w ith no Ph ase L IN M ID 3 C if n vm _ lin _spe cial W ake -u p on P ha se L IN C om m a nd with V reg 1 0.6 V: M ID 29 if n vm _AL T 1 M ID 2A if nv m _AL T 2 M ID 2B if n vm _lin _sp ec ial T im e ou t 100 m s P h ase > Star t_ aa . R esta r t tim e r 1 00 m s E X C 1 00 % D C T ime o ut 100 m s Hig h Ph ase 1 ap pears P R E-EX C P hase < Sto p Ph ase < Stop P ha se > Start N o High Ph ase1 in th e p r ev io us cycle an d P hase Regu lation is ON R EG U L A TIO N w LRC P hase > L RC an d first Vre g rea ched with L R C ( High Phase1 appe ars) o r (1 00% DC du rin g 8 cyc les = > Pha se Re gu la tion se t OF F) P h ase R EG U LA T IO N Ph ase < L R C R EG U LA T IO N w /o LRC N o Hig h Ph ase 1 in th e pr eviou s c ycle an d Ph ase Re gu la tion is ON (High P hase1 ap pear s) or (10 0% DC d uring 8 cycles => Pha se Regulation set OFF) P ha se R E G U LA TI O N Figure 10. Self-start State Machine This state machine runs only if self-start option has been The device needs a small amount of quiescent current to programmed. feed some functions such as oscillator. LIN timeout means: STANDBY: • No activity on the LIN bus during a specified time The 80310 is in Standby mode if there is a LIN timeout, • or on a LIN watchdog timeout during a specified time and in absence of alternator rotation (no phase), if power and reset (POR), or with a LIN MID3C command, if WAKE-UP: nvm_lin_special is set. This state is reached when an edge is detected on the • There is no excitation phase (Phase voltage > Phase sensitivity) • The duty cycle (DC) is equal to zero • The logic is out of reset 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 15 FUNCTIONAL DEVICE OPERATION STATE MACHINE • All the blocks are on • There is no regulation. DC=0% After a 100 ms timeout, if the speed has not reached fSTART, then the device goes back to Standby mode. RE-REGULATION: The excitation is forced to 100%. This mode is active if there is no high phase on non active phase (PHx < VPH) in the previous cycle, until the high phase comes back. At the end of the 8th cycle, if there is still no high phase, the regulation mode is set to off and the device goes back to the regulation mode, with or without LRC. EXCITATION 100% DC: When the speed has reached Start_aa, then the device goes into this state until the high phase appears, or during a 100 ms maximum. • The logic is out of reset. • All the blocks are on. • There is no regulation. DC = 100% Start_aa (see Table 1): is a special threshold for the selfstart when it is in Wake-up mode, before going in EXC 100% DC, waiting for high phase. Once high phase appeared the state machine is exactly the same as with LIN wake-up Start_aa can be programmed at 3000 rpm or 4000 rpm. LIN BUS INFORMATION: The operational control and programming, required in the end application, is carried out through the LIN interface. Refer to Tables 7 to 15. The regulator shall only give pre-excitation when it receives a LIN command targeted for it, the shutdown command is the code that would otherwise set 10.6 V (“000000”). LIN addresses are listed in MID format, Table 8, while the data fields are listed in [MSB:LSB] format Table 10 lists the values for the Target/Programmed Regulated voltage contained in the Alternator A/B write data field (ID=29, 2A), byte 1. Table 11 lists the values for the LRC Ramp Time and Ramp Cut-off contained in the Alternator A/B write data field (ID=29,2A), byte 2. Table 12 lists the values for the die Temperature contained in the Alternator A/B read data field (ID=11, 13), byte 2. Table 13 lists the values for the alternator Excitation Current contained in the Alternator A/B read data field(ID=11, 13), byte 2, as well as the Excitation duty cycle contained in the Alternator A/B read data field (ID=11, 13), byte1. Table 14 lists values for the excitation Current Limit contained in the Alternator A/B write data field (ID=29, 2A), byte 3. Table 15 lists the values for the alternator Manufacturer and Class code contained in the Alternator A/Bread data field (ID=12, 14), byte 1. REGULATION WITH LRC: In this mode, the 80310 regulates the alternator output to the set reference level. The excitation is controlled by LRC, if B+A is lower than VREG. DC can not be lower than DCMIN. This LRC mode is active until the detection of phase stop regulating RPM (fSTOP). In this case, the device goes back to the Pre-excitation mode. If the phase frequency reaches the LRC disable RPM default (fLRC), the device goes into regulation without LRC. REGULATION WITHOUT LRC: This mode is active when the phase frequency is above the LRC disable RPM default (fLRC), the first VREG was reached with LRC. The excitation is controlled only by the internal comparator of B+A and VREG. The DC can not be lower than DCMIN. If the phase frequency goes below the LRC disable RPM default (fLRC), then the 80310 comes back to the regulation with LRC mode. If the phase frequency goes below the phase stop regulating RPM, the device goes to Pre-excitation mode. 80310 16 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION COMMAND TABLES COMMAND TABLES Table 7. LIN Command Information Function VREG Digital LRC Rate LRC Disable Frequency Excitation Current Limitation (0 A to 7.75 A) Status & Diagnostic EXC Duty-Cycle Excitation Current Die Temperature Manufacturing Information Notes 17. This information is given as 6 bits and is only accurate: a) from 0 °C to 25 °C: - from 0 A to 3.875 A: +/- 375 mA - from 3.875 A to 7.75 A:+/- 10% b) outside the previous temperature range: - from 0 to 3.875 A: +/-625 mA - from 3.875 A to 7.75 A: +/-15% Currents higher than 7.75 A, which may be possible at low temperature, are reported as 7.75 A. Excitation Current and Die Temperature functions are exclusive. 18. This gives a resolution of 3.5 degrees and the accuracy is +/-10 degrees. Excitation Current and Die Temperature functions are exclusive. LIN W W W W R R R R R 6 Active Bits 6 4 4 5 5 5 (17) 6(18) 8 Table 8. LIN Byte/Direction Data Format MID (hex) ID [5:1] ALTERNATOR A 29 11 12 ALTERNATOR B 2A 13 14 GLOBAL 2B 3C 4 4 M to S M to S Write Regulator Control Data to Alt. A and Alt. B Global Sleep Command (first byte 0x00) 4 2 2 M to S S to M S to M Write Regulator Control Data to Alt. B Read Regulator Status 2 Bytes from Alt. B Read Regulator Identifier 2 Bytes from Alt. B 4 2 2 M to S S to M S to M Write Regulator Control Data to Alt. A Read Regulator Status 2 Bytes from Alt. A Read Regulator Identifier 2 Bytes from Alt. A Bytes Direction(19) Message Name Notes 19. M to S = Master to Slave; S to M = Slave to Master 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 17 FUNCTIONAL DEVICE OPERATION COMMAND TABLES Table 9. LIN Read/Write Data Format ALTERNATOR A DATA FIELD DESCRIPTION FOR ALTERNATOR A WRITE COMMAND: ID = 29 7 BYTE 1 x BYTE 2 Ramp Cutoff [3:0] BYTE 3 x BYTE 4 x x x x x x x x x x x Current LImit [4:0] Ramp Rate [3:0] x Target Voltage [5:0] 6 5 4 3 2 1 0 ALTERNATOR A DATA FIELD DESCRIPTION FOR ALTERNATOR A READ COMMAND: ID = 11 7 BYTE 1 EXC Duty Cycle [4:0] BYTE 2 LIN Bus Timeout Com error Measured Current or Temperature [5:0] F_EL F_MEC F_HT 6 5 4 3 2 1 0 ALTERNATOR A DATA FIELD DESCRIPTION FOR ALTERNATOR A READ COMMAND: ID = 12 7 BYTE 1 Class[4:0] BYTE 2 0 0 0 0 Slave Not Responding Checksum ID Parity Fault Sync Break Fault Manufacturer [2:0] 6 5 4 3 2 1 0 ALTERNATOR B DATA FIELD DESCRIPTION FOR ALTERNATOR B WRITE COMMAND: ID = 2A 7 BYTE 1 x BYTE 2 Ramp Cutoff [3:0] BYTE 3 x BYTE 4 x x x x x x x x x x x Current LImit [4:0] Ramp Rate [3:0] x Target Voltage [5:0] 6 5 4 3 2 1 0 80310 18 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION COMMAND TABLES Table 9. LIN Read/Write Data Format ALTERNATOR B DATA FIELD DESCRIPTION FOR ALTERNATOR B READ COMMAND: ID = 13 7 BYTE 1 EXC Duty Cycle [4:0] BYTE 2 LIN Bus Timeout Com error Measured Current or Temperature [5:0] F_EL F_MEC F_HT 6 5 4 3 2 1 0 ALTERNATOR B DATA FIELD DESCRIPTION FOR ALTERNATOR B READ COMMAND: ID = 14 7 BYTE 1 Manufacturer [2:0] BYTE 2 0 0 0 0 Slave Not Responding Checksum ID Parity Fault Sync Break Fault Class[4:0] 6 5 4 3 2 1 0 GLOBAL DATA FIELD DESCRIPTION FOR ALTERNATOR A+B WRITE COMMAND: ID = 2B(20) 7 BYTE 1 x BYTE 2 Ramp Cutoff [3:0] BYTE 3 x BYTE 4 x x x x x x x x x x x Current LImit [4:0] Ramp Rate [3:0] x Target Voltage [5:0] 6 5 4 3 2 1 0 GLOBAL DATA FIELD DESCRIPTION FOR ALTERNATOR A+B SLEEP COMMAND: ID = 3C(20) 7 BYTE 1 0 BYTE 2 x BYTE 3 x BYTE 4 x x x x x x x x x x x x x x x x x x x x x x 0 0 0 0 0 0 0 6 5 4 3 2 1 0 Notes 20. To access this command, NVM bit “Special LIN Features“ must have been programmed 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 19 FUNCTIONAL DEVICE OPERATION COMMAND TABLES Table 10. Target/Programmed Voltage Code 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 010101 010110 010111 011000 011001 011010 011011 011100 011101 011110 011111 V 10.6/OFF(21) 10.7 10.8 10.9 11.0 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 11.9 12.0 12.1 12.2 12.3 12.4 12.5 12.6 12.7 12.8 12.9 13.0 13.1 13.2 13.3 13.4 13.5 13.6 13.7 Code 100000 100001 100010 100011 100100 100101 100110 100111 101000 101001 101010 101011 101100 101101 101110 101111 110000 110001 110010 110011 110100 110101 110110 110111 111000 111001 111010 111011 111100 111101 111110 111111 V 13.8(22) 13.9 14.0 14.1 14.2 14.3 14.4 14.5 14.6 14.7 14.8 14.9 15.0 15.1 15.2 15.3 15.4 15.5 15.6 15.7 15.8 15.9 16.0 16.0 16.0 16.0 16.0 16.0 16.0 16.0 16.0 16.0 Notes 21. If 000000 is sent the regulator will set 10.60 V or shutdown if no LIN command with a voltage setting higher than 10.6 V was sent beforehand. 22. Default for self-start, adjustable in OTP between 13.5 V and 15.0 V. 80310 20 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION COMMAND TABLES Table 11. LRC Programming Information. Ramp Time 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Seconds 0 1.3 2.1 3.0(23) 3.8 4.7 5.5 6.4 7.2 8.1 8.9 9.8 10.6 11.5 12.3 13.2 Ramp Cut-off 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 RPM 2400 2530 2670 2830 3000(23) 3200 3430 3690 4000 4360 4790 5320 5990 6860 8010 Always Active Notes 23. Default, adjustable by OTP. 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 21 FUNCTIONAL DEVICE OPERATION COMMAND TABLES Table 12. Temperature Information, Sent Back to the Master. Temperature 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 010101 010110 010111 011000 011001 011010 011011 011100 011101 011110 011111 oC Temperature 100000 100001 100010 100011 100100 100101 100110 100111 101000 101001 101010 101011 101100 101101 101110 101111 110000 110001 110010 110011 110100 110101 110110 110111 111000 111001 111010 111011 111100 111101 111110 111111 oC -40 -36.5 -33 -29.5 -26 -22.5 -19 -15.5 -12 -8.5 -5 -1.5 2 5.5 9 12.5 16 19.5 23 26.5 30 33.5 37 40.5 44 47.5 51 54.5 58 61.5 65 68.5 72 75.5 79 82.5 86 89.5 93 96.5 100 103.5 107 110.5 114 117.5 121 124.5 128 131.5 135 138.5 142 145.5 149 152.5 156 159.5 163 166.5 170 173.5 177 180.5 80310 22 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION COMMAND TABLES Table 13. Excitation Information sent back to the Master. EXC Code 000000 000010 000100 000110 001000 001010 001100 001110 010000 010010 010100 010110 011000 011010 011100 011110 100000 100010 100100 100110 101000 101010 101100 101110 110000 110010 110100 110110 111000 111010 111100 111110 EXC Current (A)(24) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 5.75 6 6.25 6.5 6.75 7 7.25 7.5 7.75 DF Code (EXC duty cycle) 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111 DF (%)(25) 0 3. 6.5 9.5 13 16 19.5 22.5 26 29 32.5 35.5 38.5 42 45 48.5 51.5 55 58 61.5 64.5 67.5 71 74 77.5 80.5 84 87 90.5 93.5 97 100 Notes 24. 6 bits of data will be available, but only 5 bits are tabulated. 25. Rounded to nearest half percent. 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 23 FUNCTIONAL DEVICE OPERATION COMMAND TABLES Table 14. More Excitation Information, Received from the Master. Current Limitation(26) 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111 Notes 26. Default is “00000”, no limitation. A No Limit 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.25 2.5 2.75 3.0 3.25 3.5 3.75 4.0 4.25 4.5 4.75 5.0 5.25 5.5 5.75 6.0 6.25 6.5 6.75 7.0 7.25 7.5 7.75 80310 24 Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION THERMAL COMPENSATION THERMAL COMPENSATION This function is activated when internal temperature is above thermal threshold (135,145,150, or 160 degrees). In this case, the V setting fixed by the LIN or by default is compensated to reduce internal temperature. The de-rating is calculated depending on the 4 categories of V setting. Figure 11. Thermal Compensation Table 15. Thermal Compensation Ptc (mV/degree) Vset[5:4] 00 01 10 11 Vset (V) 10.6-12.1 V 12.2-13.7 V 13.8-15.3 V 15.4-16 V 135 50 100 100 200 Thermal Threshold (degrees) 145 50 100 200 200 150 50 100 200 200 160 100 200 400 400 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 25 FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSIS FEATURES PROTECTION AND DIAGNOSIS FEATURES FAULT DETECTION General Notes All fault reporting passes through a 400 ms digital filter to avoid false indication problems, and transition from one fault type to another should be “clean”. The programmed threshold in hexadecimal corresponds to the following temperature in degrees: • 6'b110010;//135degres • 6'b110100;//145degres • 6'b110110;//150degres • 6'b111001;//160degres ADDITIONAL ERRORS LIN Bus Timeout Check two timeouts: • Activity on RXD is below 3 or 8 seconds (depending on the OTP bit) • Time between two consecutive valid messages is below 3 or 8 seconds (depending on the OTP bit) This flag is reset once the microcontroller sends MID 11 for ALTA, or MID 13 for Alt B. Reported in Alternator A/B read data field (ID=11, 13), byte 2. Comm Error Checks the ID parity bits + Checksum byte + (TXD = RXD when responding) + LIN Physical layout not in over-current limitation. Reported in Alternator A/B read data field (ID=11, 13), byte 2. LIN protocol errors: • Sync Break Error: This flag is up when Synchro break Field duration is lower than 10Tbits. • Identifier parity Error: Comm error flag also reported in MID11 • Checksum Error: Comm error flag also reported in MID11 • Slave not responding Error: Tframe Max exceeded (LIN Specification revision 1.3). These flags are reset once the microcontroller sends MID 12 for ALTA, or MID 14 for Alt B. Reported in Alternator A/B read data field (ID=12, 14), byte 2. MECHANICAL FAULT (F_MEC) The Phase is off (Low Phase RPM below stop_regulation threshold). Reported in Alternator A/B read data field (ID=11, 13), byte 1. ELECTRICAL FAULT (F_EL) If one of these faults appear: • The number of “1”s in all the OTP bits, NVM[80:1] is not ODD. The parity bit is included in the calculation • The Phase is on (Low Phase RPM above stop_regulation threshold) but High Phase 1 is not detected • B+A reaches 16.5 V with EXC at 100% DC • Short circuit excitation load • B+A stays at 75% of the target voltage when LRC is off Note: This 5th additional condition is enabled only when the NVM bit “Low Voltage Threshold” is enabled. Reported in Alternator A/B read data field (ID=11, 13), byte 1. ELECTRICAL FAULT (HP MASK) A fault detection when High phase signal is cut is reported on the electrical fault. Option (OTP) available to remove this fault detection. THERMAL FAULT (F_HT) A thermal fault is reported when the die temperature exceeds the programmed threshold. Reported in Alternator A/B read data field (ID=11, 13), byte 1. 80310 26 Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGING DIE DIMENSIONS PACKAGING DIE DIMENSIONS 5050μm 1 PH2 BUS 2 3 PH1 6080 μm SGND ORIGIN (0,0) 4 5 Y Axis B+A 6 EXC PGND 7 X Axis SCALE = Approximately 20:1 Pad Function Die Coordinates (Origin at Center of Die) X /μm Y /μm 2158 1217 834 0 -840 -1987 -2631 1 2 3 4 5 6 7 PH2 PH1 BUS SIGNAL GROUND(27) B+A EXC POWER GROUND(27) 2166 2098 -1989 -1989 1179 1179 - 367 Notes 27. Both Signal and Power Grounds must be connected for correct operation. 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 27 PACKAGING DIE CHARACTERISTICS DIE CHARACTERISTICS The die is designed to be fitted into a customer designed package, however as so many wiring configurations exist not all may be possible from the same die design. Due to thermal considerations, soldering is the preferred die attach method, but under some circumstances, conductive epoxy may be acceptable. Table 16. Physical Die Characteristics. Mechanical data Main Bonding Pad Size (200 μm wire) Die Size (Length x Width) Die Thickness Die Back Metal Composition Die Back Metal Thickness, Typical Die Top Metal Thickness, Typical Die Top Metal Composition Length 0.66 6.08 0.36 Cr/CrAg/Ag 2.1 2.0 99.5 Al Width 0.5 5.05 N/A N/A N/A N/A 0.5 Cu Units mm mm mm N/A μm μm % 80310 28 Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGING OTP DEFAULT CONFIGURATION (WITHOUT ANY PROGRAMMING) OTP DEFAULT CONFIGURATION (WITHOUT ANY PROGRAMMING) Default Regulation Voltage: 13.5 V Phase Start Regulation: 800 RPM Phase Stop Regulation: 500 RPM LRC disable: 2400 RPM LRC Rate: No LRC Alternator Pole-pairs: 6 Slave Address: MID 29/11/12 Self start: ON Self start threshold: 3000 RPM BUS Time-out: 3 s LIN Readout: Current Thermal Compensation Threshold: 160 °C 10.6 V Reg: OFF. The 10.6 V command is a real 10.6 V regulation when phase is ON (if Programmed, this command becomes a regulation OFF command; lower regulation command is 10.7 V) EL Fault HP mask: ON The fault detection when the high phase signal is cut, is reported on the electrical fault (if programmed, this part of the electrical fault is masked) Low voltage threshold: none One pole Filter: No, default is 2 pole filter Crest regulation: OFF LIN Com with Global ID (MID 2B + 3C): OFF CREST REGULATION Crest regulation bit OFF: The product is in load dump mode. EXC is stopped when the internal filter reaches Load dump detection threshold (21 V typ.). The delay is given by the internal filter (~1.0 ms). Crest regulation bit is ON: The product is in crest regulation mode. EXC is stopped immediately when internal ADC reaches 21 V. The delay is given by the ADC (~16 µs). For these two modes, Load Dump or Crest regulation, EXC is always OFF if the condition on B+A is present. 80310 Analog Integrated Circuit Device Data Freescale Semiconductor 29 REVISION HISTORY REVISION HISTORY REVISION 1.0 2.0 DATE 12/2008 5/2011 DESCRIPTION OF CHANGES • • • • • • • • • • • • • Initial Release Add ESD values and electrical characteristics Add limits max/min in electrical characteristics table + graphs Remove backmetal option Add Table1 Page 2. Version-determined Electrical parameters Change Thermal Shutdown value, Modification in the LIN fault detection paragraph. Change wording in LIN Fault detection paragraph Add machine Model in electrical ratings table Change LIN timeout value (1.3s instead of 8s) + slight changes in diagrams Wording change Change in table 1 page 3 on BUS inactivity column from 3/8 to 1.31/3 Change in figure 1 and 2 + device table Added TC80310AWS to the ordering information 80310 30 Analog Integrated Circuit Device Data Freescale Semiconductor How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. 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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009-2011. All rights reserved. TC80310 Rev 2.0 5/2011