Freescale Semiconductor
Advance Information
Document Number: MPC7410ECS02AD Rev. 2.0, 11/2007
--- Preliminary --MPC7410 RISC Microprocessor Hardware Specifications Addendum for the MPC7410xxnnnNE Series
This document describes part number-specific changes to recommended operating conditions and revised electrical specifications, as applicable, from those described in the general MPC7410 Hardware Specifications (Document No. MPC7410EC). Specifications provided in this document supersede those in the MPC7410 Hardware Specifications, for the part numbers listed in Table A only. Specifications not addressed herein are unchanged. Because this document is frequently updated, refer to http://www.freescale.com or to your Freescale sales office for the latest version. Note that headings and table numbers in this document are not consecutively numbered. They are intended to correspond to the heading or table affected in the general hardware specification. Part numbers addressed in this document are listed in Table A. For more detailed ordering information see Table 17.
Freescale Part Numbers Affected: MPC7410RX400NE MPC7410HX400NE MPC7410VS400NE MC7410VU400NE MPC7410RX450NE MPC7410HX450NE MPC7410VS450NE MC7410VU450NE
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2002, 2007. All rights reserved.
Features
Table A. Part Numbers Addressed by this Data Sheet
Operating Conditions Freescale Part Number CPU Frequency 400 MHz Vdd 1.5V±50mV TJ (°C) 0 to 105 OVdd 1.8/2.5 V Significant Differences from Hardware Specification
MPC7410RX400NE MPC7410HX400NE MPC7410VS400NE MC7410VU400NE
Reduced core voltage to achieve lower power consumption. Removes 3.3V OVdd support. For all AC/DC specifications not mentioned in this document, please refer to the MPC7410(RX/HX/VS)400LE and MC7410VU400LE specifications in the general M PC7410 Hardware Specifications.
450 MHz
1.8V ±100mV
0 to 105
1.8/2.5/3.3 V The MPC7410(RX/HX/VS)400NE and MC7410VU400NE also fully conform to the MPC7410(RX/HX/VS)450LE and MC7410VU450LE specifications, respectively. Refer to the general MPC7410 Hardware Specifications. 1.8/2.5 V Reduced core voltage to achieve lower power consumption. Removes 3.3V OVdd support. For all AC/DC specifications not mentioned in this document, please refer to the MPC7410(RX/HX/VS)450LE and MC7410VU450LE specifications in the general M PC7410 Hardware Specifications.
MPC7410RX450NE MPC7410HX450NE MPC7410VS450NE MC7410VU450NE
450 MHz
1.5V±50mV
0 to 105
500 MHz
1.8V ±100mV
0 to 105
1.8/2.5/3.3 V The MPC7410(RX/HX/VS)450NE and MC7410VU400NE also fully conform to the MPC7410(RX/HX/VS)500LE and MC7410VU500LE specifications, respectively. Refer to the general MPC7410 Hardware Specifications.
2 Features
This section summarizes changes to the features of the MPC7410 described in the MPC7410 Hardware Specifications. • Bus interface — Selectable interface voltages of 1.8 V, 2.5 V (3.3 V not supported)
4.1 DC Electrical Characteristics
Voltage to the L2 I/Os and processor interface I/Os are provided through separate sets of supply pins and may be provided at the voltages shown in Table 2.
M PC7410 RISC Microprocessor Hardware Specifications Addendum for the MPC7410xxnnnNE Series, Rev. 2.0 2 Freescale Semiconductor
Features
Table 2. Input Threshold Voltage Setting
BVSEL Signal 3 0 HRESET 1 HRESET Processor Bus Input Threshold is Relative to: 1.8 V 2.5 V Not Supported Not Supported L2VSEL Signal 3 0 HRESET 1 HRESET L2 Bus Input Threshold is Relative to: 1.8 V 2.5 V 2.5 V Not Supported Note 1 1, 2 1, 4, 5 —
Notes: 1. Caution: The input threshold selection must agree with the OVdd/L2OVdd voltages supplied. 2. To select the 2.5-V threshold option, BVSEL and/or L2VSEL should be tied to HRESET so that the two signals change state together. This is the preferred method for selecting this mode of operation. 3. To overcome the internal pull-up resistance, a pull-down resistance less than 250 ohms should be used. 4. Default voltage setting if left unconnected (internal pulled-up). 5. Caution: The XPC7410RXnnnNE does not support the default OVdd setting of 3.3 V. The BVSEL input must be tie either low or to HRESET.
Table 3 provides the recommended operating conditions for the MPC7410 part numbers described herein.
Table 3. Recommended Operating Conditions
Characteristic Core supply voltage PLL supply voltage L2 DLL supply voltage Processor bus supply voltage BVSEL = 0 BVSEL = HRESET BVSEL = HRESET or BVSEL = 1 L2 bus supply voltage L2VSEL = 0 L2VSEL = HRESET or L2VSEL = 1 Input voltage Processor bus and JTAG Signals L2 Bus Die-junction temperature Symbol Vdd AVdd L2AVdd OVdd OVdd OVdd L2OVdd L2OVdd Recommended Value 1.5V ± 50mV 1.5V ± 50mV 1.5V ± 50mV 1.8V ± 100mV 2.5V ± 100mV Not Supported 1.8V ± 100mV 2.5V ± 100mV Unit V V V V V V V V
Vin Vin Tj
GND to OVdd GND to L2OVdd 0 to 105
V V °C
Note: These are the recommended and tested operating conditions. Proper device operation outside of these conditions is not guaranteed.
M PC7410 RISC Microprocessor Hardware Specifications Addendum for the MPC7410xxnnnNE Series, Rev. 2.0 Freescale Semiconductor 3
Features
Table 7 provides the power consumption for the MPC7410 part at the frequencies described herein.
Table 7. Power Consumption for MPC7410
Processor (CPU) Frequency 400Mhz Full-On Mode Typical Maximum Doze Mode Maximum Nap Mode Maximum Sleep Mode Maximum 1.3 1.45 W 1, 2 1.35 1.5 W 1, 2 3.6 4.1 W 1, 2 2.92 6.6 3.29 7.43 W W 1, 3 1, 2, Processor (CPU) Frequency 450Mhz
Unit
Notes
Sleep Mode—PLL and DLL Disabled Typical Maximum 0.6 1.1 0.6 1.1 W W 1, 3 1, 2
Notes: 1. These values apply for all valid processor bus and L2 bus ratios. The values do not include I/O Supply Power (OVdd and L2OVdd) or PLL/DLL supply power (AVdd and L2AVdd). OVdd and L2OVdd power is system dependent, but is typically
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