MPXHZ6130A6T1

Freescale Semiconductor Technical Data MPXHZ6130A Rev 0, 07/2006 Media Resistant and High Temperature Accuracy Integrated Silicon Pressure Sensor for Measuring Absolute Pressure, On-Chip Signal Conditioned, Temperature Compensated and Calibrated The MPXHZ6130A series sensor integrates on-chip, bipolar op amp circuitry and thin film resistor networks to provide a high output signal and temperature compensation. The sensor's packaging has been designed to provide resistance to high humidity conditions as well as common automotive media. The small form factor and high reliability of on-chip integration make the Freescale Semiconductor, Inc. pressure sensor a logical and economical choice for the system designer. The MPXHZ6130A series piezoresistive transducer is a state-of-the-art, monolithic, signal conditioned, silicon pressure sensor. This sensor combines advanced micromachining techniques, thin film metallization, and bipolar semiconductor processing to provide an accurate, high level analog output signal that is proportional to applied pressure. Figure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip. Features • Resistant to High Humidity and Common Automotive Media • Improved Accuracy at High Temperature • 1.5% Maximum Error over 0° to 85°C • Ideally suited for Microprocessor or Microcontroller-Based Systems • Temperature Compensated from -40° to +125°C • Durable Thermoplastic (PPS) Surface Mount Package Typical Applications • Aviation Altimeters • Industrial Controls • Engine Control/Manifold Absolute Pressure (MAP) • Weather Station and Weather Reporting Devices ORDERING INFORMATION Device Type Basic Element Ported Element MPXHZ6130A SERIES INTEGRATED PRESSURE SENSOR 15 TO 130 kPa (2.2 TO 18.9 PSI) 0.2 TO 4.8 V OUTPUT SUPER SMALL OUTLINE PACKAGE MPXHZ6130A6U CASE 1317-04 MPXHZ61630AC6U CASE 1317A-03 SUPER SMALL OUTLINE PACKAGE PIN NUMBERS(1) 1 2 3 4 N/C VS GND VOUT 5 6 7 8 N/C N/C N/C N/C 1. Pins 1, 5, 6, 7, and 8 are internal device connections. Do not connect to external circuitry or ground. Pin 1 is denoted by the notch in the lead. Options Case No. 1317 1317 MPX Series Order No. MPXHZ6130A6U MPXHZ6130A6T1 Packing Options Rails Device Marking MPXHZ6130A SUPER SMALL OUTLINE PACKAGE Absolute, Element Only Absolute, Element Only Absolute, Axial Port Absolute, Axial Port Tape & Reel MPXHZ6130A Rails MPXHZ6130A 1317A MPXHZ6130AC6U 1317A MPXHZ6130AC6T1 Tape & Reel MPXHZ6130A © Freescale Semiconductor, Inc., 2006. All rights reserved. VS Sensing Element Thin Film Temperature Compensation and Gain Stage #1 Gain Stage #2 and Ground Reference Shift Circuitry VOUT GND Pins 1, 5, 6, 7, and 8 are No Connects Figure 1. Fully Integrated Pressure Sensor Schematic Table 1. Maximum Ratings(1) Rating Maximum Pressure (P1 > P2) Storage Temperature Operating Temperature Output Source Current @ Full Scale Output(2) Output Sink Current @ Minimum Pressure Offset(2) Symbol Pmax Tstg TA Io + Io Value 400 -40° to +125° -40° to +125° 0.5 -0.5 Units kPa °C °C mAdc mAdc 1. Exposure beyond the specified limits may cause permanent damage or degradation to the device. 2. Maximum Output Current is controlled by effective impedance from Vout to Gnd or Vout to VS in the application circuit. MPXHZ6130A 2 Sensors Freescale Semiconductor Table 2. Operating Characteristics (VS = 5.0 Vdc, TA = 25°C unless otherwise noted, P1 > P2) Characteristic Pressure Range Supply Voltage(1) Supply Current Minimum Pressure Offset(2) @ VS = 5.0 Volts Full Scale Output(3) @ VS = 5.0 Volts Full Scale Span(4) @ VS = 5.0 Volts Accuracy(5) Sensitivity Response Time(6) Warm-Up Time(7) Offset Stability(8) 1. Device is ratiometric within this specified excitation range. 2. Offset (Voff) is defined as the output voltage at the minimum rated pressure. 3. Full Scale Output (VFSO) is defined as the output voltage at the maximum or full rated pressure. 4. Full Scale Span (VFSS) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the minimum rated pressure. 5. Accuracy is the deviation in actual output from nominal output over the entire pressure range and temperature range as a percent of span at 25°C due to all sources of error including the following: • Linearity: Output deviation from a straight line relationship with pressure over the specified pressure range. • Temperature Hysteresis: Output deviation at any temperature within the operating temperature range, after the temperature is cycled to and from the minimum or maximum operating temperature points, with zero differential pressure applied. • Pressure Hysteresis: Output deviation at any pressure within the specified range, when this pressure is cycled to and from minimum or maximum rated pressure at 25°C. • TcSpan: Output deviation over the temperature range of 0° to 85°C, relative to 25°C. • TcOffset: Output deviation with minimum pressure applied, over the temperature range of 0° to 85°C, relative to 25°C. 6. Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to a specified step change in pressure. 7. Warm-up Time is defined as the time required for the product to meet the specified output voltage after the pressure has been stabilized. 8. Offset Stability is the product's output deviation when subjected to 1000 cycles of Pulsed Pressure, Temperature Cycling with Bias Test. (0 to 85°C) Symbol POP VS Io Voff Min 15 4.75 — 0.132 Typ — 5.0 6.0 0.200 Max 130 5.25 10 0.268 Unit kPa Vdc mAdc Vdc (0 to 85°C) VFSO 4.632 4.700 4.768 Vdc (0 to 85°C) VFSS 4.365 4.500 4.635 Vdc (0 to 85°C) — V/P tR — — — — — — — — 39.2 1.0 20 ± 0.25 ±1.5 — — — — %VFSS mV/kPa ms ms %VFSS MPXHZ6130A Sensors Freescale Semiconductor 3 . +5.0 V Die Wire Bond Lead Frame GND Pin 3 Absolute Element Sealed Vacuum Reference Die Bond P1 Stainless Steel Cap Thermoplastic Case VS Pin 2 100 nF MPXHZ6130A Vout Pin 4 47 pF 51 K to ADC Fluoro Silicone Gel Die Coat Figure 2. Cross Sectional Diagram SOP (Not to Scale) Figure 3. Typical Application Circuit (Output Source Current Operation) 5.0 Transfer Function: 4.5 Vout =Vs x (0.007826 xP(kPa) - 0.07739) 4.0 +/- (PE x TM x Vs x 0.007826) Output (Volts) 3.5 PE = +/- 1.725kPa 3.0 TM = 1 @ 0 to 85°C Vs = 5.0Vdc 2.5 2.0 1.5 1.0 0.5 60 0 MAX MIN TYP 100 110 120 130 Pressure (ref: to sealed vacuum) in kPa Figure 4. Output versus Absolute Pressure Figure 4 shows the sensor output signal relative to pressure input. Typical minimum and maximum output curves are shown for operation over 0 to 85°C temperature range. The output will saturate outside of the rated pressure range. A gel die coat isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the sensor diaphragm. The gel die coat and durable polymer package provide a media resistant barrier that allows the sensor to operate reliably in high humidity conditions as well as environments containing common automotive media. Contact the factory for more information regarding media compatibility in your specific application. MPXHZ6130A 4 Sensors Freescale Semiconductor 140 10 20 30 40 50 70 80 90 Transfer Function (MPXHZ6130A) Nominal Transfer Value: Vout = VS x (0.007826 x P(kPa) - 0.07739) ± (Pressure Error x Temp. factor x 0.007826 x VS) VS = 5.0 ± 0.25 Vdc Temperature Error Band 4.0 3.0 Temperature Error Factor 2.0 1.0 0.0 -40 -20 0 20 MPXHZ6130A Series Break Points Temp - 40 0 to 85 125 Multiplier 3 1 1.75 40 60 80 100 120 140 Temperature in Cº NOTE: The Temperature Multiplier is a linear response from 0ºC to -40ºC and from 85ºC to 125ºC Pressure Error Band 3.0 2.0 Pressure Error (kPa) 1.0 0.0 -1.0 -2.0 -3.0 Pressure 15 to 130 (kPa) Error (Max) ±1.725 (kPa) 20 40 60 80 100 120 Pressure (in kPa) Error Limits for Pressure MPXHZ6130A Sensors Freescale Semiconductor 5 MINIMUM RECOMMENDED FOOTPRINT FOR SUPER SMALL PACKAGES Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor package must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self-align when subjected to a 0.050 1.27 TYP 0.150 3.81 solder reflow process. It is always recommended to fabricate boards with a solder mask layer to avoid bridging and/or shorting between solder pads, especially on tight tolerances and/or tight layouts. 0.387 9.83 0.027 TYP 8X 0.69 0.053 TYP 8X 1.35 inch mm Figure 5. SSOP Footprint (Case 1317 and 1317A) PACKAGE DIMENSIONS CASE 1317-04 ISSUE F SUPER SMALL OUTLINE PACKAGE MPXHZ6130A 6 Sensors Freescale Semiconductor PACKAGE DIMENSIONS CASE 1317A-03 ISSUE C SUPER SMALL OUTLINE PACKAGE MPXHZ6130A Sensors Freescale Semiconductor 7 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. 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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006. All rights reserved. MPXHZ6130A Rev. 0 07/2006