Freescale Semiconductor Technical Data
Document Number: MRFE6VP6300H Rev. 1, 7/2011
RF Power Field Effect Transistors
High Ruggedness N--Channel Enhancement--Mode Lateral MOSFETs
These high ruggedness devices are designed for use in high VSWR industrial (including laser and plasma exciters), broadcast (analog and digital), aerospace and radio/land mobile applications. They are unmatched input and output designs allowing wide frequency range utilization, between 1.8 and 600 MHz. • Typical Performance: VDD = 50 Volts, IDQ = 100 mA
Signal Type Pulsed (100 μsec, 20% Duty Cycle) CW Pout (W) 300 Peak 300 Avg. f (MHz) 230 130 Gps (dB) 26.5 25.0 ηD (%) 74.0 80.0 IRL (dB) --16 --15
MRFE6VP6300HR3 MRFE6VP6300HSR3
1.8-600 MHz, 300 W, 50 V LATERAL N-CHANNEL BROADBAND RF POWER MOSFETs
• Capable of Handling a Load Mismatch of 65:1 VSWR, @ 50 Vdc, 230 MHz, at all Phase Angles • 300 Watts CW Output Power • 300 Watts Pulsed Peak Power, 20% Duty Cycle, 100 μsec • Capable of 300 Watts CW Operation Features • Unmatched Input and Output Allowing Wide Frequency Range Utilization • Device can be used Single--Ended or in a Push--Pull Configuration • Qualified Up to a Maximum of 50 VDD Operation • Characterized from 30 V to 50 V for Extended Power Range • Suitable for Linear Application with Appropriate Biasing • Integrated ESD Protection • Greater Negative Gate--Source Voltage Range for Improved Class C Operation • Characterized with Series Equivalent Large--Signal Impedance Parameters • RoHS Compliant • NI--780--4 in Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width, 13 inch Reel. For R5 Tape and Reel options, see p. 14. • NI--780S--4 in Tape and Reel. R3 Suffix = 250 Units, 32 mm Tape Width, 13 inch Reel. For R5 Tape and Reel options, see p. 14. Table 1. Maximum Ratings
Rating Drain--Source Voltage Gate--Source Voltage Storage Temperature Range Case Operating Temperature Total Device Dissipation @ TC = 25°C Derate above 25°C Operating Junction Temperature (1,2) Symbol VDSS VGS Tstg TC PD TJ Value --0.5, +130 --6.0, +10 --65 to +150 150 1050 5.26 225 Unit Vdc Vdc °C °C W W/°C °C
CASE 465M-01, STYLE 1 NI-780-4 MRFE6VP6300HR3
CASE 465H-02, STYLE 1 NI-780S-4 MRFE6VP6300HSR3
RFin/VGS 3
1 RFout/VDS
RFin/VGS 4
2 RFout/VDS
(Top View)
Figure 1. Pin Connections
Table 2. Thermal Characteristics
Characteristic Thermal Resistance, Junction to Case (4) Pulsed: Case Temperature 75°C, 300 W Pulsed, 100 μsec Pulse Width, 20% Duty Cycle, 50 Vdc, IDQ = 100 mA, 230 MHz CW: Case Temperature 87°C, 300 W CW, 50 Vdc, IDQ = 1100 mA, 230 MHz Symbol Value (2,3) Unit °C/W ZθJC RθJC 0.05 0.19
1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1955. 4. Same test circuit is used for both pulsed and CW.
© Freescale Semiconductor, Inc., 2010--2011. All rights reserved.
MRFE6VP6300HR3 MRFE6VP6300HSR3 1
RF Device Data Freescale Semiconductor
Table 3. ESD Protection Characteristics
Test Methodology Human Body Model (per JESD22--A114) Machine Model (per EIA/JESD22--A115) Charge Device Model (per JESD22--C101) Class 2 (Minimum) B (Minimum) IV (Minimum)
Table 4. Electrical Characteristics (TA = 25°C unless otherwise noted)
Characteristic Off Characteristics
(1)
Symbol IGSS V(BR)DSS IDSS IDSS
Min — 130 — —
Typ — — — —
Max 1 — 5 10
Unit μAdc Vdc μAdc μAdc
Gate--Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) Drain--Source Breakdown Voltage (VGS = 0 Vdc, ID = 50 mA) Zero Gate Voltage Drain Leakage Current (VDS = 50 Vdc, VGS = 0 Vdc) Zero Gate Voltage Drain Leakage Current (VDS = 100 Vdc, VGS = 0 Vdc) On Characteristics Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 480 μAdc) Gate Quiescent Voltage (VDD = 50 Vdc, ID = 100 mAdc, Measured in Functional Test) Drain--Source On--Voltage (1) (VGS = 10 Vdc, ID = 1 Adc) Dynamic Characteristics (1) Reverse Transfer Capacitance (VDS = 50 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Output Capacitance (VDS = 50 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Input Capacitance (VDS = 50 Vdc, VGS = 0 Vdc ± 30 mV(rms)ac @ 1 MHz)
VGS(th) VGS(Q) VDS(on)
1.7 2.0 —
2.2 2.5 0.25
2.7 3.0 —
Vdc Vdc Vdc
Crss Coss Ciss
— — —
0.8 76 188
— — —
pF pF pF
Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 100 mA, Pout = 300 W Peak (60 W Avg.), f = 230 MHz, Pulsed, 100 μsec Pulse Width, 20% Duty Cycle Power Gain Drain Efficiency Input Return Loss VSWR 65:1 at all Phase Angles Pulsed: Pout = 300 W Peak (60 W Avg.), f = 230 MHz, Pulsed, 100 μsec Pulse Width, 20% Duty Cycle CW: Pout = 300 W Avg., f = 130 MHz 1. Each side of device measured separately. Gps ηD IRL 25.0 72.0 — 26.5 74.0 --16 28.0 — --9 dB % dB
Load Mismatch (In Freescale Application Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 100 mA Ψ No Degradation in Output Power
MRFE6VP6300HR3 MRFE6VP6300HSR3 2 RF Device Data Freescale Semiconductor
VBIAS
+ C8 L1 C9
+ C14
+ C15 L2 C10 C11 C12 C13
+ C16
VSUPPLY
C4 RF INPUT
C5
C6
C7
R1 Z8 Z9 Z10 Z11 Z12 C20 C17 C18 C19 Z13
RF OUTPUT
Z1 C1
Z2
Z3
Z4
Z5
Z6
Z7 DUT
C2
C3
Z1 Z2* Z3* Z4 Z5 Z6 Z7, Z8
0.352″ x 0.080″ Microstrip 1.780″ x 0.080″ Microstrip 0.576″ x 0.080″ Microstrip 0.220″ x 0.220″ Microstrip 0.322″ x 0.220″ Microstrip 0.168″ x 0.220″ Microstrip 0.282″ x 0.630″ Microstrip
Z9 Z10* Z11* Z12* Z13
0.192″ x 0.170″ Microstrip 0.366″ x 0.170″ Microstrip 2.195″ x 0.170″ Microstrip 0.614″ x 0.170″ Microstrip 0.243″ x 0.080″ Microstrip
* Line length includes microstrip bends
Note: Same test circuit is used for both pulsed and CW.
Figure 2. MRFE6VP6300HR3(HSR3) Test Circuit Schematic
Table 5. MRFE6VP6300HR3(HSR3) Test Circuit Component Designations and Values
Part C1, C20 C2 C3, C17 C4, C10 C5, C11 C6 C7 C8 C9 C12 C13 C14, C15, C16 C18, C19 L1 L2 R1 PCB Description 15 pF Chip Capacitors 82 pF Chip Capacitor 91 pF Chip Capacitors 1000 pF Chip Capacitors 10K pF Chip Capacitors 0.1 μF, 50 V Chip Capacitor 2.2 μF, 100 V Chip Capacitor 10 μF, 35 V Tantalum Capacitor 2.2 μF, 100 V Chip Capacitor 0.1 μF, 100 V Chip Capacitor 0.01 μF, 100 V Chip Capacitor 220 μF, 100 V Electolytic Capacitors 18 pF Chip Capacitors 120 nH Inductor 17.5 nH Inductor 1000 Ω, 1/2 W Chip Resistor 0.030″, εr = 2.55 Part Number ATC100B150JT500XT ATC100B820JT500XT ATC100B910JT500XT ATC100B102JT50XT ATC200B103KT50XT CDR33BX104AKWS HMK432B7225KM--T T491D106K035AT G2225X7R225KT3AB C1812F104K1RAC C1825C103K1GAC MCGPR100V227M16X26--RH ATC100B180JT500XT 1812SMS--R12JLC GA3095--ALC CRCW20101K00FKEF AD255A Manufacturer ATC ATC ATC ATC ATC AVX Taiyo Yuden Kemet ATC Kemet Kemet Multicomp ATC Coilcraft Coilcraft Vishay Arlon
MRFE6VP6300HR3 MRFE6VP6300HSR3 RF Device Data Freescale Semiconductor 3
C8
C14 L1 C6 C5 C7
C15 C13 C12 C16
C9 C10
C11
C1
C4 C3 C2 R1 CUT OUT AREA L2 C17 C18 C20 C19
MRFE6VP6300H/HS Rev. 2
Figure 3. MRFE6VP6300HR3(HSR3) Test Circuit Component Layout
MRFE6VP6300HR3 MRFE6VP6300HSR3 4 RF Device Data Freescale Semiconductor
TYPICAL CHARACTERISTICS — PULSED
1000 Pout, OUTPUT POWER (dBm) PULSED Ciss C, CAPACITANCE (pF) 100 Coss 10 60 59 58 57 56 55 54 53 26 VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz Pulse Width = 100 μsec, 20% Duty Cycle 27 28 29 30 31 32 33 34 P3dB = 56.0 dBm (398 W) P2dB = 55.8 dBm (380 W) Ideal
P1dB = 55.4 dBm (344 W) Actual
1 Measured with ±30 mV(rms)ac @ 1 MHz VGS = 0 Vdc 0 10 20 30 40
Crss
0.1
50
VDS, DRAIN--SOURCE VOLTAGE (VOLTS)
Pin, INPUT POWER (dBm) PULSED
Note: Each side of device measured separately. Figure 4. Capacitance versus Drain-Source Voltage
29 28 Gps, POWER GAIN (dB) 27 26 25 24 23 22 20 ηD 100 Pout, OUTPUT POWER (WATTS) PULSED 20 600 Gps VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz Pulse Width = 100 μsec, 20% Duty Cycle 90 80 Gps, POWER GAIN (dB) 70 60 50 40 30 ηD, DRAIN EFFICIENCY (%) 29 28 27 26 25 24 23 22 21 20 19 0
Figure 5. Pulsed Output Power versus Input Power
VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz Pulse Width = 100 μsec, 20% Duty Cycle
50 V 40 V 35 V VDD = 30 V 50 100 150 200 250 300 350 400 45 V
Pout, OUTPUT POWER (WATTS) PULSED
Figure 6. Pulsed Power Gain and Drain Efficiency versus Output Power
90 80 ηD, DRAIN EFFICIENCY (%) 70 60 50 40 30 20 VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz Pulse Width = 100 μsec, 20% Duty Cycle 0 50 100 150 200 250 300 350 400 VDD = 30 V 35 V 40 V 45 V 50 V Gps, POWER GAIN (dB) 29
Figure 7. Pulsed Power Gain versus Output Power
90 80 ηD, DRAIN EFFICIENCY (%)
VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz 28 Pulse Width = 100 μsec, 20% Duty Cycle 27 26 25 24 23 22 21 10 85_C ηD 100 TC = --30_C 25_C Gps
85_C
25_C
--30_C 70 60 50 40 30 20 10 600
Pout, OUTPUT POWER (WATTS) PULSED
Pout, OUTPUT POWER (WATTS) PULSED
Figure 8. Pulsed Drain Efficiency versus Output Power
Figure 9. Pulsed Power Gain and Drain Efficiency versus Output Power
MRFE6VP6300HR3 MRFE6VP6300HSR3 RF Device Data Freescale Semiconductor 5
TYPICAL CHARACTERISTICS — TWO-TONE (1)
--10 IMD, INTERMODULATION DISTORTION (dBc) --20 --30 --40 --50 --60 --70 7th Order --80 10 100 Pout, OUTPUT POWER (WATTS) PEP 400 5th Order 3rd Order IMD, INTERMODULATION DISTORTION (dBc) VDD = 50 Vdc, IDQ = 1600 mA, f1 = 230 MHz f2 = 230.1 MHz, Two--Tone Measurements --10 --20 --30 --40 --50 --60 --70 VDD = 50 Vdc, Pout = 250 W (PEP)/62.5 W Avg. per Tone IDQ = 1600 mA, Two--Tone Measurements 3rd Order 5th Order 7th Order
0.1
1 TWO--TONE SPACING (MHz)
10
40
Figure 10. Intermodulation Distortion Products versus Output Power
30 29 Gps, POWER GAIN (dB) 28 IDQ = 1600 mA 1400 mA 1100 mA IMD, THIRD ORDER INTERMODULATION DISTORTION (dBc) --15 --20 --25 --30 --35 --40 --45 --50 10
Figure 11. Intermodulation Distortion Products versus Two-Tone Spacing
VDD = 50 Vdc, f1 = 230 MHz, f2 = 230.1 MHz Two--Tone Measurements IDQ = 650 mA 900 mA 1100 mA 1400 mA 1600 mA 100 Pout, OUTPUT POWER (WATTS) PEP 400
27 900 mA
26 25
650 mA 5 10
VDD = 50 Vdc, f1 = 230 MHz, f2 = 230.1 MHz Two--Tone Measurements 100 Pout, OUTPUT POWER (WATTS) PEP 500
Figure 12. Two-Tone Power Gain versus Output Power
Figure 13. Third Order Intermodulation Distortion versus Output Power
1. The distortion products are referenced to one of the two tones and the peak envelope power (PEP) is 6 dB above the power in a single tone.
MRFE6VP6300HR3 MRFE6VP6300HSR3 6 RF Device Data Freescale Semiconductor
TYPICAL CHARACTERISTICS
109 108 MTTF (HOURS) 107 106 105 104 90 110 130 150 170 190 210 230 250 TJ, JUNCTION TEMPERATURE (°C) MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. VDD = 50 Vdc Pout = 300 W Avg. ηD = 80%
Figure 14. MTTF versus Junction Temperature — CW
MRFE6VP6300HR3 MRFE6VP6300HSR3 RF Device Data Freescale Semiconductor 7
Zsource f = 230 MHz
f = 230 MHz Zload Zo = 5 Ω
VDD = 50 Vdc, IDQ = 100 mA, Pout = 300 W Peak f MHz 230 Zsource Ω 0.65 + j2.79 Zload Ω 1.64 + j2.85
Zsource = Test circuit impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground.
Input Matching Network
Device Under Test
Output Matching Network
Z
source
Z
load
Figure 15. Series Equivalent Source and Load Impedance
MRFE6VP6300HR3 MRFE6VP6300HSR3 8 RF Device Data Freescale Semiconductor
VDD = 50 Vdc, IDQ = 100 mA f MHz 10 25 50 100 200 300 400 500 600 Zsource Ω 36.0 + j128 20.0 + j64.0 16.0 + j41.6 8.00 + j24.8 3.00 + j12.8 1.52 + j7.92 1.08 + j5.04 1.04 + j3.16 0.88 + j1.76 Zload Ω 12.0 + j8.80 12.4 + j6.40 11.6 + j14.4 9.00 + j9.80 7.20 + j6.40 6.00 + j5.00 4.20 + j4.00 3.32 + j2.72 2.72 + j1.68
1. Simulated performance at 1 dB gain compression. Zsource = Source impedance presented from gate to gate. Zload = Load impedance presented from drain to drain. Device Under Test
Source
+
--
Load
-Z source Z
+ load
Figure 16. Simulated Source and Load Impedances Optimized for IRL, Output Power and Drain Efficiency — Push-Pull
MRFE6VP6300HR3 MRFE6VP6300HSR3 RF Device Data Freescale Semiconductor 9
PACKAGE DIMENSIONS
MRFE6VP6300HR3 MRFE6VP6300HSR3 10 RF Device Data Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3 RF Device Data Freescale Semiconductor 11
MRFE6VP6300HR3 MRFE6VP6300HSR3 12 RF Device Data Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3 RF Device Data Freescale Semiconductor 13
PRODUCT DOCUMENTATION AND SOFTWARE
Refer to the following documents to aid your design process. Application Notes • AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices Software • Electromigration MTTF Calculator • RF High Power Model • .s2p File For Software, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the Software & Tools tab on the part’s Product Summary page to download the respective tool.
R5 TAPE AND REEL OPTION
NI--780--4 = R5 Suffix = 50 Units, 56 mm Tape Width, 13 inch Reel. NI--780S--4 = R5 Suffix = 50 Units, 32 mm Tape Width, 13 inch Reel. The R5 tape and reel option for MRFE6VP6300H and MRFE6VP6300HS parts will be available for 2 years after release of MRFE6VP6300H and MRFE6VP6300HS. Freescale Semiconductor, Inc. reserves the right to limit the quantities that will be delivered in the R5 tape and reel option. At the end of the 2 year period customers who have purchased these devices in the R5 tape and reel option will be offered MRFE6VP6300H and MRFE6VP6300HS in the R3 tape and reel option.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision 0 1 Date Oct. 2010 July 2011 • Initial Release of Data Sheet • Corrected pin 4 label from RFout/VGS to RFin/VGS, Fig. 1, Pin Connections, p. 1 • Changed Drain--Source voltage from --0.5, +125 to --0.5, +130 in Maximum Ratings table, p. 1 • Added Total Device Dissipation to Maximum Ratings table, p. 1 • • • Changed V(BR)DSS Min value from 125 to 130 Vdc, Table 4, Off Characteristics, p. 2 Tightened VGS(th) Min limit from 1.5 to 1.7 Vdc and Max limit from 3.0 to 2.7 Vdc as a result of process improvement, Table 4, On Characteristics, p. 2 Tightened VGS(Q) Min limit from 1.7 to 2.0 Vdc and Max limit from 3.2 to 3.0 Vdc as a result of process improvement, Table 4, On Characteristics, p. 2 Description
• Added Load Mismatch table to Table 4. Electrical Characteristics, p. 2 • MTTF end temperature on graph changed to match maximum operating junction temperature, Fig. 14, MTTF versus Junction Temperature, p. 7 • Added Fig. 16, Simulated Source and Load Impedances Optimized for IRL, Output Power and Drain Efficiency — Push--Pull table, p. 9
MRFE6VP6300HR3 MRFE6VP6300HSR3 14 RF Device Data Freescale Semiconductor
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MRFE6VP6300HR3 MRFE6VP6300HSR3
Document Number: RF Device Data MRFE6VP6300H Rev. 1, 7/2011 Freescale Semiconductor
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