FT2232D-TRAY

Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 Future Technology Devices International Ltd FT2232D Dual USB to Serial UART/FIFO IC The FT2232D is a dual USB to serial UART or FIFO interface with the following advanced features: Single chip USB to dual channel serial / parallel ports with a variety of configurations. Entire USB protocol handled on the chip. No USB specific firmware programming required. Transfer Data Rate 300 to 3 Mbaud. USB to parallel FIFO transfer data rate up to 1 megabyte / second. Multi-Protocol Synchronous Serial Engine (MPSSE) to simplify synchronous serial protocol (USB to JTAG, USB to I2C, USB to SPI) design. CPU-style FIFO interface mode simplifies CPU interface design. MCU host bus emulation mode configuration option. Fast Opto-Isolated serial interface option. FTDI‟s royalty-free Virtual Com Port (VCP) and Direct (D2XX) drivers eliminate the requirement for USB driver development in most cases. Highly integrated design includes 3.3V LDO regulator for USB I/O, integrated POR function and on chip clock multiplier PLL (6MHz – 48MHz). Asynchronous serial UART interface option with full hardware handshaking and modem interface signals. Fully assisted hardware software handshaking. or X-On / X-Off UART Interface supports 7/8 bit data, 1/2 stop bits, and Odd/Even/Mark/Space/No Parity. Operational configuration mode and USB Description strings configurable in external EEPROM over the USB interface. Low operating and USB suspend current. Supports bus powered, self powered and highpower bus powered USB configurations. UHCI/OHCI/EHCI host controller compatible. USB 2.0 compatible. Full Speed (12Mbits/Second) Extended -40°C to 85°C industrial operating temperature range. Compact 48-LD Lead Free LQFP package +4.35V to +5.25V single supply voltage range. operating Dedicated Windows DLLs available for USB to JTAG, USB to SPI, and USB to I2C applications. ESD protection for FT2232D IO‟s: Human Body Model (HBM) ±2kV, Machine Mode (MM) ±100V, Charge Device Model (CDM) ±500V, Latch-up free.. Enhanced bit-bang Mode interface option with RD# and WR# strobes. Configurable I/O drive strength. Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its documentation are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Technology Devices International Ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. This document provides preliminary information that may be subject to change without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow, G41 1HH, United Kingdom. Scotland Registered Number: SC136640 Copyright © 2010 Future Technology Devices International Limited 1 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 1 Typical Applications USB to Dual Port RS232 Converters USB to Dual Port RS422 / RS485 Converters Upgrading Legacy Peripheral Designs to USB USB Instrumentation USB JTAG Programming USB to SPI Bus Interfaces USB Industrial Control Field Upgradable USB Products Galvanically Isolated Products with USB Interface USB to synchronous serial interface Cellular and cordless phone USB data transfer cables and interfaces. USB Audio and Low Bandwidth Video data transfer PDA to USB data transfer USB Smart Card Readers USB Instrumentation USB Industrial Control USB MP3 Player Interface USB FLASH Card Reader / Writers Set Top Box PC - USB interface USB Digital Camera Interface USB Bar Code Readers Interfacing MCU / PLD / FPGA based designs to USB 1.0 Driver Support The FT2232D requires USB drivers (listed below), available free from http://www.ftdichip.com, which are used to make the FT2232D appear as a virtual COM port (VCP). This then allows the user to communicate with the USB interface via a standard PC serial emulation port (for example TTY). Another FTDI USB driver, the D2XX driver, can also be used with application software to directly access the FT2232D though a DLL. Royalty free VIRTUAL COM PORT (VCP) DRIVERS for... Royalty free D2XX Direct Drivers (USB Drivers + DLL S/W Interface) Windows 98, 98SE, ME, 2000, Server 2003, XP and Server 2008 Windows 98, 98SE, ME, 2000, Server 2003, XP and Server 2008 Windows XP and XP 64-bit Windows XP and XP 64-bit Windows Vista and Vista 64-bit Windows Vista and Vista 64-bit Windows XP Embedded Windows XP Embedded Windows CE 4.2, 5.0 and 6.0 Windows CE 4.2, 5.0 and 6.0 Mac OS 8/9, OS-X Windows 7 32,64 bit Windows 7 32,64 bit Linux 2.4 and greater Linux 2.4 and greater For driver installation, please refer to the application note AN232B-10. 1.1 Part Numbers Part Number Package FT2232D 48 Pin LQFP Table 1.1 Part Numbers Copyright © 2010 Future Technology Devices International Limited 2 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 1.2 USB Compliant The FT2232D is fully compliant with the USB 2.0 specification and has been given the USB-IF Test-ID (TID) 40680003. Copyright © 2010 Future Technology Devices International Limited 3 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 2 FT2232D Block Diagram Figure 2.1 FT2232D Block Diagram For a description of each function please refer to Section 4.1. Copyright © 2010 Future Technology Devices International Limited 4 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 Table of Contents 1 Typical Applications ........................................................................ 2 1.0 Driver Support .................................................................................... 2 1.1 Part Numbers...................................................................................... 2 1.2 USB Compliant .................................................................................... 3 2 FT2232D Block Diagram .................................................................. 4 3 Device Pin Out and Signal Description ............................................ 7 4 5 6 7 3.0 48-Pin LQFP Package .......................................................................... 7 3.1 Pin Out Description ............................................................................. 8 3.2 Common Pins ...................................................................................... 8 3.3 IO Pin Definitions by Chip Mode .......................................................... 10 3.4 IO Mode Command Hex Values .......................................................... 12 Function Description ..................................................................... 13 4.0 Key Features ..................................................................................... 13 4.1 Functional Block Descriptions ........................................................... 15 Devices Characteristics and Ratings.............................................. 16 5.0 Absolute Maximum Ratings............................................................... 16 5.1 DC Characteristics............................................................................. 17 5.2 ESD Tolerance ................................................................................... 20 USB Power Configurations ............................................................ 21 6.0 USB Bus Powered Configuration ...................................................... 21 6.1 USB Self Powered Configuration ...................................................... 22 6.2 Interfacing to 3.3V Logic ................................................................... 23 6.3 Power Switching Configuration ......................................................... 25 Standard Device Configuration Examples ...................................... 27 7.0 Oscillator Configurations .................................................................. 27 7.1 EEPROM Configurations .................................................................... 29 8 Signal Descriptions by IO Mode and Interface Channel Configurations .................................................................................... 31 8.0 232 UART Interface Mode Signal Descriptions and Interface Configurations ........................................................................................... 31 8.1 232 UART Mode LED Interface ........................................................... 35 8.2 245 FIFO Interface Mode Signal Descriptions and Interface Configurations ........................................................................................... 37 8.3 245 FIFO Mode Timing Diagram ........................................................ 38 8.4 Enhanced Asynchronous and Synchronous Bit-Bang Modes - Signal Description and Interface Configuration .................................................... 40 Copyright © 2010 Future Technology Devices International Limited 5 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 8.5 Multi-Protocol Synchronous Serial Engine (MPSSE) Mode Signal Descriptions and Interface Configurations ................................................ 42 8.6 MCU Host Bus Emulation Mode Signal Descriptions and Interface Configuration ............................................................................................. 44 8.7 Fast Opto-Isolated Serial Interface Mode Signal Descriptions and Interface Configuration ............................................................................. 48 8.8 CPU FIFO Interface Mode Signal Descriptions and Configuration Examples ................................................................................................... 52 9 Package Parameters ..................................................................... 56 10 Contact Information ................................................................... 57 Appendix A – References ........................................................................... 58 Useful Application Notes and Projects ....................................................... 58 Appendix B - List of Figures and Tables ..................................................... 59 Appendix C - Revision History .................................................................... 61 Copyright © 2010 Future Technology Devices International Limited 6 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 3 Device Pin Out and Signal Description 3.0 48-Pin LQFP Package Figure 3.1 48 pin LQFP Package Pin Out and Schematic Symbol Copyright © 2010 Future Technology Devices International Limited 7 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 3.1 Pin Out Description This section describes the operation of the FT2232D pins. Common pins are defined in the first section, and then the I/O pins are defined by chip mode. Note: The convention used throughout this document for active low signals is the signal name followed by# 3.2 Common Pins The operation of the following FT2232D pins do not change regardless of the configured mode:Pin No. Name Type Description 7 USBDP I/O USB Data Signal Plus ( Requires 1.5K pull-up to 3V3OUT or RSTOUT# ) 8 USBDM I/O USB Data Signal Minus Table 3.1.1 USB Interface Group Pin No. 48 Name Type EECS I/O EESK OUTPUT Description EEPROM – Chip Select. Tri-State during device reset. **Note 1 Clock signal to EEPROM. Tri-State during device reset, else drives out. **Note 1 EEDATA I/O EEPROM – Data I/O Connect directly to Data-In of the EEPROM and to Data-Out of the EEPROM via a 2.2K resistor. Also, pull Data-Out of the 2 EEPROM to VCC via a 10K resistor for correct operation. Tri-State during device reset. **Note 1 Table 3.2.2 EEPROM Interface Group 1 Pin No. Name Type 4 RESET# INPUT Description Can be used by an external device to reset the FT2232D. If not required, tie to VCC. **Note 1 5 RSTOUT# OUTPUT Output of the internal Reset Generator. Drives low for 5.6 ms after VCC > 3.5V and the internal clock starts up, then clamps it‟s output to the 3.3V output of the internal regulator. Taking RESET# low will also force RSTOUT# to drive low. RSTOUT# is NOT affected by a USB Bus Reset. 47 TEST INPUT Puts device into I.C. test mode – must be tied to GND for normal operation. 41 PWREN# OUTPUT Goes Low after the device is configured via USB, then high during USB suspend. Can be used to control power to external logic using a PChannel Logic Level MOSFET switch. Enable the Interface Pull-Down Option in EEPROM when using the PWREN# pin in this way. 43 XTIN INPUT Input to 6MHz Crystal Oscillator Cell. This pin can also be driven by an external 6MHz clock if required. Note: Switching threshold of this pin is VCC/2, so if driving from an external source, the source must be driving at 5V CMOS level or a.c. coupled to centre around VCC/2. 44 XTOUT OUTPUT Output from 6MHz Crystal Oscillator Cell. XTOUT stops oscillating during USB suspend, so take care if using this signal to clock external logic. Table 3.3.3 Miscellaneous Signal Group **Note 1 - During device reset, these pins are tri-state but pulled up to VCC via internal 200K resistors. Copyright © 2010 Future Technology Devices International Limited 8 Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 Pin No. Name Type Description 6 3V3OUT OUTPUT 3, 42 VCC PWR 14 VCCIOA PWR 31 VCCIOB PWR 9,18, 25, 34 46 GND PWR 3.3 volt Output from the integrated L.D.O. regulator This pin should be decoupled to GND using a 33nF ceramic capacitor in close proximity to the device pin. It‟s prime purpose is to provide the internal 3.3V supply to the USB transceiver cell and the RSTOUT# pin. A small amount of current (