VNCLO-MB1A

Future Technology Devices International Ltd. Vinculo Development Module Datasheet The Vinculo module is a Vinculum based development platform inspired by Arduino projects. Document Reference No.: FT_000327 Version 1.0 Issue Date: 2010-10-13 Future Technology Devices International Ltd (FTDI) Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow, G41 1HH, United Kingdom Tel.: +44 (0) 141 429 2777 Fax: + 44 (0) 141 429 2758 E-Mail (Support): support1@ftdichip.com Web: http://www.vinculum.com Neither the whole nor any part of the info rmation contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its documentat ion are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Techn ology Devices International Ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. This document provides preliminar y information that may be subject to change without notice. No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow, G41 1HH, United Kingdom. Scotland Registered Number: SC136640 Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 1 Introduction Vinculo is a development module based on the FTDI Vinculum II, VNC2 dual USB host/slave IC. Vinculo is designed as a prototyping platform for VNC2 based designs and applications. The mechanical form of the module, and the concept of providing free software development library and tools, is inspired by the Arduino concept. Vinculo is a superset of the Duemilanove / Uno with 2 extra rows of headers providing an extra 10 pins. The software development environment, Vinculum-II IDE, uses a subset of standard ANSII ‘C’ instead of the Arduino Programming Language (wiring and processing) based software platform. Vinculo may also be used with many existing Arduino shields by po rting the firmware to run on the VNC2 IC. The module uses a VNC2-64Q package to facilitate 38 GPIO options on 0.1” pitch header pins. A 10 bit A/D converter has also been added to offer connectivity to analogue inputs. This A/D converter can be read by the VNC2-64Q SPI host interface. For USB connectivity the module includes one USB type A connector for a USB host port and one mini B connector for a USB slave port to provide access to the VNC2-64Q USB ports. An additional connector, to mate with the VII Debugger module, (also available from FTDI) is provided to connect to the VNC2 IDE (Integrated Development Environment) for creating and debugging application code to run on the Vinculo module. The Vinculum-II IDE comes with a variety of pre-compiled driver libraries for fast prototyping different modules including support for a variety of USB classes such as Mass Storage, Human Interface Devices (keyboards, mice), audio devices, video devices (webcam) and many more still under development. The development module will also be provided with a suite of libraries to facilitate fast application development. A bare prototyping Vinculo PCB (Vinculo_Proto) which has the same PCB form factor as the Vinculo is also available. This can be used to prototype most shield application, comes with a selection of components and mates directly to the Vinculo connectors in a style similar to Arduino shields. Figure 1.1 – VINCULO Copyright © 2010 Future Technology Devices International Limited 1 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 1.1 Key Features The Vinculo incorporates the following features: Microcontroller: Operating voltage: Input power supply: Digital I/O: Analogue I/O: USB port: FLASH memory: RAM: Variable clock speeds: VNC2-64Q 5V 9V 30 8 2 – configurable for host or device operation 256kbytes 16kbytes 12/24/48MHz Superset of the Arduino Duemilanove / Uno development boards. FTDI Integrated Development Environment (IDE) including code editor, compiler, assembler and debugger, which is supplied free of charge, and supports ANSII C coding for easy portability and maintainability. Precompiled drivers for a variety of interfaces e.g. USB, UART, SPI. Precompiled driver support for a wide range of USB host classes including Mass Storage, Human Interface Devices (keyboards, mice), audio devices, video devices (webcam) with many more under developed. Precompiled driver support for a wide range of USB device classes including FTDI peripheral ICs, Human Interface Devices (keyboards, mice) with many more under developed. Compatible with existing Arduino shields. A software configuration wizard is currentlty under development. 1.2 VNC2 IC VNC2 is the second of FTDI’s Vinculum family of Embedded dual USB host controller devices. VNC2 device provides USB Host interfacing capability for a variety of different USB device classe s including support for BOMS (bulk only mass storage), Printer, HID (human interface devices). For mass storage devices such as USB Flash drives, VNC2 also transparently handles the FAT file structure. Communication with non USB devices such as a low cost microcontroller is accomplished via either UART, SPI or parallel FIFO interfaces. VNC2 provides a new cost effective solution for providing USB Host capability into products that previously did not have the hardware resources available. VNC2 has the capability to enable customers to develop custom firmware using the Vinculum II development software tool suite. The development tools support compiler, assembler, linker and debugger tools complete within an integrated development environment (IDE). The Vinculum-II family of devices are available in Pb-free (RoHS compliant) 32-lead LQFP, 32-lead QFN, 48-lead LQFP, 48-lead QFN, 64-Lead LQFP and 64-lead QFN packages For more information on the ICs refer to http://www.ftdichip.com/Products/ICs/VNC2.htm Copyright © 2010 Future Technology Devices International Limited 2 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 1.3 Part Numbers Part Number Description VNCLO - MB1A VNCLO-PSU-US VNCLO-PSU-EU VNCLO-PSU-UK VNCLO-SHLD1A VNC2 DEBUG MODULE Vinculo Motherboard Vinculo +9V/1A PSU ( Optional ) - USA Vinculo +9V/1A PSU ( Optional ) - Europe Vinculo +9V/1A PSU ( Optional ) - UK Vinculo_Proto prototyping shield (Optional) VNC2 debugger module USB "A" to Mini-"B" Cable, 1m USB "A" to Mini-"B" Cable, 1m Copyright © 2010 Future Technology Devices International Limited 3 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 Table of Contents 1 Introduction .................................................................... 1 1.1 1.2 1.3 Key Features ............................................................................. 2 VNC2 IC .................................................................................... 2 Part Numbers ............................................................................ 3 Power ....................................................................................... 3 Input/Output ............................................................................ 3 LEDs .......................................................................................... 3 Module Connector Descriptions ................................................. 4 Vinculo Connectors : Pins and Signal Description...................... 5 USB Slave Port : Pins and Signal Description ............................ 7 USB Host Port : Pins and Signal Description .............................. 7 Configuration Jumpers .............................................................. 8 UART Interface ......................................................................... 9 Signal Description – UART Interface ............................................................. 9 2 Functionality ................................................................... 3 2.1 2.2 2.3 3 Pin Out and Signal Description ........................................ 4 3.1 3.2 3.3 3.4 3.5 4 Configurable Pin outs ...................................................... 9 4.1 4.2 4.1.1 Serial Peripheral Interface (SPI) ............................................ 10 Signal Description - SPI Slave ................................................................... 10 Signal Description - SPI Master ................................................................. 10 4.2.1 4.2.2 4.3 Parallel FIFO Interface - Asynchronous Mode ......................... 11 Signal Description - Parallel FIFO Interface ................................................. 11 4.3.1 5 6 7 Debugger Interface ....................................................... 12 5.1 Signal Description - Debugger Interface ................................. 12 ADC Converter ............................................................... 13 Firmware....................................................................... 14 7.1 7.2 7.3 7.4 Firmware Support ................................................................... 14 Available Firmware ................................................................. 14 Firmware Upgrades ................................................................. 14 Arduino Shield Compatible Firmware ...................................... 14 8 9 Mechanical Dimensions ................................................. 15 Schematic Diagram ....................................................... 16 Copyright © 2010 Future Technology Devices International Limited 1 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 10 Arduino Shields ............................................................. 17 11 Contact Information ...................................................... 18 Appendix A – References ................................................................. 19 Appendix B – List of Figures and Tables .......................................... 20 List of Figures ................................................................................. 20 List of Tables ................................................................................... 20 Appendix C – Revision History ......................................................... 21 Copyright © 2010 Future Technology Devices International Limited 2 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 2 Functionality 2.1 Power The Vinculo requires +5V for the USB host ports to power USB devices from the module. This is further regulated to +3.3V for VNC2. A +9V/1A DC supply is also available which can be used as an AC-DC adapter (wall-wart). The +9V is regulated to +5V and +3V3 on the Vinculo module. As an alternative to the AC-DC adapter the on board regulators can be taken out of circuit with jumpers to allow the +5V from a USB host port to power the module. Care should be taken with this approach as a USB host port can only provide a maximum of 500mA, which must power the Vinculo and potentially any devices connected to the Vinculo. The +5V and +3V3 supplies may also be accessed on the J1 header pins. VNC2 requires between 8 and 24mA depending on the clock speed at which the VNC2 core is running. 2.2 Input/Output Due to the flexibility of the VNC2 IC the actual definition of each pin is not fixed. The firmware developed for any application can use the VNC2 IO Mux to route a signal, e.g. UART TXD, to a range of IO pins. An IOMux utility built into the free tool chain development environment, IDE, allows the developer to define the IO from a GUI interface. The utility will then convert the users IO selection into C code to be included as part of the project firmware... There are 38 configurable IO pins available to the user, 8 of which are reserved for connecting to the onboard ADC device. The other 30 pins may be used for GPIO, UART, SPI or FIFO connectivity depending on the interface of the shield designed to connect to the Vinculo module. There are 2 USB ports on the Vinculo. The firmware will determine if the port is configured for USB host operation or USB device operation. 2.3 LEDs There are 3 LEDs on Vinculo. LED1 is driven by the VNC2-64Q IC depending on which firmware is loaded. It may be used to indicate traffic on the USB slave port connected via CN3. LED2 is driven by the VNC2-64Q IC depending on which firmware is loaded. It may be used to indicate traffic on the USB host port connected via CN2. LED3 is driven by the 3V3 supply connected to the VNC2-64Q IC. It will indicate when the Vinculo module is powered. Copyright © 2010 Future Technology Devices International Limited 3 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 3 Pin Out and Signal Description 3.1 Module Connector Descriptions C N1 LED2 CN2 LED1 LED3 JP1 SW2 1 CN3 JP2 U1 1 J1 1 1 U2 J2 1 J8 Figure 3.1 - Vinculo Diagram A detailed description of each pin out is given in the next section. CONNECTOR CN1 CN2 CN3 J1 J2 J3 J4 J6 J7 J8 J3 J6 J4 J7 FUNCTION Power input USB host port USB slave port Interface to shield boards Interface to shield boards Interface to shield boards Interface to shield boards Interface to shield boards Interface to shield boards Debug port Copyright © 2010 Future Technology Devices International Limited 4 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 3.2 Vinculo Connectors : Pins and Signal Description Name Pin No. CN1 9V Pin Name on PCB PWR Type PWR Input Description 9V module supply pin. This pin can be used to provide the 5.0V input to the Vinculo when the V2DIP2-64 is not powered from the USB connector (VBUS) or the debugger interface. Also connected to DIL connector pins J1-1 and J3-6. CN2 USB USB2 USB host port Connects to VNC2-64Q USB port 2 CN3 USB USB1 USB slave port Connects to VNC2-64Q USB port 1 J1-1 J1-2 J1-3 J1-4 J1-5 J1-6 J1-7 J1-8 AIN6 AIN7 RESET# VCC3V3 VCC5V GND GND VCCIN ADC6 ADC7 RESET# 3V3 5V GND GND VCCIN Analogue Input Analogue Input Input PWR Output Power output GND GND PWR Input Analogue input to channel 6 of the ADC Analogue input to channel 7 of the ADC Reset for the VNC2-64Q 3V3 output for external circuitry 5V output for external circuitry GND for PCB GND for PCB Alternative input to CN1 for supply. J2-1 J2-2 J2-3 J2-4 J2-5 J2-6 J3-1 J3-2 J3-3 J3-4 J3-5 J3-6 J3-7 J3-8 J4-1 J4-2 J4-3 J4-4 J4-5 J4-6 AIN0 AIN1 AIN2 AIN3 AIN4 AIN5 IOBUS33 IOBUS32 IOBUS34 IOBUS35 IOBUS36 IOBUS37 IOBUS38 IOBUS39 IOBUS6 IOBUS7 SS MOSI MISO SCK ADC0 ADC1 ADC2 ADC3 ADC4 ADC5 RXD TXD IO34 IO35 IO36 IO37 IO38 IO39 IO6 IO7 IO11 IO9 IO10 IO8 Analogue Input Analogue Input Analogue Input Analogue Input Analogue Input Analogue Input I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Analogue input to channel 0 of the ADC Analogue input to channel 1 of the ADC Analogue input to channel 2 of the ADC Analogue input to channel 3 of the ADC Analogue input to channel 4 of the ADC Analogue input to channel 5 of the ADC 5V safe bidirectional data / control bus bit 33 – default to RXD 5V safe bidirectional data / control default to TXD 5V safe bidirectional data / control bus 5V safe bidirectional data / control bus 5V safe bidirectional data / control bus 5V safe bidirectional data / control bus 5V safe bidirectional data / control bus 5V safe bidirectional data / control bus bus bit 33 – bit bit bit bit bit bit 34 35 36 37 38 39 5V safe bidirectional data / control bus bit 6 5V safe bidirectional data / control bus bit 7 5V safe bidirectional data / control bus bit 34 – default to SPI Slave select 5V safe bidirectional data / control bus bit 35 – default to SPI MOSI. Also connectors to onboard ADC 5V safe bidirectional data / control bus bit 36 default to SPI MISO Also connectors to onboard ADC 5V safe bidirectional data / control bus bit 37 – default to SPI SCK. Also connects to onboard ADC 5 Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 Name Pin No. J4-7 J4-8 J6-1 J6-2 J6-3 J6-4 J6-5 J6-6 J6-7 J6-8 J7-1 J7-2 J7-3 J7-4 J7-5 J7-6 J7-7 J7-8 J8-1 J8-2 J8-3 J8-4 J8-5 J8-6 GND AREF IOBUS41 IOBUS42 IOBUS43 IOBUS1 IOBUS2 IOBUS3 IOBUS4 IOBUS5 IOBUS12 IOBUS13 IOBUS14 IOBUS15 IOBUS16 IOBUS17 IOBUS18 IOBUS19 Debug I/F NC GND RESET# PROG# VBUS Pin Name on PCB GND AREF IO41 IO42 IO43 IO1 IO2 IO3 IO4 IO5 IO12 IO13 IO14 IO15 IO16 IO17 IO18 IO19 Debug I/F GND RESET# PROG# 5V Type GND Analogue Input I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O NV GND Input Input PWR Input Description GND for PCB Analogue input to provide reference voltage for ADC 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V safe safe safe safe safe safe safe safe safe safe safe safe safe safe safe safe bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional bidirectional data data data data data data data data data data data data data data data data / / / / / / / / / / / / / / / / control control control control control control control control control control control control control control control control bus bus bus bus bus bus bus bus bus bus bus bus bus bus bus bus bit bit bit bit bit bit bit bit bit bit bit bit bit bit bit bit 41 42 43 1 2 3 4 5 12 13 14 15 16 17 18 19 Interface to VNC2-64Q debugger pin Not connected – used as a key for VII Debugger mND for PCB G odule Reset for the VNC2-64Q Used to put the VNC2-64Q into PROGRAM mode if loading ROM file over UART May be used by debugger to power module Table 3.1 - Pin Signal Descriptions Copyright © 2010 Future Technology Devices International Limited 6 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 3.3 USB Slave Port : Pins and Signal Description Connector CN3 is a USB mini-B, designed for connecting to USB hosts. This connector routes to the VNC2-64Q USB port 1 and the firmware on the VNC2-64Q should be written to ensure it is in slave mode. The port is USB 2.0 full speed compliant. This port can also be used to provide power to the Vinculo with 5V at 500mA max. Pin No. Signal 5V (can be used to power PCB or disabled with JP1) USB DM USB DP Not connected GND 1 2 3 4 5 Table 3.2 - USB Slave Pin Out 3.4 USB Host Port : Pins and Signal Description Connector CN2 is a USB type A connector designed for connecting to USB devices. This connector routes to the VNC2-64Q USB port 2 and the firmware on the VNC2-64Q should be written to ensure it is in host mode. The port is USB 2.0 full speed compliant. Pin No. Signal 5V supply to peripheral device. Enabled by the VNC264Q USB DM USB DP GND 1 2 3 4 Table 3.3 - USB Slave Pin Out Copyright © 2010 Future Technology Devices International Limited 7 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 3.5 Configuration Jumpers There are two configuration jumper links on the Vinculo. JP1 is used to select the Vinculo power source. JP2 is used to select the reference voltage for the ADC (U2) 1-2 JP1 JP2 Table 3.4 – Jumper Options Vinculo is Powered from USB host via CN3 ADC reference voltage = 3V3 2-3 Vinculo is Powered from external 9V supply ADC reference voltage = 5V0 Copyright © 2010 Future Technology Devices International Limited 8 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 4 Configurable Pin outs 4.1 UART Interface When the Vinculo data and control buses are configured as a UART interface, the interface implements a standard asynchronous serial UART port with flow control. The UART can support baud rates from 300baud to 6Mbaud. The UART interface is described in more detail in the Vinculum-II datasheet please refer to: - FTDI website 4.1.1 Signal Description – UART Interface The UART signals can be programmed to a choice of available I/O pins. Table 4.1 explains the available pins for each of the UART signals. This is a subset of what the VNC2-64Q is capable of to avoid conflict with other functions on the Vinculo module. Available Pins Name Type Description J3-2, J3-5, J6-7, J7-1, J7-5 uart_txd Output Transmit asynchronous data output (Default J3-2) Receive asynchronous data input (Default J3-1) Request To Send Control Output Clear To Send Control Input Data Acknowledge (Data Terminal Ready Control) Output Data Request (Data Set Ready Control) Input Data Carrier Detect Control Input Ring Indicator Control Input. RI# low can be used to resume the PC USB Host controller from suspend. Enable Transmit Data for RS485 designs. TXDEN may be used to signal that a transmit operation is in progress. The TXDEN signal will be set high one bit-time before data is transmitted and return low one bit time after the last bit of a data frame has been transmitted J3-1, J3-6, J6-1, J6-4, J6-8, J7-2, J7-6 J3-3, J3-7, J4-1, J6-2, J6-5, J7-3, J7-7 J3-4, J3-8, J4-2, J6-3, J6-6, J7-4, J7-8 J3-2, J3-5, J6-7, J7-1, J7-5 J3-1, J3-6, J6-1, J6-4, J6-8, J7-2, J7-6 J3-3, J3-7, J4-1, J6-2, J6-5, J7-3, J7-7 J3-4, J3-8, J4-2, J6-3, J6-6, J7-4, J7-8 uart_rxd uart_rts# uart_cts# uart_dtr# uart_dsr# uart_dcd# uart_ri# Input Output Input Output Input Input Input J3-2, J3-5, J6-7, J7-1, J7-5 uart_tx_active Output Table 4.1 - Data and Control Bus Signal Mode Options – UART Note: # defines active low signals. Copyright © 2010 Future Technology Devices International Limited 9 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 4.2 Serial Peripheral Interface (SPI) The VNC2-64Q has one master module and two slave modules. These modules are described more fully in a VNC2 datasheet please refer to: - FTDI website 4.2.1 Signal Description - SPI Slave The SPI Slave signals can be programmed to a choice of available I/O pins. Table 4.2 explains the available pins for each of the SPI Slave signals. This is a subset of what the VNC2-64Q is capable of to avoid conflict with other functions on the Vinculo module. Name Available Pins Type Description J3-5, J6-7, J7-1, J7-5 spi_s0_clk spi_s1_clk spi_s0_mosi Input Slave clock input Input/Output Master Out Slave In Synchronous data from master to slave J3-6, J6-1, J6-4, J6-8, J7-2, J7-6 spi_s1_mosi spi_s0_miso spi_s1_miso spi_s0_ss# Input Output J3-3, J3-7, J4-1, J6-2, J6-5, J7-3, J7-7 Master In Slave Out Synchronous data from slave to master Slave chip select J3-4, J3-8, J4-2, J6-3, J6-6, J7-4, J7-8 spi_s1_ss# Table 4.2 - Data and Control Bus Signal Mode Options – SPI Slave Note: # defines active low signals. 4.2.2 Signal Description - SPI Master The SPI Master signals can be programmed to a choice of available I/O pins. Table 4.3 shows the SPI master signals and the available pins that they can be mapped. This is a subset of what the VNC2-64Q is capable of to avoid conflict with other functions on the Vinculo module. Available Pins Name Type Description J3-5, J4-6, J6-7, J7-1, J7-5 spi_m_clk Output SPI master clock input (J4-6 is the default) spi_m_mosi J3-6, J4-4, J6-1, J6-4, J6-8, J7-2, J7-6 Output Master Out Slave In Synchronous data from master to slave (J4-4 is the default) spi_m_miso J3-3, J3-7, J4-1, J4-5, J6-2, J6-5, J7-3, J7-7 spi_m_ss_0# Input Master In Slave Out Synchronous data from slave to master (J4-5 is the default) J3-4, J3-8, J4-2, J4-3, J6-3, J6-6, J7-4, J7-8 3-5, J6-7, J7-1, J7-5 Output Active low slave select 0 from master to slave 0 This SS# is used with the onboard ADC spi_m_ss_1# Output Active low slave select 1 from master to slave 1 Table 4.3 - Data and Control Bus Signal Mode Options – SPI Master Note: # defines active low signals. Copyright © 2010 Future Technology Devices International Limited 10 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 4.3 Parallel FIFO Interface - Asynchronous Mode The Parallel FIFO Asynchronous mode is functionally the same as the Parallel FIFO Interface available in the FTDI VDIP1 module and has an eight bit data bus, individual read and write strobes and two hardware flow control signals. 4.3.1 Signal Description - Parallel FIFO Interface The Parallel FIFO Interface signals can be programmed to a choice of available I/O pins. Table 4.4 shows the Parallel FIFO Interface signals and the pins that they can be mapped. Details of the operation and timing can be found in the VNC2 datasheet. Available Pins Name Type Description J3-5, J6-7, J7-1, J7-5 J3-6, J6-1, J6-4, J6-8, J7-2, J7-6 J3-3, J3-7, J4-1, J6-2, J6-5, J7-3, J7-7 J3-4, J3-8, J4-2, J6-3, J6-6, J7-4, J7-8 J3-5, J6-7, J7-1, J7-5 J3-6, J6-1, J6-4, J6-8, J7-2, J7-6 J3-3, J3-7, J4-1, J6-2, J6-5, J7-3, J7-7 J3-4, J3-8, J4-2, J6-3, J6-6, J7-4, J7-8 fifo_data[0] fifo_data[1] fifo_data[2] fifo_data[3] fifo_data[4] fifo_data[5] fifo_data[6] fifo_data[7] I/O I/O I/O I/O I/O I/O I/O I/O FIFO data bus Bit 0 FIFO data bus Bit 1 FIFO data bus Bit 2 FIFO data bus Bit 3 FIFO data bus Bit 4 FIFO data bus Bit 5 FIFO data bus Bit 6 FIFO data bus Bit 7 When high, do not read data from the FIFO. When low, there is data available in the FIFO which can be read by strobing RD# low, then high. When high, do not write data into the FIFO. When low, data can be written into the FIFO by strobing WR high, then low. Enables the current FIFO data byte on D0...D7 when low. Fetches the next FIFO data byte (if available) from the receive FIFO buffer when RD# goes from high to low J3-5, J6-7, J7-1, J7-5 fifo_rxf# Output J3-6, J6-1, J6-4, J6-8, J7-2, J7-6 fifo_txe# Output J3-3, J3-7, J4-1, J6-2, J6-5, J7-3, J7-7 fifo_rd# Input Writes the data byte on the D0...D7 pins into the transmit FIFO buffer when WR goes from Input high to low. Table 4.4 - Data and Control Bus Signal Mode Options – Parallel FIFO Interface J3-4, J3-8, J4-2, J6-3, J6-6, J7-4, J7-8 fifo_wr# Note: # defines active low signals. Copyright © 2010 Future Technology Devices International Limited 11 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 5 Debugger Interface The purpose of the debugger interface, J8, is to provide access to the VNC2 silicon/firmware debugger. The debug interface can be accessed by connecting a VNC2_Debug_Module to the J8 connector. This debug module will give access to the debugger through a USB connection to a PC via the Integrated Development Environment (IDE). The IDE is accessed through a GUI to the VNC2 software development tool-chain and gives the following debug capabilities through the debugger interface: Flash Erase, Write and Program. Application debug - application code can have breakpoints, be single stepped and can be halted. Detailed internal debug - memory and register read/write access. The IDE may be downloaded from http://www.ftdichip.com/Firmware/V2TC/VNC2toolchain.htm The Debugger Interface, and how to use it, is further described in the following applications Note Vinculum-II Debug Interface Description 5.1 Signal Description - Debugger Interface Table 5.1 shows the signals and pins description for the Debugger Interface pin header J8 Name Pin No. Name On PCB Type Description J8-1 J8-2 J8-3 IO0 GND D BG [Key] I/O - Debugger Interface Not connected. Used to make sure that the debug module is connected correctly. GND PWR Input Module ground supply pin Can be used by an external device to reset the VNC2. This pin is also used in combination with PROG# and the UART interface to program firmware into the VNC2. This pin is used in combination with the RESET# pin and the UART interface to program firmware into the VNC2. J8-4 RESET# RST# J8-5 J8-6 PROG# 5V0 PRG# VCC Input PWR Input 5.0V module supply pin. This pin can be used to provide the 5.0V input to the Vinculo from the debugger interface when the Vinculo is not powered from the USB connector (VBUs) or the CN1 Table 5.1 - Signal Name and Description – Debugger Interface Note: # defines active low signals. Copyright © 2010 Future Technology Devices International Limited 12 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 6 ADC Converter The Vinculo module is fitted with a MCP3008, 8 channel analogue to digital converter (ADC) with SPI output. The analogue inputs are tracked out to the header pins such that an external signal may be applied for the VNC2-64Q to read the values with its SPI master interface. Alternatively the VNC2-64Q PWM interface may be used to provide waveforms for the ADC to convert and the VNC2-64Q can read the digital output over SPI in a loopback arrangement. Name Pin No. VNC264Q Pin On PCB Type Description AIN0 J2-1 43 Input MCP3008 analogue input channel 0 / VNC2-64Q PWM0 AIN1 J2-2 44 Input MCP3008 analogue input channel 1 / VNC2-64Q PWM1 AIN2 J2-3 45 Input MCP3008 analogue input channel 2 / VNC2-64Q PWM2 Input J2-4 46 AIN3 MCP3008 analogue input channel 3 / VNC2-64Q PWM3 Input J2-5 J2-6 47 48 AIN4 AIN5 MCP3008 analogue input channel 4 / VNC2-64Q PWM4 Input MCP3008 analogue input channel 5 / VNC2-64Q PWM5 J1-1 49 AIN6 Input MCP3008 analogue input channel 6 / VNC2-64Q PWM6 J1-2 50 AIN7 Input MCP3008 analogue input channel 7 / VNC2-64Q PWM7 Table 6.1 – ADC Interface Copyright © 2010 Future Technology Devices International Limited 13 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 7 Firmware 7.1 Firmware Support The VNC2-64Q on the Vinculo is provided with no firmware pre-loaded however it can be programmed with the customers own firmware created using the Vinculum II firmware development tool -chain or with various pre-compiled firmware profiles to allow a designer to easily change the functionality of the chip. Please refer to: - FTDI website for full details on available pre-compiled firmware 7.2 Available Firmware Please refer to: - FTDI website for full details. 7.3 Firmware Upgrades Refer to the debugger interface section 6 which can be used to update the firmware. 7.4 Arduino Shield Compatible Firmware As the mechanical form factor and pin out is inspired by the Arduino Duemilanove module, many Arduino shields are compatible with the Vinculo module. Libraries and example applications will be made available allowing the Vinculo to be used in association with stepper motors, GSM modules, LCD displays and many other applications. Additionally with the IDE it will be possible for users to develop new shields and applications. Copyright © 2010 Future Technology Devices International Limited 14 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 8 Mechanical Dimensions Figure 8.1 - Vinculo Dimensions ±0.20mm Tolerance (except pitch) Maximum height is 15mm All dimensions are in mm Copyright © 2010 Future Technology Devices International Limited 15 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 9 Schematic Diagram Figure 9.1 - Vinculo Schematics Copyright © 2010 Future Technology Devices International Limited 16 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 10 Arduino Shields The Vinculo module has the same form factor as the Arduino Duemilanove under the terms of the Creative Commons Attribution Share-Alike license, which allows for both personal and commercial derivative works. This allows for other Arduino compatible shields to mate directly to the Vinculo PCB. In addition to the existing shields on the market, a bare shield with a protot yping area, Vinculo_Proto, is also available to enable users to make their own shield. This shield includes connectors and an assortment of resistors and LEDs to provide a starting point aimed at the hobbyist. Copyright © 2010 Future Technology Devices International Limited 17 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 11 Contact Information Head Office – Glasgow, UK Future Technology Devices International Limited Unit 1, 2 Seaward Place, Centurion Business Park Glasgow, G41 1HH United Kingdom Tel: +44 (0) 141 429 2777 Fax: +44 (0) 141 429 2758 E-mail (Sales) sales1@ftdichip.com E-mail (Support) support1@ftdichip.com E-mail (General Enquiries) admin1@ftdichip.com Web Site URL http://www.ftdichip.com Web Shop URL http://www.ftdichip.com Branch Office – Taipei, Taiwan Future Technology Devices International Limited (Taiwan) 2F, No 516, Sec. 1 NeiHu Road Taipei 114 Taiwan, R.O.C. Tel: +886 (0) 2 8791 3570 Fax: +886 (0) 2 8791 3576 E-mail (Sales) tw.sales1@ftdichip.com E-mail (Support) tw.support1@ftdichip.com E-mail (General Enquiries) tw.admin1@ftdichip.com Web Site URL http://www.ftdichip.com Branch Office – Hillsboro, Oregon, USA Future Technology Devices International Limited (USA) 7235 NW Evergreen Parkway, Suite 600 Hillsboro, OR 97123-5803 USA Tel: +1 (503) 547 0988 Fax: +1 (503) 547 0987 E-Mail (Sales) us.sales@ftdichip.com E-Mail (Support) us.support@ftdichip.com E-Mail (General Enquiries) us.admin@ftdichip.com Web Site URL http://www.ftdichip.com Branch Office – Shanghai, China Future Technology Devices International Limited (China) Room 408, 317 Xianxia Road, ChangNing District, ShangHai, China Tel: +86 (21) 62351596 Fax: +86(21) 62351595 E-Mail (Sales): cn.sales@ftdichip.com E-Mail (Support): cn.support@ftdichip.com E-Mail (General Enquiries): cn.admin1@ftdichip.com Web Site URL http://www.ftdichip.com Distributor and Sales Representatives Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) and sales representative(s) in your country. Copyright © 2010 Future Technology Devices International Limited 18 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 Appendix A – References VNC2 Datasheet Vinculum-II Errata Technical Note Application and Technical Notes available at http://www.ftdichip.com/Support/Documents/AppNotes.htm Vinculum-II IO Cell Description Vinculum-II Debug Interface Description Vinculum-II IO Mux Explained Vinculum-II PWM Example Migrating Vinculum Designs From VNC1L to VNC2-48L1A Vinculum-II Toolchain Installation Guide Vinculum-II Toolchain Getting Started Guide Vinculum-II User Guide MCP3008 Datasheet (http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf) Copyright © 2010 Future Technology Devices International Limited 19 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 Appendix B – List of Figures and Tables List of Figures Figure 1.1 – VINCULO ................................................................................................................... 1 Figure 3.1 - Vinculo Diagram .......................................................................................................... 4 Figure 8.1 - Vinculo Dimensions ................................................................................................... 15 Figure 9.1 - Vinculo Schematics .................................................................................................... 16 List of Tables Table 3.1 - Pin Signal Descriptions .................................................................................................. 6 Table 3.2 - USB Slave Pin Out ........................................................................................................ 7 Table 3.3 - USB Slave Pin Out ........................................................................................................ 7 Table 3.4 – Jumper Options ........................................................................................................... 8 Table 4.1 - Data and Control Bus Signal Mode Options – UART ........................................................... 9 Table 4.2 - Data and Control Bus Signal Mode Options – SPI Slave ................................................... 10 Table 4.3 - Data and Control Bus Signal Mode Options – SPI Master ................................................. 10 Table 4.4 - Data and Control Bus Signal Mode Options – Parallel FIFO Interface ................................. 11 Table 5.1 - Signal Name and Description – Debugger Interface ........................................................ 12 Table 6.1 – ADC Interface ............................................................................................................ 13 Copyright © 2010 Future Technology Devices International Limited 20 Document Reference No.: FT_000327 Vinculo Development Module Datasheet Version 1.0 Clearance No.: FTDI#173 Appendix C – Revision History Version 1.0 First Release October 13th 2010 Copyright © 2010 Future Technology Devices International Limited 21