FA5590

FA5590N,FA5591N FUJI Power Supply Control IC Power Factor Correction FA5590／FA5591 Application Note April-2011 Fuji Electric Co.,Ltd Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 1 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N WARNING 1. This Data Book contains the product specifications, characteristics, data, materials, and structures as of April 2011. The contents are subject to change without notice for specification changes or other reasons. When using a product listed in this Data Book, be sure to obtain the latest specifications. 2. All applications described in this Data Book exemplify the use of Fuji’s products for your reference only. No right or license, either express or implied, under any patent, copyright, trade secret or other intellectual property right owned by Fuji Electric Co., Ltd. is (or shall be deemed) granted. Fuji makes no representation or warranty, whether express or implied, relating to the infringement or alleged infringement of other’s intellectual property rights which may arise from the use of the applications described herein. 3. Although Fuji Electric is enhancing product quality and reliability, a small percentage of semiconductor products may become faulty. When using Fuji Electric semiconductor products in your equipment, you are requested to take adequate safety measures to prevent the equipment from causing a physical injury, fire, or other problem if any of the products become faulty. It is recommended to make your design fail-safe, flame retardant, and free of malfunction. 4. The products introduced in this Data Book are intended for use in the following electronic and electrical equipment which has normal reliability requirements. ･Computers ･OA equipment ･Communications equipment (terminal devices) ･Measurement equipment ･Machine tools ･Audiovisual equipment ･Electrical home appliance ･Personal equipment ･Industrial robots etc. 5. If you need to use a product in this Data Book for equipment requiring higher reliability than normal, such as for the equipment listed below, it is imperative to contact Fuji Electric to obtain prior approval. When using these products for such equipment, take adequate measures such as a backup system to prevent the equipment from malfunctioning even if a Fuji’s product incorporated in the equipment becomes faulty. ･Transportation equipment (mounted on cars and ships) ･Trunk communications equipment ･Traffic-signal control equipment ･Gas leakage detectors with an auto-shut-off feature ･Emergency equipment for responding to disasters and anti-burglary devices ･Safety devices 6. Do not use products in this Data Book for the equipment requiring strict reliability such as (without limitation) ･Space equipment ･Aeronautic equipment ･Atomic control equipment ･Submarine repeater equipment ･Medical equipment 7. Copyright © 1995 by Fuji Electric Co., Ltd. All rights reserved. No part of this Data Book may be reproduced in any form or by any means without the express permission of Fuji Electric. 8. If you have any question about any portion in this Data Book, ask Fuji Electric or its sales agents before using the product. Neither Fuji nor its agents shall be liable for any injury caused by any use of the products not in accordance with instructions set forth herein. Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 2 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N CONTENTS 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. Description Features Outline Types of FA5590/91 Block diagram Pin assignment Ratings and characteristics Characteristic curves Outline of circuit operation Description of each circuit block Descriptions of use for each pin Advice for design Example of application circuit ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… ……………………… 4 4 4 4 5 5 6-8 9 - 10 11 - 12 13 - 15 16 - 20 20 - 21 21 Note ・ The contents are subject to change without notice for specification changes or other reasons. ・ Parts tolerance and characteristics are not defined in all application described in this Date book. When design an actual circuit for a product, you must determine parts tolerance and characteristics for safe and economical operation. Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 3 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N 1. Description FA5590/FA5591 is power-factor correction converter IC operating in critical conduction mode. It realizes low power consumption by using high voltage CMOS process. It is equipped with many fault protection functions such as FB short-circuit detection circuit which stops the operation when abnormal output voltage is detected. 2. Features             Very Low Standby Power by disusing Input Voltage Detection Resistors High-precision over current protection： 0.6V±5% Improved power efficiency at light load due to Maximum Frequency Limitation No Audible Noise at Startup Soft-Startup and Soft-OVP functions Low current consumption by CMOS process Start-up : 80µA(max.), Operating : 2mA(typ.) Enabled to drive power MOSFET directly Output peak current, source : 500mA, sink : 1000mA Open/short protection at feedback (FB) pin Under-voltage Lockout FA5590: 9.6V ON / 9V OFF FA5591:13V ON / 9V OFF Overvoltage protection Restart timer Standby function 8-pin package (SOP) 3. Outline SOP-8 0.18±0.08 8 5 3.9 6 ± 0.2 1 4.9 4 0.20 1.8 MAX ～ 0° 8° 1.27 0.4 ±0.1 4. Type of FA5590/91 Type FA5590N FA5591N Startup Threshold 9.6V(typ.) 13V(typ.) Package SOP-8 SOP-8 Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 4 http://www.fujielectric.co.jp/products/semiconductor/ 0.65±0.25 +0.10 -0.05 FA5590N,FA5591N 5. Block diagram 1.8uA 6. Pin assignment VCC OUT GND IS 8 7 6 5 1 FB 2 COMP 3 RT 4 RTZC Pin No. 1 2 3 4 5 6 7 8 Pin symbol FB COMP RT RTZC IS GND OUT VCC Function Feedback Voltage Input Compensation Set Maximum on time Set Delay time Current Sense Input Ground Output Power Supply + - Delay Description Input for monitoring PFC output voltage Output of error amplifier Set Maximum on time by connecting resistor Set Delay time of Turn-on from zero-cross timing by connecting resistor Input for sensing current Ground Output for driving a power MOSFET Power supply for IC Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 5 http://www.fujielectric.co.jp/products/semiconductor/ SP OVP FA5590N,FA5591N 7. Ratings and characteristics The contents are subject to change without notice. When using a product, be sure to obtain the latest specifications. (1) Absolute Maximum Ratings Item Total Power Supply and Zener Current Supply Voltage Output Current Sink Source Input voltage (FB) Input voltage (IS) Power dissipation Operating Ambient Temperature Operating Junction Temperature Storage Temperature Symbol Icc+Iz Vcc Io Vinfb Vinis Pd Ta Tj Tstg Ratings 15 28 +1000 -500 -0.3 to 5 -5 to 0.3 400 -40 to +105 +150 -40 to +150 Unit mA V mA mA V V mW °C °C °C Maximum dissipation curve 400mW Max imu m 許ssipation Pd (mW) di 容損失 Package thermal resistor θ j - a = 3 1 2 ° C /W θj-ｃ= 72°C/W -40 25 105 周囲温 temperature Ambience 度 Ta(℃) Ta (°C) 150 (2) Recommended Operating Conditions Item Supply Voltage RT pin resistance RTZC pin resistance I S p i n f i l t e r r e s i s ta n c e Symbol Vcc Rrt R r t zc Ri s f MIN 10 20 0 12 82 47 TYP 26 150 150 100 MAX V kΩ kΩ Ω Unit Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 6 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N (3)Electrical Characteristics (Unless otherwise specified, Ta=25°C 、 Vcc=12V 、 Rrt=82kΩ 、 R rtz c =5 6 k Ω ) ERROR AMPLIFIER (FB,COMP Pin) Item Symbol Voltage Feedback Input Vfb Threshold Line Regulation Temperature stability Transconductance Output Current Regline VdT Gm Io Condition MIN 2.465 Vcc=10V to 26V Tj=-30°C to +85°C Source:V(FB)=1.0V Sink:V(FB)=4.0V 50 20 -30 -20 TYP 2.500 -10 ±0.5 75 40 -50 MAX 2.535 100 60 -70 Unit V mV mV/°C µmho µA RAMP OSCILLATOR Item Maximum on range (RT Pin) Symbol Tonmax Tonmax_ soft-start Fmax Vrt Maximum on range (Soft start) Maximum oscillating frequency RT output voltage Condition V(COMP)=5.0V V(FB)=Vfb V(COMP)=5.0V V(FB)=1.0V V(COMP)=1.0V MIN 20 26 20 300 0.90 TYP 32 MAX Unit us us 360 1.15 420 1.40 kHz V PWM comparator (COMP Pin) Item Symbol Input threshold voltage Vthcomp SOFT START (FB Pin) Item Soft start cancellation voltage Condition 0.6 MIN 0.7 TYP MAX 0.8 Unit V Symbol Vthsoft Condition V(COMP)=5.0V Ton>Tonmax*90% MIN TYP 0.95Vfb MAX Unit V OVERVOLTAGE COMPARATER (FB Pin) Item Symbol Vsovph Static OVP threshold voltage Vsovpl Vsovphys Dynamic OVP Vdovp threshold voltage Condition V(FB)=2.5V→ 3.0V V(FB)=3.0V→ 2.5V Vsovph-Vsovpl V(FB)=2.5V→ 3.0V Ton=Tonmax*70% MIN 1.070*Vfb 1.025*Vfb 0.020*Vfb 1.025*Vfb TYP 1.09*Vfb 1.045*Vfb 0.040*Vfb 1.050*Vfb MAX 1.105*Vfb 1.065*Vfb 0.060*Vfb 1.075*Vfb Unit V V V V FB SHORT COMPARATOR (FB Pin) Item Symbol Input threshold voltage Vthfb Pull-up current Ipullup CURRENT SENSE COMPARATOR (IS Pin) Item Symbol IS threshold voltage IS threshold voltage temperature characteristics Output delay Zero current detection voltage Zero current detection delay RTZC output voltage Vthis Vthisdt Tphl Vzcd Tzcd Vrtzc Condition V(FB)=2.5V 0.1 1.2 MIN 0.3 1.8 TYP MAX 0.5 2.4 Unit V µA Condition Tj=-30°C to +85°C MIN -0.58 -1.5 -15.0 1.0 0.90 TYP -0.60 MAX -0.62 1.5 Unit V % ns mV us V 200 -10.0 1.5 1.15 500 -5.0 2.0 1.40 Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 7 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N OUTPUT (OUT Pin) Item Output voltage (L) Output voltage (H) Output rise time Output fall time Restart timer Item delay time Symbol Vol Voh Tr Tf Condition Isink=200mA Isouce=200mA CL=1.0nF CL=1.0nF MIN 7.8 1.2 8.4 50 25 TYP MAX 3.3 120 100 Unit V V ns ns Symbol Tdly Condition MIN 20 TYP MAX Unit µs Low voltage protection (VCCPin) Item Symbol ON threshold voltage Von OFF threshold voltage Hysteresis width Voff Vhysvcc Condition FA5590 FA5591 FA5590 FA5591 MIN 8.6 11.5 8 0.3 3.0 TYP 9.6 13 9 0.6 4.0 MAX 10.6 14 10 0.9 5.0 Unit V V V V V All devices (VCCPin) Item Start-up current Operating current Dynamic orerating current Standby current Symbol Istart Icc Iop Istb Condition Vcc=Von-0.1V CL=1.0nF Vfb=0V MIN 1.5 2.0 30 TYP MAX 80 3.0 4.0 60 Unit µA mA mA uA Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 8 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N 8. Characteristics curves （ Unless otherwise specified, Ta=25°C and Vcc=12V) Error amplifier voltage feedback input ｴﾗｰｱﾝﾌﾟ 入力 ｽﾚｯｼｭ supply voltage(Vcc) threshold(Vfb) vs. 電圧 (Vfb) vs 電源電圧(VCC) Error amplifier voltage feedback input ｴﾗｰｱﾝﾌﾟ 入力 ｽﾚｯｼｭ 電圧 (Vfb) vs threshold(Vfb) vs. junction temperature(Tj) ｼﾞｬﾝｸｼｮﾝ 温度 (T ｊ ) 2.55 2.54 2.53 2.53 2.52 2.51 Vfb [V] 2.50 2.49 2.48 2.47 10 15 20 VCC [V] 25 30 Vfb [V] 2.52 2.51 2.5 2.49 2.48 2.47 -50 0 50 Tｊ [℃] 100 150 FB pull-up current(Ipullup) vs. FBﾌﾟﾙｱｯﾌﾟ 電流 (Ipullup) vs. supply voltage(Vcc) 電源電圧 (VCC) 3 2.5 Ipullup [uA] 2 1.5 1 0.5 10 15 20 VCC [V] 25 30 FB pull-up current(Ipullup) vs. FBﾌﾟﾙｱｯﾌﾟ 電流 (Ipullup) vs. junction temperature(Tj) ｼﾞｬﾝｸｼｮﾝ 温度 (Tj) 3 2.5 Ipullup [u A] 2 1.5 1 0.5 0 -50 0 50 Tj [℃] 100 150 Error amplifier transconductance(Gm) vs. ｴﾗｰｱﾝﾌﾟ 相互 ｺﾝﾀﾞｸﾀﾝｽ(Gm) vs. junction temperature(Tj) ｼﾞｬﾝｸｼｮﾝ 温度 (Tj) 100 90 Gm [umho] 80 70 60 50 -50 0 50 Tj [℃] 100 150 Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 9 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N Current sense comparator maximum ISｽﾚｼｭ 電圧 vs. supply threshold(Vthis) (Vthish) vs. voltage(Vcc) ｼﾞｬﾝｸｼｮﾝ 温度 (Tj) -580 45 40 Maximum on-range(Tonmax) vs. RT resistance(Rrt) 最大オン幅 (Tonmax) vs. RT 端子抵抗 (Rrt) -590 Tonmax/soft [us] 35 30 25 20 15 10 5 after soft start ソフトスタート解除後 Vth is [V] -600 ソフトスタート期間 at soft start -610 -620 -50 0 50 Tj [℃] 100 150 0 10 30 50 70 90 110 130 150 RT resistance [kΩ] Maximum oscillating frequency(Fmax) vs. 最 大 発 振 周 波 数 (Fmax) RT resistance(Rrt) vc RT 端子抵抗 (Rrt) 700 Zero current detection delay(Tzcd) vs. ｾﾞﾛ 電流検出遅延 (Tzcd) vs. RTZC resistance(Rrtzc) RTZC 端子抵抗 (Rrtzc) 4 3.5 3 Tzcd [us] 2.5 2 1.5 1 0.5 0 0 20 40 60 80 100 120 140 160 600 500 Fmax[kHz] 400 300 200 100 0 10 30 50 70 90 Rrt[kΩ] 110 130 150 Rrtzc [k Ω] Standby current(Istb) vs. ｽﾀﾝﾊﾞｲ 電流」（ Istb) vs. supply voltage(Vcc) 電源電圧 (VCC) 120 100 80 Istb [uA] 60 40 20 0 10 15 20 VCC [V] 25 30 Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 10 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N 9. Outline of circuit operation This IC is a power-factor correction converter utilizing a boosting chopper, operating in critical mode. Hereinafter is outline of the operation consisting of switching operation and power-factor correction operation using the circuit diagram shown in Fig. 1. By repeating the operations of t1 ~ t3, the switching in critical mode is continued. With the power-factor correction circuit in the critical mode, the switching frequency is always changing due to instantaneous values of the AC input voltage. The switching frequency also changes when the input voltage or load changes. (1) Switching operation This IC performs the switching operation in the critical mode applying self-oscillation without using an oscillator. Fig. 2 shows the outline of waveforms of the switching operation in steady state. The operation is as follows. t1. Q1 turns on, the current through inductor (L1) rises from zero. At the timing of Q1 on, Vramp; output of ramp generator states to rise. Vramp and Vcomp; output of the error amplifier are compared by the PWM comparator, and when Vramp>Vcomp, Q1 turns off and the output of the ramp generator drops. When Q1 turns off, the voltage across L1 inverts and the current through L1 decreases while the current is supplied to the output side through D1. The current through L1 is detected by Is terminal, and when the current becomes zero, the output of the current detection comparator becomes High to turn on Q1 after delay given by the delay circuit, thus moving to the next switching cycle (t1). Iin IL1 OUT (Q1 gate) Q1 Vds IL1 Vcomp Vramp PWM.comp. output (reset) ZCD.comp. output (set) t1 t2 t3 t1 t2. t3. Fig. 2 Switching Operation, Waveforms L1 D1 Vo AC C1 Rs Q1 Vds IS 5 OCP.comp -0.6V ZCD.comp Delay -10mV RTZC 4 Restart RAMP OSC PWM.comp R S Q 7 OUT UVLO OVP SP TIMER Restart FB RT 3 ERRAMP 2.5V 1 FA5590/91 COMP 2 Fig.1 Block diagram of operating circuit Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 11 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N (2) Power-factor correction operation As explained in the switching operation, the current flowing through the inductor repeats in triangular waveforms. The mean value (IL 1(mean)) of the triangular wave current becomes 1/2 of the peak value (IL 1(peak)). (Fig. 3) By controlling to make outline linking the peak of the inductor current to sine wave and removing switching ripple current, the smoothed current flowing from the AC input power source has sine wave shape. FA5590/FA5591 uses fixed on time control shown in Fig. 4. This control determines the on time of the output of IC (gate drive signal for Power Mos) with combination of the error amplifier output and saw tooth wave. While the load is constant, the output of the error amplifier is constant, and on time also stays constant. Since an inclination of inductor current depends on input voltage (an inclination of inductor current is proportional to input voltage) and on time is constant, the outline linking the peak of the inductor current becomes same AC waveform as the input voltage, which enables power-factor correction operation. IL1(peak) IL1 IL1(mean) =1/2×IL1(peak) 拡大 enlarged 2×Iin(peak) IL1 input 力電圧 入 voltage C1でスイッチングに filtered the high 伴うリッ content frequency プル 電流を除去 by C1 Iin Iin(peak) error アンプ エラー amplifier 出力 output Fig.3 Outline of inductor and AC input current MOSFET Gate While the output of the error エラーアンプの出力が一定 amplifier is constant が load is (負荷一定)の場合、オン幅 and 一定となる(オン幅固定制御) constant constant, on time stays (Fixed on time control) インダクタ電流 of the ク ピー inductor Outline linking the peak current 入力電流のピークが入力 電圧と同じAC波形となる (力率改善動作) inductor current インダクタ電流 インaverage ダクタ電流 平均 waveform of the inductor current when the inductor current、のこぎdown Power Mosがオンし goes り波が to zero, Power MOS がる(臨on and saw 立ち上 turns 界動作) tooth wave starts to rise インダクタ電流ゼロのタイミングで Outline linking the peak of the inductor current has the same waveform of the input voltage (Power factor correction operation) Fig.4 Fixed on time control Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 12 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N 10. Description of each circuit block Vout (1) Error amplifier The error amplifier is to make the output voltage constant with feedback control. For this IC, a transconductance type is used for the error amplifier. The non-inverting input terminal is connected to internal reference voltage of 2.5V (typ.). The inverting input terminal is fed with output voltage of the power-factor correction converter, and normally use divided voltage with resistors. To the inverting input, internal constant current source o f 1 . 8 μA i s c o n n e c t e d f o r F B o p e n d e t e c t i o n f u n c t i o n . The output of the error amplifier (COMP) is connected to the PWM comparator and controls the on time of the OUT output. The output voltage of PFC contains much of ripple of frequency 2 times AC power line (50 or 60Hz). When this ripple component becomes largely appears in the output of the error amplifier, the power-factor correction converter does not stably operate. In order to obtain the stable operation, connect capacitors and a resistor at Pin No. 2 (COMP) as shown in Fig.5. 1.8uA RAMP OSC R1 FB 1 R2 C3 VREF(2.5V) ERRAMP PWM Comp OUT F/F COMP R3 C5 C4 2 Fig.5 Error amplifier circuit Maximum 最onオン幅 大 time (2) Soft start circuit FA5590/91 is equipped with soft start function to suppress rushing startup and overshoot of output voltage when starting. The soft start circuit works after UVLO and standby is released and before the soft start cancellation voltage is exceeded. In the meantime, the soft start function restricts the startup speed of the output voltage by limiting the maximum on time to about 80% when the FB terminal voltage is lower than the reference voltage. (Fig. 6) The on time limited by the soft start is cancelled when the FB terminal voltage becomes higher than the soft start cancellation voltage. 100% 80% VF voltage Vfb*0.95 Vfb (2.5V) FB電圧 (3) Overvoltage protection circuit (OVP) This circuit is to limit the voltage when the output voltage of the power-factor correction converter exceeds the set value. When this IC starts up or load changes sharply, the output voltage of the converter may exceed the set value. In such a case, this protect circuit works to control the output voltage. FA5590/91 has dynamic OVP function to narrow the on tme when the FB terminal voltage becomes above 2.5V, and static OVP function to stop the output when it becomes higher than 1.09 times the reference voltage. Normally the voltage of the FB terminal is 2.5V, approximately same as the reference voltage of the error amplifier. When the output voltage rises due to starting up or sharp load changes and the voltage of the FB terminal becomes higher than 2.5V, the on time narrows by the dynamic OVP function. When the voltage further rises and exceeds the comparator reference voltage, output voltage of the comparator(OVP) inverts to stop the OUT pulse.(Fig. 7) When the output voltage turns below 1.05 times the reference voltage, the OUT pulse resumes. Fig.6 maximum on time at soft start Onン幅 オ time 100% 70% VF voltage Vfb (2.5V) Vfb*1.05 Vfb*1.09 FB電圧 Fig.7 on time at overvoltage Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 13 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N Vout (4) FB short-circuit/open detection circuit (standby circuit) In the PFC circuit of booster type, if feedback voltage is not properly provided to the FB terminal due to short-circuit or open-circuit around R1, R2, the error amplifier cannot control the constant voltage and the output voltage abnormally rises. In such a case, the overvoltage protection circuit also cannot operate because the detection of the output voltage is abnormal. To avoid such situation, this IC is equipped with FB short-circuit detection circuit. This circuit is composed of the reference voltage of 0.3V (typ.) and comparator (SP), and when the input voltage of the FB terminal becomes 0.3V or lower due to such trouble as short-circuit of R2 or opening of R1, the output of the comparator (SP) inverts to stop the output of the IC and the IC stops operation resulting in standby state. Once the voltage of the FB terminal decreases to almost zero and the output of the IC stops, and then when the voltage of the FB terminal returns to 0.3V or higher, the IC resumes from the standby state and the OUT pulse restarts. When the connection between the FB terminal and the node of voltage dividing resistors is broken, the FB terminal voltage is forcefully r a i s e d b y t h e i n t e r n a l c o n s ta n t c u r r e n t s o u r c e o f 1 . 8 μ A c o n n e c t e d t o t h e FB terminal. Since the error amplifier output (COMP) voltage decreases as the FB terminal voltage rises, the output voltage decreases or OUT output is stopped. 1.8uA VREF(2.5V) R1 FB 1 C3 ERRAMP COMP R2 Short Ｃｏｍｐ SP Vthfb(0.3V) Vsovp(1.09*VREF) OVP ＯＶＰ Ｃｏｍｐ Vdovp(1.05*VREF) RAMP OSC Ｄｙｎａｍｉｃ ＯＶＰ Fig.8 FB pin circuit L1 C1 Rs R4 C6 C8 D1 (5) Ramp oscillating circuit The ramp oscillating circuit receives signal from the zero current detection circuit or restart circuit, and outputs the set signal of F/F for OUT output and saw tooth wave signal for deciding the duty of the PWM comparator. (5-1) Maximum frequency limiting The switching frequency of PFC in the critical mode has characteristic to rise at light load. FA55901/91 has the maximum frequency limiting function to improve the efficiency at light load and limits the switching frequency to Fmax (Hz). (Fig. 10) The maximum frequency Fmax depends on the resistance connected between the RT terminal and GND. When the switching frequency is lower than Fmax, the zero level of the inductor current is detected and MOSFET is turned on after the zero current detection delay Tzcd to adjust turning on take place at the bottom of Vds wave, as shown in Fig. 11. In case of light load where the switching frequency is limited to Fmax, the zero level of the inductor current is detected and no turn-on occurs after the zero current detection delay, but turn-on occurs at the cycle of 1/Fmax, as shown in Fig. 12. IS 5 1.4kΩ Q1 C2 R6 C7 RTZC 4 R5 RT 3 OUT用 F/F PWM Comp ZCD.comp Delay RAMP OSC 21.9kΩ 20mV OCP 100mV OCP.comp 46.7kΩ 1.5V Fig.9 Current detection circuit Switching frequency SW周波数 Fmax (6) Current detection circuit The current detection circuit is composed of zero current detection and overcurrent detection. (Fig. 9) (6-1) Zero current detection circuit This IC performs the switching operation by self-oscillation in critical mode instead of the oscillator with the fixed frequency. The zero current detection circuit ZCD. Comp detects that the inductor current becomes zero to perform the critical mode operation. With the zero current detection, the voltage across the current detection resistor Rs connected to the GND line is fed to the IS terminal, and it is compared by the zero current detection comparator, and when it becomes -4mV or more, the inductor current is regarded as zero level. When the zero level is detected, the delay Tzcd is generated by the zero cross delay detection circuit, and then set the F/F for OUT to make 負荷 Load Fig.10 maximum frequency limiting Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 14 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N MOSFET turn on. (6-2) Overcurrent detection protective circuit The overcurrent detection protective circuit detects the inductor current and protects MOSFET by turning off the OUT output when it becomes higher than a set current level. With the overcurrent detection, the voltage across the current detection resistance Rs connected to the GND is fed to the IS terminal, and when the IS terminal voltage compared by the overcurrent detection comparator becomes lower than -0.6V, it is regarded as overcurrent state. When the overcurrent is detected, the F/F for OUT output is reset to make MOSFET turn off. inductor current インダクタ電流 Vds MOSFET の Vds Tzcd T＜ 1/Fmax (7) Zero cross delay time setting circuit Vds between the drain and the sources of the MOSFET starts oscillating through resonance of L1 and the parasitic capacitor component on the circuit just before the MOSFET turns on. When the proper value of Rtzc, the turn on timing of MOSFET can be adjusted at the bottom of the voltage oscillation. This makes it possible to minimize the switching loss and the surge current generated at the turn-on. (Fig. 13) When the Rtzc is smaller, the turn-on timing becomes earlier, and vice versa. (Fig. 14) Since the optimum value of this Rtzc changes depending on the circuit and input/output conditions, tuning up is required so as to achieve an optimum state while evaluating the operation with actual circuit. Fig.11 when the switching frequency is lower than the maximum frequency Fmax インダクタ電流 inductor current MOSFET の Vds Vds Tzcd T= 1/Fmax (8) Restart timer This IC utilizes self oscillation instead of the oscillator with fixed frequency, and in the steady operation, it turns on MOSFET with a signal from the zero current detector. But in start up or light load condition, a trigger signal is required for starting up or stable operation. This IC is provided with a restart timer, and when the output of IC c o n t i n u e s t u r n o ff f o r 2 0 μ s o r m o r e , t h e t r i g g e r s i g n a l i s a u t o m a t i c a l l y generated. This signal can realize stable operation even when starting up or the load is light. Fig.12 when the switching frequency is limited to the maximum frequency Fmax MOSFET Vds のVds (9) Under Voltage Lock out (UVLO) UVLO is equipped to prevent circuit malfunction when supply voltage drops. When the supply voltage rises from zero, the operation starts at 9.6V (typ.) for FA5590 and 13V (typ.) for FA5591. When the supply voltage decreases after the operation starts, either part number stops the operation at 9V (typ.). When UVLO is on and IC stops operation the OUT terminal becomes LOW and cuts off the output. The current consumption of the IC d e c re a s e s t o 8 0 μA o r l e s s . Tzcd(Rtzc最適） Tzcd (with adequate Rtzc) Fig.13 Vds waveform at turn on (with adequate Rtzc) (10) Output circuit portion The output portion is of push-pull circuit and can directly drive the MOSFET. The peak current of the output portion is 1.0A maximum for sink and 0.5A maximum for source. MOSFET Vds のVds Tzcd (Rtzc is too small) Tzcd（Rtzcが小さい） Tzcd(Rtzcが大きい） Tzcd (Rtzc is too large) Fig.14 Vds waveform at turn on (with inadequate Rtzc) Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 15 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N 11. Description of use for each pin (1) Terminal No. 1 (FB terminal) Functions (i) Input of feedback signal of output voltage setting (ii) Detect short-circuit of FB terminal (iii) Detect output overvoltage Application (i) Feedback signal input - Wiring Connect the node between voltage dividing resistors for setting output voltage. - Operation The output voltage Vout of PFC is controlled so that FB voltage matches the internal reference voltage (2.5V). To detect FB terminal opening, pull-up current (Ipullup) is supplied to the FB terminal. This current flows to GND via R2. For this reason, resistance R1, R2 should be set in consideration of this current when the output voltage (Vout) is set. Vout 1.8uA VREF(2.5V) R1 FB 1 C3 ERRAMP COMP R2 Short Ｃｏｍｐ SP Vthfb(0.3V) Vsovp(1.09*VREF) OVP ＯＶＰ Ｃｏｍｐ Vdovp(1.05*VREF) RAMP OSC Ｄｙｎａｍｉｃ ＯＶＰ Vout  ( VREF / R 2  Ipullup)  R1  VREF VREF : Reference voltage =2.5V(typ) Ipullup : FB terminal pull-up current =1.8uA(typ) To prevent malfunction due to noise, capacitor C3 of 100pF~3300pF should be connected between the FB terminal and GND. (ii) FB terminal short-circuit detection - Wiring Same as for the (i) Feedback signal input - Operation When the input voltage of the FB terminal becomes 0.3V or lower due to short-circuit of R2, the output of the comparator (SP) inverts to stop the output of the IC. (iii) Output overvoltage detection - Wiring Same as for the (i) Feedback signal input - Operation Normally the voltage of the FB terminal is 2.5V almost same as the reference voltage of the error amplifier. When the output voltage rises for some reason and the voltage of the FB terminal reaches the comparator reference voltage (1.09*VREF), the output of the comparator (OVP) inverts to stop the OUT pulse. If the output voltage returns to the normal value, the OUT pulse resumes. Fig.15 FB pin circuit (2) Terminal No. 2 (COMP terminal) Function (i) Phase compensation of internal ERRAMP output Application (i) Phase compensation of internal ERRAMP output - Wiring Connect C, R between COMP terminal and GND as shown in Fig. 16. - Operation Connecting C, R to the COMP terminal suppress ripple component at 2 times the frequency of the AC line that appears in the FB output. PWM.comp 2 ERRAMP COMP R3 C4 C5 Fig.16 COMP pin circuit Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 16 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N (Reference) Example of application circuit： C4=0.1uF C5=0.15uF R3=68kΩ The above is a reference example, and it should be decided by sufficiently verifying with actual application circuit. (3) Terminal No. 3 (RT terminal) Functions (i) Set maximum on time (ii) Set maximum oscillation frequency Application (i) Set maximum on time On time Ton in each switching cycle with input and output conditions is theoretically expressed by the following formula. Ton  2  Lp  Po Vac2   Input Voltage (Vrms): Vac Inductor (H): Lp Maximum Output Power (W): Po E ff i c i e n c y : η The maximum on time Tonmax must be set equal to or more than the on time at minimum input voltage Vac (min) at which the on time is maximum. In soft start, the maximum on time is limited to 80%, and therefore, the maximum on time should be set as shown by the following formula. 2.5V(typ) RAMP _OSC Ton max  2  Lp  Po Vac(min) 2    0.8 C7 3 (ii) Set maximum oscillation frequency To improve the efficiency at light load, FA5590/91 limits swithching frequency at light load to Fmax (Hz). The maximum frequency Fmax depends on the resistance connected between RT terminal and GND. - Wiring Connect R5 between RT and GND as shown in Fig. 17. For the resistance dependency of the maximum on time and maximum oscillation frequency, see Chapter 8. Characteristic Curve. The current sourced from the RT terminal changes depending on the r e s i s ta n c e c o n n e c t e d . W h e n R 5 i s r e l a t i v e l y l a r g e , f o r e x a m p l e , 8 2 k Ω , the current is about 10uA. When the current is relatively small, it is recommended to connect a capacitor of about 0.01uF in parallel to the resistor to stabilize the RT voltage, as shown in the figure. R5 Fig.17 RT pin circuit (4) Terminal No. 4 (RTZC terminal) Function (i) Set zero current detection delay time Application (i) Set zero current detection delay time Select a resistance value so as to set such delay time that MOSFET will turn on at the bottom of the vds waveform. (Vds is almost 0V) - Wiring Connect R6 between RTZC terminal and GND as shown in Fig. 18. For the resistance dependency of the delay time, see chapter 8. Characteristic Curve. Like the RT terminal as mentioned the previous section, the sourced current is small, and it is recommended to connect a capacitor of about 0.01uF in parallel to the resistor, as shown in the figure. 2.5V(typ) Delay 4 C8 R6 Fig.18 RTZC pin circuit Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 17 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N (5) Terminal No. 5 (IS terminal) Function (i) Detect zero current through the inductor (ii) Detect overcurrent and turn off OUT output Application (i) Detect the current value through the inductor The maximum threshold voltage Vthis of the IS terminal is -0.58V (max). The current detection resistance Rs is set so that necessary current can be supplied for this VthIS. With maximum output Po (W) and minimum input voltage Vac (min), the maximum value of peak current (ILP (max)) through the inductor can be approximately expressed by the following formula. L1 C1 Rs R4 C6 IS 5 1.4kΩ D1 Q1 C2 I LP(max)  2  2  Po   Vac(min) ZCD.comp 21.9kΩ 20mV OCP.comp 46.7kΩ 1.5V 100mV Therefore, the value of RS (Ω ) is determined as follows. Rs   VthIS 0.58  I LP(max) I LP(max) - Wiring Connect the current detection resistor Rs between the source terminal (GND) of MOSFET and the minus lead of the input capacitor (C1). The voltage across Rs is fed to the IC as the current/voltage conversion signal. - Operation (i) The internal reference voltage and the internally divided voltage of the IS terminal are inputted to the ZCD comparator, and when the IS terminal voltage becomes larger than -10mV, the comparator output inverts and turns on the OUT output. (ii) When the IS terminal voltage becomes smaller than -0.6V, the comparator output signal inverts and turns off the OUT output. - Additional explanation When MOSFET turns on, the gate driving current of MOSFET and surge current due to discharging the parasitic capacitors run to the current detection resistance Rs. Large surge current may cause malfunction following disturbed input current waveform. Depending on the amperage of the surge current or timing, whisker-like pulse may be mixed in the turn-on portion of the OUT pulse of the IC. Normally, therefore, a CR filter is connected as shown in Fig.20. The cutoff frequency of this CR filter must be set sufficiently higher than the switching frequency so that it will not affect the normal operation. It is recommended to set this cutoff frequency to about 1~2MHz. Fig.19 IS pin circuit L1 D1 C2 ZD Q1 Rs 7 R4 C6 GND 5 IS Fig.20 IS pin protection circuit (1) 1 ≒ 1～2[ MHz] 2    C6  R 4 Since the threshold level is made through resistance dividing voltage as shown in Fig.19, the input resistor R4 is recommended to be not higher than 47Ω. The voltage rating of the IS terminal is -5V. In case of an ordinary boosting circuit, rush current to charge the output smoothing capacitor C2 runs at the moment the ac input voltage is connected. This current may become far larger in comparison with the input current during normal operation. As a result, far larger voltage may also be applied to the IS terminal than the ordinary case. In order to avoid damage, protective circuit must be taken in design so that voltage higher than -5V, absolute maximum rating, will not be applied to the IS terminal even when such ac input voltage is connected. If voltage higher than the rating is predicted to be applied to the IS terminal, use rush preventive circuit suppress rushing current or place Zener diode shown in Fig. 20 and Fig. 21. L1 D1 C2 Q1 Rs 7 R4 GND ZD C6 5 IS Fig.21 IS pin protection circuit (2) Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 18 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N (6) Terminal No. 6 (GND terminal) Function This voltage of GND terminal is the reference for each portion of whole circuits. 8 Driver VCC OUT 7 (7) Terminal No. 7 (OUT terminal) Function This drives MOSFET. Application - Wiring Connect it to the gate terminal of MOSFET through resistance. - Operation During the period when turn on MOSFET, the output state is high, and the output voltage is almost VCC. During the period when turn off MOSFET, the output state is low, and the output voltage is almost 0V. - Additional explanation The gate resistor is connected to limit the current of the OUT terminal and prevent oscillation of the gate terminal voltage. The rating of the output current is 0.5A for source and 1A for sink. Using the connections shown in Fig. 23 and Fig. 24, it is possible to independently set the gate driving current of turning on and off MOSFET. 6 GND Fig.22 OUT pin circuit(1) 8 Driver VCC 7 OUT 6 GND Fig.23 OUT pin circuit(2) (8) Terminal No. 8 (VCC terminal) Function (i) Supply the power of IC. Application - Wiring Connect the start up resistor R7 between VCC terminal and Voltage line after rectifying from AC line, which supplies power before IC starts switching operation. In general application, the power is provided from the auxiliary winding of the transformer through D2 during operation. In some application, DC power supply can be connected. - Operation In the application with out DC power supply to feed VCC terminal, the current through start up resistor R7 charges the smoothing capacitors C5 and C9, and when VCC voltage rises to the on threshold voltage of UVLO, the IC starts operating. Before starting operation, it is necessary to supply current higher than 80uA (max), the startup current of the IC. During steady operation, the VCC is supplied from the auxiliary winding of the inductor. (Fig. 27) When the supply voltage rises from zero, the operation starts at 9.6V (typ.) for FA5590 and 13V (typ.) for FA5591. If the supply voltage decreases after the operation starts, the operation stops at 9V (typ.) by UVLO for both ICs. After IC stops operation due to UVLO, the OUT terminal is Low state to cut off the output. Additional explanation UVLO is preventive function to keep the circuit from malfunction when the supply voltage decreases. W i t h t h e s ta r t u p r e s i s t o r R 7 , i t i s n e c e s s a r y t o s u p p l y c u r r e n t o f 8 0 μ A o r higher, the startup current, until start operating, and the following formula must be satisfied. 8 Driver VCC 7 OUT 6 GND Fig.24 Out pin circuit(3) L1 R7 D2 C9 8 VCC Fig.25 VCC pin circuit(1) C1 C5 R7  2  Vac (min)  Von(max) 80  10 6 8 VCC External DC 外部DC電源 Power Supply C9 C5 Fig.26 VCC pin circuit(2) Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 19 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N Von(max): Low voltage ON threshold voltage of UVLO FA5590 10.6V(max) FA5591 14V(max) The value of R7 expressed with the formula is, however, at least necessary and minimum condition to start the IC, and actually it should be decided considering the starting up time required for each application circuit. This starting up time must be examined by measuring in actual circuit operation. During the steady operation, Vcc is supplied from the auxiliary winding of the transformer. But there is some time delay until the auxiliary winding voltage sufficiently rises after the IC starts switching operation. To prevent Vcc from decreasing to the off threshold voltage of UVLO, it is necessary to decide the capacitance of the C5 connected to Vcc. Since this time delay differs depending on the circuit, it should be decided after checking with actual circuit It is also recommended to place the ceramic capacitor C9 (about 0.1uF) to remove switching noise. Vcc UVLO ON UVLO OFF UVLO OFFまで Vcc下しないこと 低 must not drop below UVLO OFF Auxiliary winding voltage 時間t 補助巻線電圧 Time t Fig.27 Vcc voltage at startup OUT 7 SBD (9) Minus voltage of each terminal In some cases, the voltage oscillation of Vds just before MOSFET turns on is applied to the OUT terminal through parasitic capacitors, etc. and minus voltage may be added to the OUT terminal. If this minus voltage is large, the parasitic element inside the IC is activated, and the IC may malfunction. If this minus voltage is expected to exceed -0.3V, Schottky barrier diode should be connected between the OUT terminal and GND. With the forward voltage of the Schottky barrier diode, the minus voltage can be clamped. For other terminals as well, care should be taken so that minus voltage will not be applied in the same way. Fig.28 Protection circuit of OUT pin against the negative voltage 12 Advice for design (1) advice in pattern designing Main power parts such as MOSFET, inductor, and diode in the main switching circuit are operating with large voltage and current. For this reason, if the IC or wires of input signals are located close to these main power parts, malfunction may occur affected by noise generated there. Special care should be taken to the following cases. (Bad examples) - IC is placed under the main circuit parts such as inductor or just on the back side of the main circuit parts in case of a double-sided board. (Fig. 29) - IC is placed just beside the inductor, MOSFET or diode. (Fig. 30) - Signal wires are placed under the inductor or near MOSFET or diode. (Fig. 31) IC is placed under 板の裏面の インダクタの下(基the inductor 場合 も含む）にICが配置されている。 Fig.29 Bad example (1) IC is ダクタやMOSFETのすぐ近くに イン placed just beside the inductor,MOSFET いる。 ICが配置されて インダクタの下やMOSFETのすぐ近く Signal wires are placed under を信inductor線が通過している。 the 号の配 or near MOSFET Fig.31 Bad example (3) Fig.30 Bad example (2) Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 20 http://www.fujielectric.co.jp/products/semiconductor/ FA5590N,FA5591N (2) Example of GND wiring around IC (Note) This wiring example is to make users understand the idea of GND wiring. The occurrence conditions of noise and malfunction are different depending on each application circuit, and it is not to guarantee that all application circuit will normally operate even if you use this wiring example (Fig. 32). RTZC RT COMP FB VCC OUT GND IS FA5590 /FA5591 FB COMP RT RTZC FA5590 /FA5591 IS GND OUT VCC Fig.33 Bad example of GND wiring around IC Fig.32 Good example of GND wiring around IC 13 Example of application circuit 85 to 264Vac F101 6.3A C101 0.47u D101 600V25A R101 510k ZT101 R102 510k L101 C102 1000p L102 C104 0.47u TH101 C105 2200p 5D22 L201 175µH YG952S6RP R215 R216 620k R218 680k 390V 200W 1 L1 J101 N3 FMH21N50ES Q201 D201 620k R103 510k C103 1000p C201 1µ C106 2200p R209 47k D203 R217 620k R219 16k C202 220u J201 VR201 4 ERA91-02 D204 R208 22 R210 68k C206 0.15u C205 0.1u R201 0.068 GND R207 150 C210 1000p IC201 FB COMP RT VCC OUT GND IS C209 0.1u C208 2200p R213 47 R214 100k C211 56u C212 0.01u R211 51k D205 RTZC C207 0.01u R212 20k FA5591 VCC GND 21 J202 Fuji Electric Co., Ltd. AN-016E Rev.1.2 April-2011 21 http://www.fujielectric.co.jp/products/semiconductor/