FA5639

FA5639 Fuji Switching Power Supply Control IC Green Mode PWM-IC FA5639 Application Note April-2011 Fuji Electric co.,Ltd. Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 1 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 Caution 1. The contents of this note (Product Specification, Characteristics, Data, Materials, and Structure etc.) were prepared in April 2011. The contents will subject to change without notice due to product specification change or some other reasons. In case of using the products stated in this document, the latest product specification shall be provided and the data shall be checked. 2. The application examples in this note show the typical examples of using Fuji products and this note shall neither assure to enforce the industrial property including some other rights nor grant the license. 3. Fuji Electric Co.,Ltd. is always enhancing the product quality and reliability. However, semiconductor products may get out of order in a certain probability. Measures for ensuring safety, such as redundant design, spreading fire protection design, malfunction protection design shall be taken, so that Fuji Electric semiconductor product may not cause physical injury, property damage by fire and social damage as a result. 4. Products described in this note are manufactured and intended to be used in the following electronic devices and electric devices in which ordinary reliability is required: - Computer - OA equipment - Communication equipment (Terminal) - Measuring equipment - Machine tool - Audio Visual equipment - Home appliance - Personal equipment - Industrial robot etc. 5. Customers who are going to use our products in the following high reliable equipments shall contact us surely and obtain our consent in advance. In case when our products are used in the following equipment, suitable measures for keeping safety such as a back-up-system for malfunction of the equipment shall be taken even if Fuji Electric semiconductor products break down: - Transportation equipment (in-vehicle, in-ship etc.) - Communication equipment for trunk line - Traffic signal equipment - Gas leak detector and gas shutoff equipment - Disaster prevention/Security equipment - Various equipment for the safety. 6. Products described in this note shall not be used in the following equipments that require extremely high reliability: - Space equipment - Aircraft equipment - Atomic energy control equipment - Undersea communication equipment - Medical equipment. 7. When reprinting or copying all or a part of this note, our company’s acceptance in writing shall be obtained. 8. If obscure parts are found in the contents of this note, contact Fuji Electric Co.,Ltd. or a sales agent before using our products. Fuji Electric Co.,Ltd. and its sales agents shall not be liable for any damage that is caused by a customer who does not follow the instructions in this cautionary statement. Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 2 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 Contents 1. Overview 2. Features 3. Outline drawing 4. Block diagram 5. Functional description of pins 6. Rating & Characteristics 7. Characteristic curve 8. Operation of each block 9. Advice for designing 10. Application circuit example ···················································4 ···················································4 ···················································4 ···················································5 ···················································6 ···················································6 to 9 ···················································10 to 12 ···················································13 to 17 ···················································18 to 20 ···················································21 Caution) ・ The contents of this note subject to change without notice due to improvement. ・ The application examples or the parts constants in this note are shown to help your design. Variation of parts and service condition are not fully taken into account. Before use, a design with due consideration for these variations and conditions shall be conducted. Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 3 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 1. Overview FA5639 is a current mode type switching power supply control IC possible to drive a power MOSFET directly. Despite of a small package with 8 pins, it has a lot of functions and it is best suited for power saving at the light load and decreasing external parts. Moreover it enables to realize a reduced space and a high cost-performance power supply. 2. Features ・Excellent Power Saving by lowering the oscillation frequency depending on the load at light load. ・Low power consumption by a built-in startup circuit. ・Overload protection function with a few number of external components. ・Current Minus detection. Power Saving of the revision of the input voltage of OLP. ・Latch pin for an external signal: Over Temperature Protection, Over Voltage Protection etc. ・Built-in drive circuit possible to connect to a power MOSFET directly. Output current: 1.0A (sink), 0.5A (source) ・VCC Under-Voltage Lock-Out function (UVLO). Function list Part Number FA5639 Switching frequency 100kHz(typ.) OLP type Latch IS pin VthIS VthIS= -1.0V 3. Outline drawing SOP-8 8 DIP-8 5 1 9.4 4 4 . 5 Ma x. 6. 5 3 . 5 Max. 3.4 2.54 0.25 ±0.1 0.5 ±0.1 7.6 2.54×3=7.62 0° ～ 15 ° Unit :(mm) Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 4 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 4. Block diagram FA5639 (Over Load Protection: Latch Shutdown type) VH Start up Current ON + UVLO 5V Reg. OFF Reset Reset OSC Freq control input 5V Slope OFF(FB) + × VCC Internal Power Supply DBL OUTPUT 1shot CLR RSFF S Q R IS comp. + + VCC OFF (IS) + Over Load + - OLP + Ctrl T1 VCC sustain VCC 30V Dmax OUT FB + Σ INV. AMP Lv. Shift Start up Management Logic Monitor Ctrl ON IS T2 OLP Timer 5V VCC + OVP LAT T1:Delay time to OLP-Latch LAT GND + UVLO Over Load Latch Latch Set Reset Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 5 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 5. Functional description of pins Pin No. 1 2 3 4 5 6 7 8 Pin Nam e LAT FB IS GND OUT VCC (NC) VH Pin function External latch signal Feed back input Current s ens e (Input) Ground Driver Output Power supply (unused) High voltage input (750V m ax.) VH 8 (NC) 7 VCC 6 OUT 5 1 LAT 2 FB 3 IS 4 GND 6. Rating & characteristics “+” shows sink and “–“ shows source in current prescription. (1) Absolute maximum rating Item Power supply voltage OUT pin output peak current OUT pin voltage FB pin voltage IS pin voltage LAT pin voltage VH pin input voltage Total loss (Ta=25℃) Junction temperature in operation Storage temperature SOP DIP Symbol VCC IOH IOL VOUT VFB VIS VLAT VVH Pd Pd Tj Tstg Rating 28 -0.5 +1.0 -0.3 to VCC+0.3 -0.3 to 5.0 -2.0 to 5.0 -0.3 to 5.0 -0.3 to 750 400 800 -30 to +125 -40 to +150 Unit V A A V V V V V mW mW ℃ ℃ Allowable loss reduction characteristics 800mW(DIP) 400mW(SOP) Allowable loss 0 -30 25 85 125 Ambient Temperature Ta [℃] Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 6 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 (2) Recommended operating condition Item VCC Power supply voltage High input voltage VH pin Resistance LAT pin capacity VCC pin capacity Operating ambient temperature Symbol VCC VVH RVH CLAT CVCC Ta MIN 10 80 2 0.22 10 -30 1.0 33 TYP 18 MAX 24 650 10 2.2 100 85 Unit V V kΩ uF uF ℃ (3) Electric characteristics (in case nothing specified : Tj=25℃,VCC=18V) Switching oscillator section (FB pin) Item Oscillation frequency Voltage stability Temperature stability Jitter range FB pin threshold voltage for light load mode FB pin voltage at minimum frequency Oscillation frequency reduction ratio Minimum oscillation frequency Symbol Fosc Fdv Fdt ⊿Fm Vfbm Vfmin kf Fmin Δf/ΔVFB Conditions FB=2V VCC=10V to 24V Tj= -30 to 125℃ MIN 90 -2 -5 ±4.0 1.05 0.7 200 0.25 TYP 100 － － ±6.5 1.20 0.8 240 0.45 MAX 110 +2 +5 ±9.0 1.35 0.9 280 0.65 Unit kHz % % % V V kHz/V kHz External latch shutdown signal (LAT pin) Item Source current of LAT pin Latch-off level VthLAT/Ilat Latch-off delay timer Symbol Ilat VthLAT RLAT TdLAT Conditions LAT=1.15V MIN -80 1.00 12 50 TYP -70 1.05 15 65 MAX -60 1.10 18 80 Unit uA V kΩ us Soft start signal (LAT pin) Item Minimum pulse output voltage Minimum pulse hold voltage Soft start end voltage Symbol Conditions Vss1 Vss2 Vss3 Start/Restart Start/Restart MIN 1.9 2.3 1.5 TYP 2.1 2.5 1.6 MAX 2.3 2.7 1.7 Unit V V V Pulse width modulation section (FB pin) Item Maximum duty cycle Minimum duty cycle Input threshold voltage FB pin source current Symbol Dmax Dmin VthFB0 Ifb0 Conditions VFB=4.5V VFB=0V DUTY=0% VFB=0V MIN 75 － 340 -320 TYP 85 － 400 -260 MAX 95 0 460 -200 Unit % % mV uA Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 7 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 Over load protection (OLP) circuit section (FB pin) Item Over load detection threshold voltage Over load detection Delay time Symbol VthOLP TdOLP Conditions VIS=VthIS1 VFB=4.7V MIN 3.7 170 TYP 4.2 200 MAX 4.7 230 Unit V ms Current sense section (IS pin) Item Voltage gain Maximum threshold voltage Input bias current Minimum ON pulse width Delay to output Symbol Conditions AvIS VthIS1 IIS Tmin1 Tmin2 TpdIS ΔVFB/ΔVIS VFB=4.7V VIS=0V Steady Start/Restart /OLP Tj=25℃ MIN -2 . 7 -1.07 -50 650 180 100 TYP -2 . 3 -1.00 -40 900 280 200 MAX -1 . 9 -0.93 -30 1150 380 300 ns Unit V/V V uA ns VCC circuit section (VCC pin) Item Start-up threshold voltage Shutdown threshold voltage Hysteresis width VCC over-voltage protection threshold voltage Symbol VCCon VCCoff Vhys Vthovp Tj=25℃ Conditions MIN 16 7.5 8.0 25 TYP 18 8.0 10 26 MAX 20 8.5 12 27 Unit V V V V Output circuit section (OUT pin) Item Low output voltage High output voltage Rise time Fall time Symbol VOL VOH tr tf Conditions IOL=100mA, VCC=18V IOH= -100mA,VCC=18V CL=1nF,Tj=25℃ CL=1nF,Tj=25℃ MIN 0.4 14.5 30 20 TYP 0.8 16 60 40 MAX 1.6 18 100 70 Unit V V ns ns Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 8 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 High-voltage input section (VH pin , VCC pin) Item Input Current of VH pin Symbol Conditions IHrun IHstb VH=450V,VCC>VCCon VH=120V,VCC=0V MIN 60 3.5 13 12 11 11.5 10 -14 -18 TYP 100 6.5 14.5 13 12 12.5 11 -8.0 -12 MAX 140 9.5 16 14 13 13.5 12 -3.5 -6.0 V mA V Unit uA mA VCCLHH 1time clamp VCC voltage at Latch VCCLH VCCLL by Start-up Circuit Charge current for VCC pin VCC rising VCC falling VCC clamp voltage at operating VCCclp3 VCC rising VCCclp4 VCC falling Ipre1 Ipre2 VCC=16V,VH=120V VCC=11V,VH=120V Power supply current Item (VCC pin) Symbol ICCop1 Conditions Duty cycle=Dmax FB=2V OUT=No Load Duty cycle=0% FB=0V FB=open, VCC=11V MIN 1.0 TYP 1.45 MAX 1.75 Unit mA Operating-state supply current ICCop2 Latch mode supply current VCC pin zenner clamp voltage ICClat VCCzd 0.95 600 28 1.35 900 30 1.65 1100 34 mA uA V Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 9 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 7. Characteristic curve Oscillation frequency vs Junction temperature (Tj) 104 Fdt vs Junction temperature (Tj) 3 Os c illation frequenc y Temperature s tability Fdt [ % ] 2 1 0 Os c illation f requenc y Fos c [k Hz ] 102 100 98 -1 -2 -3 96 94 -50 0 50 100 Junction temperature Tj [ ℃] 150 -50 0 50 100 Junction temperature Tj [ ℃] 150 Vfbm vs Junction temperature(Tj) 1.6 1.5 1.4 1.3 1.2 1.1 1.0 -50 0 50 100 Junction temperature Tj [ ℃] 150 Ma ximu m thresh ol d vol ta ge Vth IS1 [V] Maximum threshold voltage vs Junction temperature (Tj) -0.96 FB pin thres hold v oltage for light load mode V fbm [ V] -0.98 -1.00 -1.02 -1.04 -1.06 -50 0 50 100 Junction temperature Tj [ ℃] 150 FB pin Resistance (RFB) vs Junction temperature (Tj) 19.0 FB pin s ourc e c urrent I fb0 [uA ] -250 FB pin source current vs Junction temperature(Tj) FB pin Res is tanc e RFB [k Ω] 18.8 -255 18.6 -260 18.4 18.2 -265 18.0 -50 0 50 100 Junction temperature Tj [ ℃] 150 -270 -50 0 50 100 Junction temperature Tj [ ℃] 150 Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 10 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 Minimum ON pulse width vs Junction temperature (Tj) 320 Mi ni mum ON p ul se wi dth Tmin 2 [n s] Maximum duty cycle vs Junction temperature (Tj) 90 Max imum dut y c y c le Dmax [ ％] 310 300 290 280 270 260 250 -50 0 50 100 Junction temperature Tj [ ℃] 150 88 86 84 82 80 -50 0 50 100 Junction temperature Tj [ ℃] 150 Start-up threshold voltage vs Junction temperature (Tj) 20 Sta rt-u p th resho ld vol ta ge VCCo n [V] Shutdown thres hold v oltage VCCoff [V] 10 Shutdown threshold voltage vs Junction temperature (Tj) 19 9 18 8 17 7 16 15 -50 0 50 100 Junction temperature Tj [ ℃] 150 6 -50 0 50 100 Junction temperature Tj [ ℃] 150 Input Current of VH pin vs Junction temperature (Tj) 8 Input Current of VH pin Ihs tb [mA] I nput Current of V H pin I hs t b [ mA ] 120 Input Current of VH pin vs Junction temperature (Tj) VH=450V VCC=18V 110 7 6 100 5 4 90 3 -50 0 50 100 Junction temperature Tj [ ℃] 150 80 -50 0 50 100 Junction temperature Tj [ ℃] 150 Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 11 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 Operating-state supply current vs Junction temperature (Tj) 1.6 O perating- s tate s upply c ur r ent ICCop1 [mA] O per ating- s tate s upply c ur r ent ICCop2 [mA] Operating-state supply current vs Junction temperature (Tj) 1.5 1.5 FB=2V 1.4 1.4 FB=0V 1.3 1.3 1.2 1.2 1.1 1.1 -50 0 50 100 Junction temperature Tj [ ℃] 150 1.0 -50 0 50 100 Junction temperature Tj [ ℃] 150 Charge current for VCC pin vs Junction temperature (Tj) -10 Ch arge current for VC C pin Ipre2 [mA] O v er - v oltage thr es hold v oltage Vthov p [V] Vthovp vs Junction temperature (Tj) 27.0 -11 26.5 -12 26.0 -13 25.5 -14 -50 0 50 100 Junction temperature Tj [ ℃] 150 25.0 -50 0 50 100 Junction temperature Tj [ ℃] 150 Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 12 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 8. Operation of each block (1) Startup circuit The IC integrates a startup circuit having withstand voltage of 750V to achieve low power consumption. Fig.1 to Fig.3 show connections. Turning on the power, capacitor C2 connected to the VCC terminal is charged and the voltage increases due to the current fed from the startup circuit to the VCC terminal. If the ON threshold voltage of the under-voltage lockout circuit (UVLO) is exceeded, the power for internal operation is turned on, and the IC starts operating. The current supplied from the VH terminal to the VCC terminal is approximately 6.5mA(Typ.) when VCC = 0V. As the VCC voltage increases, the supply current decreases. A resister of 2kΩ is connected in series to the VH terminal for short-circuit protection of the VCC terminal. Fig.1 shows a typical connection where the VH terminal is connected to the half-wave rectifier circuit of AC input voltage. The startup time of this connection is the longest in 3 types of connection. Fig.2 shows the connection where the VH terminal is connected to the full-wave rectifier circuit of AC input voltage. The startup time of this connection is approximately half of the connection shown in Fig.1. Fig.3 shows the connection where the VH terminal is connected to the back of rectification and smoothing of AC input voltage. The startup time of this connection is the shortest in 3 types. In this connection, however, even if the AC input voltage is shut down after the IC enters the latch mode, the voltage charged in C1 is kept impressed to the VH terminal, requiring much time for the latch mode to be reset. It takes approximately several minutes to reset the latch mode, although the time varies depending on conditions. If the VCC terminal voltage exceeds the ON threshold voltage and the IC starts operating, the startup circuit is shut down and the VH terminal current decreases to several 10 to several 100uA. After the startup, the IC goes into switching operation, and is operated with the power supplied from the auxiliary winding. If the overload or overvoltage protection is actuated, causing the IC to enter the latch mode, then the startup circuit is subjected to ON/OFF control to maintain the VCC voltage within the 12V to 13V (typ.) range. At light load or during OCP delay time, the Vcc voltage avoids dropping to UVLO off threshold level. Then the startup circuit is subjected to ON/OFF control to maintain the VCC voltage within the 11V to 12.5V (typ.) range. C1 Startup circuit current Startup circuit control signal RVH VH 8 6 VCC C2 start Fig.1 Startup circuit 1 (Half-wave) Fig.2 Startup circuit 2 (Full-wave) Fig.3 Startup circuit 3 (Rectification) Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 13 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 (2) Oscillator This oscillator is used to determine the switching frequency. The switching frequency in the normal operation mode is set to 100kHz within the IC. To minimize the loss of power in the standby state, this IC is equipped with a function of automatically decreasing the switching frequency under light load. When the FB terminal voltage decreases down to 1.2V (typ.) or lower under light load, the frequency decreases almost linearly proportional to the FB terminal voltage.( See Fig.4) The minimum frequency, Fmin, has been set to 0.45kHz (typ.). In addition to trigger signals for determining switching frequency, the oscillator generates pulse signals for determining the maximum duty cycle and ramp signals for performing slope compensation. Switching frequency Fig.4 Oscillation frequency (3) Current comparator & PWM latch circuit The IC performs current mode control. Fig.5 shows a circuit block for basic operations, and Fig.6 shows a timing chart. The polarity of the current detection voltage of the IS terminal is negative. The GND of the IC is connected between the current detection resistor Rs and the MOSFET. (See Fig.5) A trigger signal having the switching frequency that is output from the oscillator is input to the PWM latch (F.F.) through the one-shot circuit as a set signal. Then the output of the PWM latch as well as the OUT terminal voltage reaches the High state. On the other hand, the current comparator (IS comp.) monitors the MOSFET current, and if the threshold voltage is reached, a reset signal is output. When a reset signal is input, the output of PWM latch (F.F.) as well as the OUT terminal voltage reaches the Low state. The ON pulse width of the OUT terminal is thus controlled with the threshold voltage of the current comparator (IS comp.). The output is controlled by changing the threshold voltage of this IS comp. with feedback signals. As shown in Fig.7, the FB terminal voltage is level-shifted by a reverse amplifier and input into the current comparator (IS comp.) as the threshold voltage. In addition, -1V reference voltage is input inside the IC to regulate the maximum input threshold voltage of the IS terminal, VthIS1 (overcurrent control threshold). The reverse amplifier output or the maximum IS terminal input threshold voltage, VthIS1, whichever is higher, is given precedence as the IS terminal threshold voltage. (Example: When the output of the reverse amplifier is -0.5V in a product whose maximum threshold voltage of the IS terminal, VthIS1, is -0.5V, the output of the reverse amplifier is given precedence and thus the current comparator is reversed when the IS terminal voltage reaches -0.5V.) C1 OSC 1 shot Rs IS comp. SQ R F.F. 5 OUT 3 IS 4 GND Fig.5 Current mode basic operation circuit block Fig.6 Current mode basic operation timing chart Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 14 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 In normal operation, the output voltage of the power supply is maintained constant by changing the threshold voltage of the current comparator via the FB terminal voltage. When the output voltage decreases, the feedback circuit increases the FB voltage to allow the threshold voltage of the current comparator to scale out to Low, thus increasing the MOSFET current. The maximum input threshold voltage of the IS terminal, VthIS1 (-1V) controls the maximum current of the MOSFET. If the FB terminal voltage increases under overload, the output of the reverse amplifier scales out to Low, decreasing down to lower than VthIS1. The threshold voltage of the IS terminal is thus controlled not to exceed VthIS1. The oscillator outputs pulses for determining the maximum duty cycle. Using these pulses, the maximum duty cycle has been set to 85% (typ.). Fig.7 Current comparator Minimum ON width 1shot output (set pulse) (4) One shot circuit (minimum ON width) When the MOSFET is turned on, a surge current is generated due to discharge corresponding to the capacitance of the main circuit and gate drive current. If this surge current reaches the IS terminal threshold voltage, the current comparator output is reversed, and consequently normal pulses may not be generated from the OUT terminal. To avoid this phenomenon, a minimum ON width of OUT terminal output is set within the one-shot circuit block of the IC. If a trigger signal having the switching frequency is input from the oscillator, a pulse having a specific width is output as a PWM latch (F.F.) set signal. Since the set signal has priority over the input signal of the PWM latch, the output of the PWM latch (F.F.) is not reversed while the set signal from the one-shot circuit is being input, even if a reset signal is input from the current comparator (IS comp.) (See Fig.5) As a result, the input to the IS terminal is kept invalid for the specified period of time immediately after the output pulse is generated from the OUT terminal (minimum ON width), and made not to respond to the surge current at turn-on. (See Fig.8) This minimum ON width function eliminates the need of a noise filter for the IS terminal in principle. The minimum ON width is usually set to 900ns (typ.) in normal operations, and to 280ns (typ.) at startup or rebooting to prevent the transient MOSFET drain voltage from surging. In addition, an exclusive comparator is integrated to keep the output pulse at zero under no load. (See Fig.9) This comparator reverses its output when the FB terminal voltage decreases down to 400mV (typ.), preventing a set pulse to be input to the PWM latch (F.F.). The output is thus maintained in Low state and switching is stopped. OUT pin voltage IS pin voltage IS pin threshold voltage Output pulse does not stop here because of this minimum ON width. Fig.8 Minimum ON width OSC 1 shot CLR OFF(FB) 2 FB SQ R F.F. 5 OUT Fig.9 Output shutdown function of FB pin Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 15 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 (5)Overload protection circuit Detecting overload, the overload protection (OLP) circuit stops switching in case overload is continued for a specified period of time (200ms typ.) to protect the circuit. Overload detection is performed based on the FB terminal voltage. Fig.10 is a conceptual diagram of the operation. Fig.11 shows a circuit block. The overload protection is actuated when FB terminal voltage processed into a signal is detected with the OLP comparator, based on the overload delay time TdOLP (200ms typ.),which is the period from the overload detection with the built-in OLP timer to switching pulse stop When the output current increases and the FB terminal voltage increases up to VthOLP (4.2V typ.), overload is detected. Since the IS terminal voltage is equivalent to the maximum input threshold voltage VthIS1 (-1.0V typ.) at this time, the MOSFET current is limited, and the output voltage is no longer maintained. As soon as the overload is detected, the OLP timer starts counting the delay time up to the stop of the switching pulse. When specified overload protection delay time TdOLP (200ms typ.) has elapsed, the switching pulse output is stopped. If overload is reset and the FB voltage decreases down to VthOLP (4.2V typ.) before the overload protection delay time expires, switching continues. By interrupting the input voltage to decrease the VCC voltage to the OFF threshold voltage (8V typ.) or lower, the latch mode can be reset. Start up Management Logic Monitor Ctrl ON 8 VH Start up Current ON VCC DBL 5 OUT OLP 2 FB x INV. AMP T1 Ctrl T2 OLP Timer Over Load Latch Set Reset UVLO Fig.10 Overload protection circuit Fig.11 Overload protection timing chart (latch) Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 16 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 (6) Overvoltage protection circuit (VCC terminal) The IC integrates an overvoltage protection circuit for monitoring the VCC terminal voltage. (See Fig.12) If the VCC voltage increases and exceeds 26V typ., which is the reference voltage of the comparator (OVP), the comparator output is reversed to High level, setting the latch circuit to perform latch shutdown. At this time, the startup circuit is subjected to ON/OFF control to maintain the latch mode, thus keeping the VCC voltage within the 12V or 13V (typ.) range. To cancel the latch mode, shut down the input voltage to cause brownout, as in the case protection.(latch type) Since 65s (typ.) delay time has been set to the set input of the latch circuit, the latch mode is not entered even if the VCC terminal exceeds the detection voltage temporarily. 6 VH 8 Start up Circut ON UVLO VCC VCC Start up Management Logic Monitor Ctrl ON DBL 5V LAT 1 LAT OVP Latch Set Reset Latch OUT 5 (8) Undervoltage lockout circuit (VCC terminal) The IC integrates an undervoltage lockout (UVLO) function to prevent circuit malfunction that might occur when power supply voltage decreases. When the VCC voltage increases from 0V and reaches 18V (typ.), the circuit starts operating. When the VCC decreases down to 8V (typ.), the circuit stops operating. In a state in which the undervoltage lockout function is actuated to stop IC operation, the OUT terminal is forcibly made to enter the Low state. The latch mode of the protection circuit is also reset. of the overload (9) Output circuit The push/pull structure output circuit drives the MOSFET directly. The peak output current of the OUT terminal is 0.5A (source) and 1.0A (sink) in the maximum absolute ratings. In a state in which the IC is stopped in the undervoltage lockout circuit or operation is suspended in the latch mode, or in an auto reset wait state by overload protection function, the OUT terminal is brought into the Low level, and the MOSFET is interrupted. UVLO Fig.12 Overvoltage protection circuit (7) Latch shutdown circuit by an external signal The LAT terminal is equipped with a latch shutdown function. (See Fig.13) By decreasing the LAT terminal voltage to 1.05V or lower, the IC enters the latch mode. To cancel the latch mode, shut down the input voltage to cause brownout, as in the case of the OVP. (former section) If the external latch shutdown function by the LAT terminal is not to be used, connect a capacitor only. Connect an NTC thermistor to the LAT terminal to use the overheat protective function. 5V LAT 1 UVLO LAT Latch Set Reset TH Fig.13 Overheat protection function using a thermistor Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 17 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 9. Advice for designing (1) Startup To properly start or stop the power supply, a capacitor having appropriate capacitance must be selected. Fig.14 shows the VCC voltage at the time of startup when an appropriate capacitor is connected. When the power is turned on, the capacitor of the VCC is charged with the current supplied from the startup circuit, and the voltage increases. When the VCC reaches the ON threshold voltage, the IC starts operating. The IC is operated based on the voltage supplied from the auxiliary winding. Note that during the period immediately after startup until the voltage of the auxiliary winding starts up, the VCC decreases. Select a capacitor for the VCC that does not allow the VCC to decrease down to the OFF threshold voltage. Specifically, a VCC terminal capacitor whose OFF threshold voltage is 9V or higher is recommended. If the capacitance of the VCC terminal is too small, VCC decreases to lower than the OFF threshold voltage before the voltage of the auxiliary winding starts up as shown by Fig.15. In this case, the VCC repeats up/down operation between ON and OFF threshold voltages, and consequently the power supply cannot be turned on. However, if the capacitance of the capacitor of the VCC terminal is increased, the startup time is made longer. In such cases, the circuit shown in Fig.16 can balance the capacitance and the startup time. By setting C1 to less than C2, the startup time can be kept short. Since current is supplied via C2 after startup, the VCC terminal voltage hold time can be kept long even under sudden change conditions. VCC start 6 C1 C2 Fig.16 VCC circuit (3) Gate drive circuit To adjust switching speed and prevent vibration of the gate terminal, a resistor is connected between the MOSFET gate terminal and the OUT terminal of the IC in general. In some cases, driving current for turning on the MOSFET and that for turning it off are required to be determined separately. In this case, connect a gate drive circuit shown in Fig.17 or Select a capacitor whose 18 between the gate terminal of the MOSFET and the OUT capacitance does not allow VCC voltage to decrease down to VCCoff. terminal. In Fig.17, the current is limited by R1 and R2 when the power is turned on, while the current is limited only by R2 Time t Fig.14 VCC terminal voltage at startup when it is turned off. In Fig.18, the current is limited only by R1 when the power is turned on, while the current is limited by R1 and R2 connected in parallel when the power is turned off. Auxiliary winding voltage Q1 5 OUT R1 R2 Fig.17 Gate drive circuit (1) Fig.15 VCC terminal voltage at startup (when capacitance is too small) (2) VCC hold time To prevent the VCC terminal voltage from decreasing to lower than the UVLO OFF threshold voltage due to sudden load change and other reasons, it may be desirable that the capacitance of the capacitor to be connected to the VCC terminal be made larger. R2 5 OUT R1 Q1 Fig.18 Gate drive circuit (2) Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 18 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 (4) LAT terminal • To perform overheat protection using an NTC thermistor As shown in Fig.13, thermistor TH1 is connected to the LAT terminal to perform overheat protection (latch shutdown). Since the LAT terminal source current is 70A (min.), select TH1 whose resistor Rth satisfies the following expression at the desired overheat protection temperature. If temperature setting for overheat protection is not feasible with TH1 only, connect an additional resistor in series for adjustment. Rth  1.05V / 70A  15.0k In addition, the VthLAT tolerance calculates by RLAT (Min-Max) resistance. It does not depend on the calculation of ILAT and VthLAT (Min & Max). • To perform latch shutdown using an independent abnormality detection signal To perform latch shutdown with an external signal, connect a peripheral circuit, allowing the LAT terminal voltage to be kept below 1.0V. Fig.19 shows a typical circuit connection. (6) Current sensing unit As described in 8-(4) One-shot circuit, the minimum ON width is set for this IC to minimize malfunction due to surge current that occurs when the power MOSFET is turned on. However, if the surge current that occurs at the time of power ON is large, or noise is applied externally at the time of power ON, malfunction might occur. In such cases, add RC filters C6 and R7 as shown in Fig.21. To ensure efficient operation of the capacitor C6, place it as close to the IC as possible, and lay wiring with extreme care. 5 OUT IS 3 C6 4 GND R7 Rs 5V LAT 1 R4 R3 Tr1 UVLO LAT Latch Set Reset Fig.21 IS terminal filter (7) Improvement of input power at light load The IC integrates the function of reducing standby power consumption by lowering oscillation frequency under light load. However, since load conditions vary depending on the power supply setting, the settings within the IC may be insufficient to reduce standby power consumption. In such cases, connect resistor R8 as shown in Fig.22 to reduce oscillation frequency. Since the input impedance of the IS terminal is about 100kΩ, resistor R8 shall be several 100kΩ to MΩ. As shown in Fig.23, by connecting the resistor between the OUT terminal and the IS terminal, the same light-load correction effect can be obtained and in addition, the loss of resistor R8 can be reduced compared to the case in which it is connected to the VCC terminal. Fig19.Latch shutdown function by an external signal (5) Feedback Fig.20 shows the circuit configuration of the FB terminal. A photo-coupler PC is connected as a feedback circuit that monitors the output voltage and performs PWM control. This signal gives threshold voltage for the current comparator. Consequently, if noise is added to this signal, the output pulses are disturbed. Capacitor C3 is generally connected for protection against noise. Fig.20 FB terminal circuit configuration Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 19 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 (9) Prevention of malfunction due to negative potential of the terminal VCC 6 3 IS R8 C1 If large negative voltage is applied to each terminal of the IC, the parasitic element within the IC may be actuated, thus causing malfunction to occur. Be sure to maintain the voltage to be applied to each terminal within the maximum absolute ratings. (10) Loss calculation To use the IC within its ratings, the loss of the IC may have to be found. However, it is not feasible to measure loss directly. The following is an example of finding a rough value of loss by calculation. Fig.22 Correction circuit for improvement of input power under light load(1) VCC 6 5 3 IS Fig.23 Correction circuit for improvement of input power under light load(2) The rough value of the total loss of the IC, Pd, can be OUT C1 R8 calculated using the following expression: Pd=VCC × (ICCop1 + Qg × fsw) + VVH × IHrun where, VVH: voltage to be applied to the VH terminal, IHrun: current fed to the VH terminal during operation, VCC: power voltage, ICCop1: Consumption current of the IC Qg: electrical charge to be input to the MOSFET gate used, and Fsw: switching frequency. A rough value can be found using the above expression, and the total loss found by the calculation, Pd, is slightly larger than the actual value. Be sure to take into consideration that each characteristic value varies depending on temperatures and other factors. Example: When the VH terminal is connected to a half-wave rectifier circuit with 100VAC input, the average voltage to be applied to the VH terminal is calculated to be approximately 45V. Furthermore, assuming that Tj = 25C, VCC = 18V, and Qg = 80nC, and based on IHrun=100uA (typ.) ICCop1=1.45mA (typ.) Reduction of dependency of overload detection level on input voltage (8) Since the gradient of the inductor current of a transformer varies depending on the input voltage in the overload protection function, the current value determined to be overload also varies. The higher the input voltage, the higher the output current that causes overload shutdown to occur. As shown in Fig.24. resistor R9 can be connected between the auxiliary winding and the IS terminal to minimize the dependency of the overload detection level on input voltage (IS terminal line correction). VCC 6 3 IS R9 C1 fsw=100kHz (typ.) the loss of the IC having standard characteristics can be calculated as follows: Fig.24 Reduction of dependency of overload detection level on input voltage Pd=18V ×(1.45mA + 80nC × 100kHz) + 45V × 100uA = 174.6 mW Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 20 http://www.fujielectric.co.jp/products/semiconductor/ FA5639 10. Application circuit example Note) This application circuit example shows typical directions for use of this IC for reference and does not guarantee the operation and characteristics. ▪ Be sure to connect C13 (0.1 uF to 1 uF) to the VCC terminal in order to eliminate high-frequency noise. Fuji Electric Co., Ltd. AN-085E Rev.1.0 Apr-2011 21 http://www.fujielectric.co.jp/products/semiconductor/