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FML12N50ES

FML12N50ES

  • 厂商:

    FUJI(富士电机)

  • 封装:

  • 描述:

    FML12N50ES - N-CHANNEL SILICON POWER MOSFET - Fuji Electric

  • 数据手册
  • 价格&库存
FML12N50ES 数据手册
http://www.fujisemi.com FML12N50ES Super FAP-E3 series Features Maintains both low power loss and low noise Lower RDS(on) characteristic More controllable switching dv/dt by gate resistance Smaller VGS ringing waveform during switching Narrow band of the gate threshold voltage (3.7±0.5V) High avalanche durability TFP 4 0.6±0.2 FUJI POWER MOSFET N-CHANNEL SILICON POWER MOSFET Outline Drawings [mm] 9.0± 0.2 0.1 Equivalent circuit schematic 7.0± 0.2 0.4± 0.1 0.5 4D 10.1±0.3 9.0±0.2 0.5±0.2 2.0 1.5 2.0 2.5 G1 (10.1) (5.8) Applications Switching regulators UPS (Uninterruptible Power Supply) DC-DC converters 1 1.0±0.2 1.0±0.2 2 3 0.4±0.1 S1 2 3 S2 3.6±0.2 2.8±0.2 Solder Plating (2.2) (4.0) (3.2) (0.8) Maximum Ratings and Characteristics Absolute Maximum Ratings at Tc=25°C (unless otherwise specified) Description Drain-Source Voltage Continuous Drain Current Pulsed Drain Current Gate-Source Voltage Repetitive and Non-Repetitive Maximum Avalanche Current Non-Repetitive Maximum Avalanche Energy Repetitive Maximum Avalanche Energy Peak Diode Recovery dV/dt Peak Diode Recovery -di/dt Maximum Power Dissipation Operating and Storage Temperature range Symbol VDS VDSX ID I DP VGS IAR E AS E AR dV/dt -di/dt PD Tch Tstg Characteristics 500 500 ±12 ±48 ±30 12 460.8 18 6.3 100 1.44 180 150 -55 to +150 Unit V V A A V A mJ mJ kV/µs A/µs W °C °C Remarks VGS = - 30V (2.1) Note*1 Note*2 Note*3 Note*4 Note*5 Ta=25°C Tc=25°C Electrical Characteristics at Tc=25°C (unless otherwise specified) Description Drain-Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current Gate-Source Leakage Current Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Time Turn-Off Time Total Gate Charge Gate-Source Charge Drain-Source Crossover Charge Gate-Drain Charge Avalanche Capability Diode Forward On-Voltage Reverse Recovery Time Reverse Recovery Charge Symbol BVDSS VGS (th) I DSS I GSS R DS (on) gfs Ciss Coss Crss td(on) tr td(off) tf QG Q GS Q SW Q GD IAV VSD trr Qrr Conditions I D =250µA, VGS=0V I D =250µA, VDS=VGS VDS=500V, VGS=0V VDS=400V, VGS=0V VGS=±30V, VDS=0V I D =6A, VGS=10V I D =6A, VDS=25V VDS=25V VGS=0V f=1MHz Vcc =300V VGS=10V I D =6A RG=15Ω Vcc =250V I D =12A VGS=10V L=2.44mH, Tch=25°C I F=12A, VGS=0V, Tch=25°C I F=12A, VGS=0V -di/dt=100A/µs, Tch=25°C min. 500 3.2 4.5 12 typ. 3.7 10 0.427 9 1400 160 11.5 31 18 83 16 43 13 6 14 0.86 0.37 5.0 max. 4.2 25 250 100 0.50 2100 240 17.5 46.5 27 124.5 27 56 23 10 21 1.30 Unit V V µA nA Ω S pF Tch=25°C Tch=125°C ns nC A V µS µC Thermal Characteristics Description Thermal resistance Symbol Rth (ch-c) Rth (ch-a) Rth (ch-a) Test Conditions Channel to case Channel to Ambient Channel to Ambient Note*6 min. typ. max. 0.69 87 52 Unit °C/W °C/W °C/W Note *1 : Tch≤150°C Note *2 : Stating Tch=25°C, IAS=5A, L=33.8mH, Vcc=50V, RG =10Ω, E AS limited by maximum channel temperature and avalanche current. Note *3 : Repetitive rating : Pulse width limited by maximum channel temperature. Note *4 : I F ≤-I D, -di/dt=100A/µs, Vcc≤BVDSS, Tch≤150°C. Note *5 : I F ≤-I D, dv/dt=6.3kV/µs, Vcc≤BVDSS, Tch≤150°C. Note *6 : Surface mounted on 1000mm2, t=1.6mm FR-4 PCB (Drain pad area : 500mm2) 1 FML12N50ES Allowable Power Dissipation PD=f(Tc) Safe Operating Area ID=f(VDS):Duty=0(Single pulse), Tc=25˚C FUJI POWER MOSFET http://www.fujisemi.com 200 180 160 10 2 t= 1µs 10µs 100µs 10 1 140 120 PD [W] 100 ID [A] 10 0 1ms 80 60 10 -1 Power loss waveform : Square waveform PD 40 20 0 0 25 50 75 Tc [ ˚C] 100 125 150 10 -2 t 10 -1 10 0 10 VDS [V] 1 10 2 10 3 Typical Output Characteristics ID=f(VDS):80µs pulse test, Tch=25˚C 30 100 Typical Transfer Characteristic ID=f(VGS):80µs pulse test, VDS=25V, Tch=25˚C 25 10V 8.0V 7.0V ID[A] 20 10 ID [A] 15 6.5V 1 10 VGS=6.0V 5 0.1 0 0 4 8 12 VDS [V] 16 20 24 0 1 2 3 4 5 VGS[V] 6 7 8 9 10 Typical Transconductance gfs=f(ID):80µs pulse test, VDS=25V, Tch=25˚C 100 0.9 Typical Drain-Source on-state Resistance RDS(on)=f(ID):80µs pulse test, Tch=25˚C VGS=6.0V 6.5V 0.8 10 0.7 RDS(on) [ Ω ] 7V 8V 10V 20V gfs [S] 0.6 1 0.5 0.4 0.1 0.1 1 ID [A] 10 100 0.3 0 5 10 ID [A] 15 20 2 FML12N50ES Drain-Source On-state Resistance RDS(on)=f(Tch):ID=6A, VGS=10V 2.0 1.8 1.6 6 8 7 FUJI POWER MOSFET http://www.fujisemi.com Gate Threshold Voltage vs. Tch VGS(th)=f(Tch):VDS=VGS, ID=250µA 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 Tch [ ˚C] 75 100 125 150 max. typ. VGS(th) [V] 5 4 3 min. 2 1 0 -50 -25 0 25 50 75 Tch [˚C] 100 125 150 max. typ. RDS(on) [ Ω ] Typical Gate Charge Characteristics VGS=f(Qg):ID=12A, Tch=25˚C 14 Typical Capacitance C=f(VDS):VGS=0V, f=1MHz 12 Vcc= 100V 250V 400V 10 4 10 10 8 VGS [V] C [pF] 3 Ciss 6 10 2 Coss 4 10 2 1 Crss 0 0 0 10 20 30 40 Qg [nC] 50 60 70 80 10 10 -2 10 -1 10 0 10 1 10 2 VDS [V] Typical Forward Characteristics of Reverse Diode IF=f(VSD):80 µs pulse test, Tch=25˚C 100 10 3 Typical Switching Characteristics vs. ID t=f(ID):Vcc=300V, VGS=10V, RG=15Ω td(off) 10 10 2 tf IF [A] t [ns] td(on) 1 10 1 tr 0.1 0.00 10 0.25 0.50 0.75 VSD [V] 1.00 1.25 1.50 0 10 -1 10 0 10 1 10 2 ID [A] 3 FML12N50ES Maximum Avalanche Energy vs. starting Tch E(AV)=f(starting Tch):Vcc=50V,I(AV)
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